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Commit abec187

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Felix "xq" Queißner
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Fixes PS/2 Input expansion code and enables it to host all 4 ports at once.
1 parent da8b128 commit abec187

4 files changed

Lines changed: 186 additions & 54 deletions

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‎.gitmodules‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,3 +7,6 @@
77
[submodule "Hardware/Case/lib/ScrewsMetric"]
88
path = Hardware/Case/lib/ScrewsMetric
99
url = https://github.com/More-Wrong/ScrewsMetric
10+
[submodule "Hardware/Debug Probe/debugprobe"]
11+
path = Hardware/Debug Probe/debugprobe
12+
url = https://github.com/raspberrypi/debugprobe

‎Hardware/Debug Probe/debugprobe‎

Submodule debugprobe added at 4ec1b76

‎Hardware/Expansions/PS2 Input/firmware.propan‎

Lines changed: 164 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@ const PS2_RX_WORD_SIZE = 11 // 1 Start + 8 Data + 1 Parity + 1 Stop
77
const PS2_TX_WORD_SIZE = 12 // 1 Start + 8 Data + 1 Parity + 1 Stop + 1 Acknowledge
88

99
// Number of cpu clocks until a true timeout is detected
10-
const PS2_BIT_RCV_TIMEOUT_TICKS = ticks(CLK, us=2500)
10+
const PS2_BIT_RCV_TIMEOUT_TICKS = ticks(CLK, us=2500)
1111

1212
const USART_RX_MODE = P_TRUE_A | P_LOCAL_A | P_INVERT_B | P_PLUS1_B | P_PASS_AB | P_LOGIC_A | P_SYNC_IO | P_TRUE_IN | P_TRUE_OUTPUT | P_HIGH_FLOAT | P_LOW_FAST | P_TT_10 | P_SYNC_RX
1313
const CLOCK_TIMEOUT_MODE = P_TRUE_A | P_LOCAL_A | P_PASS_AB | P_LOGIC_A | P_SYNC_IO | P_TRUE_IN | P_TRUE_OUTPUT | P_HIGH_FLOAT | P_LOW_FAST | P_TT_00 | P_EVENTS_TICKS
@@ -32,51 +32,144 @@ entry:
3232
MOV config_base, PTRB // MODULE.CODE_BASE
3333
ADD config_base, aug(0x800)
3434

35-
MOV fifo, &input_fifo
36-
MOV fifo_address, config_base // MODULE.FIFO[0]
35+
MOV fifo, &input_fifo0
36+
MOV fifo_address, config_base // MODULE.FIFO[0]
3737
CALL fifo_init
3838

39-
MOV fifo, &output_fifo
40-
MOV fifo_address, config_base
41-
ADD fifo_address, 4 * FIFO_CONFIG_SIZE // MODULE.FIFO[4]
39+
MOV fifo, &input_fifo1
40+
ADD fifo_address, FIFO_CONFIG_SIZE // MODULE.FIFO[1]
41+
CALL fifo_init
42+
43+
MOV fifo, &input_fifo2
44+
ADD fifo_address, FIFO_CONFIG_SIZE // MODULE.FIFO[2]
45+
CALL fifo_init
46+
47+
MOV fifo, &input_fifo3
48+
ADD fifo_address, FIFO_CONFIG_SIZE // MODULE.FIFO[3]
49+
CALL fifo_init
50+
51+
MOV fifo, &output_fifo0
52+
ADD fifo_address, FIFO_CONFIG_SIZE // MODULE.FIFO[4]
53+
CALL fifo_init
54+
55+
MOV fifo, &output_fifo1
56+
ADD fifo_address, FIFO_CONFIG_SIZE // MODULE.FIFO[5]
57+
CALL fifo_init
58+
59+
MOV fifo, &output_fifo2
60+
ADD fifo_address, FIFO_CONFIG_SIZE // MODULE.FIFO[6]
61+
CALL fifo_init
62+
63+
MOV fifo, &output_fifo3
64+
ADD fifo_address, FIFO_CONFIG_SIZE // MODULE.FIFO[7]
4265
CALL fifo_init
4366

4467
// compute the I/O pins from COGID
45-
COGID PS2_DAT
46-
SUB PS2_DAT, 1 // subtract 1 as we're using pins 0...7 with module 1
47-
SHL PS2_DAT, 3 // multiply with 8 to get base pin
48-
ADD PS2_DAT, 0 // 32 => 36
68+
COGID PS2_DAT_BASE
69+
SUB PS2_DAT_BASE, 1 // subtract 1 as we're using pins 0...7 with module 1
70+
SHL PS2_DAT_BASE, 3 // multiply with 8 to get base pin
71+
ADD PS2_DAT_BASE, 0 // 32 => 36
4972

50-
MOV PS2_CLK, PS2_DAT
51-
ADD PS2_CLK, 1 // 32 => 33
73+
MOV PS2_CLK_BASE, PS2_DAT_BASE
74+
ADD PS2_CLK_BASE, 1 // 32 => 33
5275

53-
CALL setup_rx_mode
76+
MOV PS2_DAT, PS2_DAT_BASE
77+
MOV PS2_CLK, PS2_CLK_BASE
78+
CALL setup_rx_mode
79+
80+
ADD PS2_DAT, 2
81+
ADD PS2_CLK, 2
82+
CALL setup_rx_mode
83+
84+
ADD PS2_DAT, 2
85+
ADD PS2_CLK, 2
86+
CALL setup_rx_mode
87+
88+
ADD PS2_DAT, 2
89+
ADD PS2_CLK, 2
90+
CALL setup_rx_mode
5491

5592
main_loop:
93+
// group 0
94+
MOV PS2_DAT, PS2_DAT_BASE
95+
MOV PS2_CLK, PS2_CLK_BASE
96+
MOV send_buffer, send_buffer0
97+
MOV output_fifo, &output_fifo0
98+
5699
TESTP PS2_CLK :wc // poll for CLK timeout
57-
if(c) JMP reset_usart
100+
if(c) CALL reset_usart
58101

59102
TESTP PS2_DAT :wc // poll for data
60-
if(c) JMP receive_word
103+
if(c) CALL receive_word
61104

105+
MOV send_buffer0, send_buffer
62106

63-
MOV fifo, &input_fifo
107+
// group 1
108+
ADD PS2_DAT, 2
109+
ADD PS2_CLK, 2
110+
MOV send_buffer, send_buffer1
111+
MOV output_fifo, &output_fifo1
112+
113+
TESTP PS2_CLK :wc // poll for CLK timeout
114+
if(c) CALL reset_usart
115+
116+
TESTP PS2_DAT :wc // poll for data
117+
if(c) CALL receive_word
118+
119+
MOV send_buffer1, send_buffer
120+
121+
// group 2
122+
ADD PS2_DAT, 2
123+
ADD PS2_CLK, 2
124+
MOV send_buffer, send_buffer2
125+
MOV output_fifo, &output_fifo2
126+
127+
TESTP PS2_CLK :wc // poll for CLK timeout
128+
if(c) CALL reset_usart
129+
130+
TESTP PS2_DAT :wc // poll for data
131+
if(c) CALL receive_word
132+
133+
MOV send_buffer2, send_buffer
134+
135+
// group 3
136+
ADD PS2_DAT, 2
137+
ADD PS2_CLK, 2
138+
MOV send_buffer, send_buffer3
139+
MOV output_fifo, &output_fifo3
140+
141+
TESTP PS2_CLK :wc // poll for CLK timeout
142+
if(c) CALL reset_usart
143+
144+
TESTP PS2_DAT :wc // poll for data
145+
if(c) CALL receive_word
146+
147+
MOV send_buffer3, send_buffer
148+
149+
// fetch data
150+
151+
MOV fifo, &input_fifo0
64152
CALL fifo_read_nonblocking
65-
if(!z) JMP receive_out_data
153+
if(!z) MOV send_buffer0, fifo_data
154+
if(!z) BITH send_buffer0, 31 // set MSB
66155

67-
JMP main_loop
156+
MOV fifo, &input_fifo1
157+
CALL fifo_read_nonblocking
158+
if(!z) MOV send_buffer1, fifo_data
159+
if(!z) BITH send_buffer1, 31 // set MSB
68160

69-
///
70-
/// Receives and queues data from RXD into the FIFO
71-
///
72-
receive_out_data:
73-
// mark the send buffer as ready, ignoring previously
74-
// stored bytes:
75-
MOV send_buffer_ready, 1
76-
MOV send_buffer, fifo_data
161+
MOV fifo, &input_fifo2
162+
CALL fifo_read_nonblocking
163+
if(!z) MOV send_buffer2, fifo_data
164+
if(!z) BITH send_buffer2, 31 // set MSB
165+
166+
MOV fifo, &input_fifo3
167+
CALL fifo_read_nonblocking
168+
if(!z) MOV send_buffer3, fifo_data
169+
if(!z) BITH send_buffer3, 31 // set MSB
77170

78171
JMP main_loop
79-
172+
80173
///
81174
/// Resets the USART when a timeout was detected by PS2_CLK
82175
///
@@ -87,13 +180,13 @@ reset_usart:
87180
// (synchronously)
88181
DIRL PS2_DAT
89182

90-
CMP send_buffer_ready, 0 :wz
91-
if(!z) CALL send_word
183+
BITL send_buffer, 31 :wcz // test and clear "marker" bit
184+
if(c) CALL send_word
92185

93186
// Enable smart-pin receiver again:
94187
DIRH PS2_DAT
95188

96-
JMP main_loop
189+
RET
97190

98191
///
99192
/// Sends the word stored in 'send_buffer'
@@ -115,17 +208,22 @@ send_word:
115208
BITNC send_buffer, 8 // set parity bit
116209
BITH send_buffer, bitrange(9, 10) // set stop bit and "ack" bit high
117210

211+
GETCT tmp
212+
ADDCT1 tmp, aug(ticks(CLK, us=1500))
213+
118214
MOV tmp, 11 // We transfer 8 data bits + 1 parity bit + 1 stop bit + 1 ack bit
119215
.word_loop:
120216

121217
.wait_low:
218+
JCT1 .tx_timeout
122219
TESTP PS2_CLK :wc
123220
if(c) JMP .wait_low
124221

125222
SHR send_buffer, 1 :wc
126223
DRVC PS2_DAT
127224

128225
.wait_high:
226+
JCT1 .tx_timeout
129227
TESTP PS2_CLK :wc
130228
if(!c) JMP .wait_high
131229

@@ -134,12 +232,14 @@ send_word:
134232
TESTPN PS2_DAT :wc
135233
// TODO: Evaluate ACK!
136234

137-
// mark the word as sent:
138-
MOV send_buffer_ready, 0
139-
140235
// switch back to regular receive mode by using a tail call:
141236
JMP setup_rx_mode
142237

238+
.tx_timeout:
239+
// TODO: Handle timeout
240+
241+
JMP setup_rx_mode
242+
143243
///
144244
/// Reads the received word from the USART in PS2_DAT and sends it out over TXD.
145245
///
@@ -159,25 +259,31 @@ receive_word:
159259
SHR data, 1 // drop start bit
160260
AND data, 0xFF // mask out rest of the bits
161261

162-
MOV fifo, &output_fifo
262+
MOV fifo, output_fifo
163263
MOV fifo_data, data
164264
CALL fifo_write_nonblocking
165265

166-
JMP main_loop
266+
RET
167267

168268
///
169269
/// Handle invalid frame format
170270
///
171271
receive_word_format_err:
172272
// TODO: Implement error handling
173-
JMP main_loop
273+
MOV fifo, output_fifo
274+
MOV fifo_data, 0xFF
275+
CALL fifo_write_nonblocking
276+
RET
174277

175278
///
176279
/// Handle invalid partiy error
177280
///
178281
receive_word_parity_err:
179282
// TODO: Implement error handling
180-
JMP main_loop
283+
MOV fifo, output_fifo
284+
MOV fifo_data, 0xFE
285+
CALL fifo_write_nonblocking
286+
RET
181287

182288
setup_io_mode:
183289
DIRL PS2_CLK
@@ -240,16 +346,32 @@ setup_rx_mode:
240346

241347
var data: LONG 0
242348
var tmp: LONG 0
243-
var send_buffer_ready: LONG 0
349+
350+
var send_buffer0: LONG 0
351+
var send_buffer1: LONG 0
352+
var send_buffer2: LONG 0
353+
var send_buffer3: LONG 0
354+
244355
var send_buffer: LONG 0
356+
var output_fifo: LONG 0
245357

246358
var config_base: LONG 0 // base address of config data
247-
var input_fifo: LONG 0, 0 // base address, config address
248-
var output_fifo: LONG 0, 0 // base address, config address
249359

250-
var PS2_DAT: LONG 0 // 36 ' CLK= +2
251-
var PS2_CLK: LONG 0 // 38 ' DAT= -2
360+
var input_fifo0: LONG 0, 0 // base address, config address
361+
var input_fifo1: LONG 0, 0 // base address, config address
362+
var input_fifo2: LONG 0, 0 // base address, config address
363+
var input_fifo3: LONG 0, 0 // base address, config address
364+
365+
var output_fifo0: LONG 0, 0 // base address, config address
366+
var output_fifo1: LONG 0, 0 // base address, config address
367+
var output_fifo2: LONG 0, 0 // base address, config address
368+
var output_fifo3: LONG 0, 0 // base address, config address
369+
370+
var PS2_DAT: LONG 0 // 36 ' CLK= +1
371+
var PS2_CLK: LONG 0 // 37 ' DAT= -1
252372

373+
var PS2_DAT_BASE: LONG 0 // 36 ' CLK= +1
374+
var PS2_CLK_BASE: LONG 0 // 37 ' DAT= -1
253375

254376
// #include "fifo.impl"
255377

‎Hardware/Expansions/justfile‎

Lines changed: 18 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -17,18 +17,24 @@ compile-expansion folder pid:
1717
--output "{{folder}}/eeprom.json" \
1818
"{{vendor_id}}" "{{pid}}" "{{dummy_serial}}"
1919

20-
[ -f "{{folder}}/firmware.propan" ] && propan \
21-
--output "{{folder}}/firmware.bin" \
22-
--format flat \
23-
"{{folder}}/firmware.propan" || true
24-
25-
[ -f "{{folder}}/firmware.propan" ] && ashet-exp encode \
26-
--output "{{folder}}/eeprom.bin" \
27-
--firmware "{{folder}}/firmware.bin" \
28-
"{{folder}}/eeprom.json" || true
29-
[ -f "{{folder}}/firmware.propan" ] || ashet-exp encode \
30-
--output "{{folder}}/eeprom.bin" \
31-
"{{folder}}/eeprom.json" || true
20+
rm -f "{{folder}}/eeprom.bin"
21+
rm -f "{{folder}}/firmware.bin"
22+
23+
[ -f "{{folder}}/firmware.propan" ] \
24+
&& propan \
25+
--output "{{folder}}/firmware.bin" \
26+
--format flat \
27+
"{{folder}}/firmware.propan" \
28+
&& [ -f "{{folder}}/firmware.bin" ]
29+
30+
[ -f "{{folder}}/firmware.propan" ] \
31+
&& ashet-exp encode \
32+
--output "{{folder}}/eeprom.bin" \
33+
--firmware "{{folder}}/firmware.bin" \
34+
"{{folder}}/eeprom.json" \
35+
|| ashet-exp encode \
36+
--output "{{folder}}/eeprom.bin" \
37+
"{{folder}}/eeprom.json"
3238

3339
[ -f "{{folder}}/eeprom.json" ]
3440

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