More BOM consolidation

Author: Felix "xq" Queißner

Hardware/Backplane/Backplane.kicad_pcb

@@ -16,17 +16,17 @@
       "zones": 0.6
     },
     "selection_filter": {
-      "dimensions": false,
+      "dimensions": true,
       "footprints": true,
-      "graphics": false,
-      "keepouts": false,
+      "graphics": true,
+      "keepouts": true,
       "lockedItems": false,
-      "otherItems": false,
+      "otherItems": true,
       "pads": true,
-      "text": false,
+      "text": true,
       "tracks": true,
       "vias": true,
-      "zones": false
+      "zones": true
     },
     "visible_items": [
       "vias",

Hardware/Backplane/Backplane.kicad_prl

@@ -1871,16 +1871,36 @@
 		)
 		(uuid "3ed88d4a-9fba-40b6-b986-235557e0971b")
 	)
-	(text "Programming Edge Conncetor for faster production?\n"
+	(text "TODO: Programming Edge Conncetor for faster production?\n"
 		(exclude_from_sim no)
-		(at 159.385 140.97 0)
+		(at 185.42 114.3 0)
 		(effects
 			(font
 				(size 1.27 1.27)
 			)
 		)
 		(uuid "48b930c0-6afd-4d5a-92f0-659fb80411e6")
 	)
+	(text "TODO: Create a single library for the project"
+		(exclude_from_sim no)
+		(at 179.07 104.14 0)
+		(effects
+			(font
+				(size 1.016 1.016)
+			)
+		)
+		(uuid "4b466b24-f237-40a0-bcf2-6949bd8b1dbf")
+	)
+	(text "TODO: Fix connector, make spec compliant"
+		(exclude_from_sim no)
+		(at 144.145 23.495 0)
+		(effects
+			(font
+				(size 1.016 1.016)
+			)
+		)
+		(uuid "9c8404d8-8a43-48d1-a068-93f0e92ad644")
+	)
 	(text_box "Pull to defaults even if no mainboard is available"
 		(exclude_from_sim no)
 		(at 92.71 19.05 0)

Hardware/Backplane/Backplane.kicad_sch

@@ -1143,6 +1143,16 @@
 		)
 		(uuid 8f8d157a-3cbc-4917-ba6f-8e75371321cf)
 	)
+	(text "TODO: Make footprint"
+		(exclude_from_sim no)
+		(at 76.2 27.94 0)
+		(effects
+			(font
+				(size 1.016 1.016)
+			)
+		)
+		(uuid "15871e48-09c1-402f-843f-0cf56957bb5e")
+	)
 	(text "Global Clock Generator"
 		(exclude_from_sim no)
 		(at 19.685 20.955 0)

Hardware/Backplane/clock.kicad_sch

@@ -3673,6 +3673,16 @@
 			(embedded_fonts no)
 		)
 	)
+	(text "TODO: Fix footprint"
+		(exclude_from_sim no)
+		(at 184.785 81.28 0)
+		(effects
+			(font
+				(size 1.27 1.27)
+			)
+		)
+		(uuid "3df23b0e-e60e-4145-b33f-a9c02bb0d425")
+	)
 	(text_box "Even if the Propeller 2 and the Mainboard are not clock-gated, we still pass the clock signal through an additional buffer to keep the number of AND gates per clock path identical for each clock consumer.\n\nThis way, we prevent strong phase shift of \"one propagation delay\" and replace it with only the differences in the propagation delay."
 		(exclude_from_sim no)
 		(at 80.01 152.4 0)