Problem
performance_analysis.md repeatedly claims:
"For c6288 (~86,000 transistors), vmap amortizes perfectly."
"Jacobian: ~5000x5000 sparse matrix (~86k transistors, ~5k nodes)"
Reality
parallelism_architecture.md provides the authoritative breakdown:
- 256 AND gates × 6 MOSFETs = 1,536
- 2128 NOR gates × 4 MOSFETs = 8,512
- Total: ~10,048 MOSFETs
The 86,000 figure is incorrect. Note: index.md has a related error about 86,000 nodes (tracked in #96), but this file claims 86,000 transistors — a different file and a different wrong claim.