Add PIM-ORAM files

Author: Mysigyeong

publications/pim-oram.bib

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+@INPROCEEDINGS {11391727,
+author = { Woo, Byeongsu and Duy, Kha Dinh and Han, Youngkwang and Kang, Brent Byunghoon and Lee, Hojoon },
+booktitle = { 2025 IEEE Annual Computer Security Applications Conference (ACSAC) },
+title = {{ PIM-ORAM: Towards Oblivious RAM Primitives in Commodity Processing-In-Memory }},
+year = {2025},
+volume = {},
+ISSN = {},
+pages = {1018-1033},
+abstract = { Oblivious RAM (ORAM) is theoretically proven to render memory access patterns of a computation completely uniform, mitigating memory side-channel attacks. However, it is accompanied by orders of magnitude slower memory access latency and, thus, is often impractical in many circumstances. On the other hand, Processing-In-Memory (PIM) has been advancing as a solution to accelerate memory-intensive work-loads and mitigate the memory wall problem. In this paper, we explore the new direction of in-DRAM oblivious RAM with a design named PIM-ORAM. We retrofit the currently available commodity PIM hardware to provide future direction for secure computation on PIM, and design PIM-ORAM. Our design proposes split-data ORAM, a parallelizable in-memory ORAM scheme that takes full advantage of the parallel computing power of the PIM while retaining the original security guarantee of ORAM and dealing with the constraints existing in the commodity PIM. We evaluate PIM-ORAM using the PIM -enabled testbed cloud to provide more realistic numerical values. The evaluation shows that PIM-ORAM alleviates the increase of memory bus usage and ORAM access latency when the ORAM capacity increases. },
+keywords = {Hands;Retrofit;Random access memory;Side-channel attacks;Parallel processing;Hardware;Low latency communication;Computer security},
+doi = {10.1109/ACSAC67867.2025.00083},
+url = {https://doi.ieeecomputersociety.org/10.1109/ACSAC67867.2025.00083},
+publisher = {IEEE Computer Society},
+address = {Los Alamitos, CA, USA},
+month =Dec}
+