LeanRustLisp Development Guide.rtf

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\pard\plain \ltrpar\s35\qc \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 \rtlch\fcs1 \af0\afs24\alang1025 \ltrch\fcs0 \fs24\lang1033\langfe1033\cgrid\langnp1033\langfenp1033 {
\rtlch\fcs1 \ab\af0\afs28 \ltrch\fcs0 \b\fs28\cf1\insrsid7956634\charrsid7956634 LeanRustLisp Development Guide}{\rtlch\fcs1 \ab\af0\afs28 \ltrch\fcs0 \b\fs28\cf1\insrsid7956634\charrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 The guiding idea: a language where (a)}{\rtlch\fcs1 \af0 
\ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \ai\af0 \ltrch\fcs0 \cs37\i\cf1\dbch\af31501\insrsid7956634 \hich\af0\dbch\af31501\loch\f0 types can express theorems}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}
{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 (Lean), (b)}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \ai\af0 \ltrch\fcs0 \cs37\i\cf1\dbch\af31501\insrsid7956634 \hich\af0\dbch\af31501\loch\f0 
resources are real and tracked}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 (Rust), and (c)}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 
\ai\af0 \ltrch\fcs0 \cs37\i\cf1\dbch\af31501\insrsid7956634 \hich\af0\dbch\af31501\loch\f0 the language is programmable by its users}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
(Lisp). The compiler is not your friend; it\rquote s your very expensive, very literal lawyer.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\dbch\af0\insrsid7956634 \hich\af0\dbch\af0\loch\f0 1.\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls1\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Product definition: what LRL is trying to win at}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 

\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Core goals}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls2\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Soundness you can bet a civilization on: small trusted kernel, proofs checked, no \'93trust me bro\'94
 in the core.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Systems-level performance: predictable layout, no mandatory GC, AOT compilation, good FFI.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Rust-grade resource discipline: ownership/borrowing, lifetime checking, data-race freedom in safe code.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Lean-grade specification: dependent types, inductive types, theorem proving, proof erasure.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Lisp-grade extensibility: hygienic macros, syntax as data, elaborator/tactic plugins.}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Non-goals (to keep the universe from expanding too fast)}
{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls3\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
Full type inference for dependent types everywhere. You will write annotations. The alternative is undecidability plus suffering.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Mutating dependently-typed values in-place without restrictions. Mutable typestate + dependent indices is a swamp; we\rquote 
ll do it with explicit patterns that stay decidable.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}A single \'93one ring\'94
 mechanism for metaprogramming, effects, optimization, and proofs. That path ends in a baroque compiler that no one can modify without summoning eldritch bugs.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\dbch\af0\insrsid7956634 \hich\af0\dbch\af0\loch\f0 2.\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls4\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Surface language: Lisp syntax, but not the 1970s kind}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Concrete syntax}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls5\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Default surface syntax is s-expressions.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}A notation layer can be built on top (like Lean\rquote s notation), but macros are first-class and hygienic.}{\rtlch\fcs1 \af0 
\ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Example sketch (just to anchor):}{\rtlch\fcs1 \af0 
\ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af64\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af3\hich\af3\dbch\af31501\insrsid7956634 \loch\af3\dbch\af31501\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls6\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 \hich\f2 (defn f : (\'d0
\loch\f2  (n : Nat), Vec Nat n -> Nat) (n xs) ...)}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Macros transform surface syntax to a small \'93core\'94 AST.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Macro system requirements}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls7\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Hygiene by default (no accidental capture).
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Staging: compile-time code runs in a \'93Meta\'94 phase; runtime code runs in \'93Obj\'94 phase.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Expansion is not trusted; only the kernel\rquote s type checker is trusted. If a macro generates nonsense, it won\rquote 
t typecheck. If it generates malicious nonsense, it still won\rquote t typecheck (unless you explicitly opt into}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 
\cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 unsafe}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 ).}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Practical macro split (important)}{\rtlch\fcs1 \af0 
\ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls8\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Syntax macros: purely syntactic rewriting (fast, deterministic, cacheable).
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Elaborator macros: type-directed rewriting during elaboration (powerful, but must be carefully sandboxed for IDE performance).

\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Tactic scripts: proof search / transformation in}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{
\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Prop}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 .}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\dbch\af0\insrsid7956634 \hich\af0\dbch\af0\loch\f0 3.\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls9\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 The core theory: Lean-like dependent types with an explicit effect/resource story}{\rtlch\fcs1 \af0 
\ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Kernel calculus}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls10\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Base: a Calculus of Inductive Constructions (CIC)-family dependent type theory.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls10\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Universes:}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{
\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Prop}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 ,}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}
{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Type u}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 with cumulative hierarchy.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}Inductive types:}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 
\cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Nat}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 ,}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 
\cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 List}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 ,}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 
\ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Vec}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 , user-defined inductives.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af54 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}Equality: definitional equality (\'e2/\'e9/\'e4/\'e6 reductions + unfolding rules), plus propositional equality}{\rtlch\fcs1 \af0 
\ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Eq}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 .}{\rtlch\fcs1 \af0 
\ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Proof erasure}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls11\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Terms inhabiting}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 
\af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Prop}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
are erased at runtime (like Lean).
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Extraction is correctness-preserving: runtime semantics depend only on computationally relevant terms.}{\rtlch\fcs1 \af0 
\ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Totality vs partiality (this is a key \'93
Lean meets systems\'94 pressure point)}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls12\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 The kernel needs normalization for definitional equality, which wants total/terminating computations.

\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Systems programming wants general recursion, nontermination, and effects.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 

\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 A workable design that doesn\rquote t lie:}{\rtlch\fcs1 
\af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls13\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
Total fragment: definitions used in types/definitional equality must be terminating (structural recursion / well-founded recursion).
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Partial fragment: general recursion allowed, but cannot appear in types; it lives under an effect (call it}{\rtlch\fcs1 \af0 
\ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Comp}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 
\~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 or}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 
IO}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 ).}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af3\hich\af3\dbch\af31501\insrsid7956634 \loch\af3\dbch\af31501\hich\f3 \'b7\tab}}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 
\cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 unsafe}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
fragment: FFI, raw pointers, manual memory, etc. Explicitly marked; the kernel remains sound but you can shoot your foot like an adult.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 So you get three \'93levels\'94:}{\rtlch\fcs1 \af0 
\ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af3\hich\af3\dbch\af31501\insrsid7956634 \loch\af3\dbch\af31501\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls14\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 def}{\rtlch\fcs1 \af0 
\ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 (total, can appear in types)}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af3\hich\af3\dbch\af31501\insrsid7956634 \loch\af3\dbch\af31501\hich\f3 \'b7\tab}}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 
\cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 partial def}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
(computational, cannot appear in types)}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af3\hich\af3\dbch\af31501\insrsid7956634 \loch\af3\dbch\af31501\hich\f3 \'b7\tab}}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 
\cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 unsafe def}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 (trust boundary break)}{
\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\dbch\af0\insrsid7956634 \hich\af0\dbch\af0\loch\f0 4.\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls15\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Rust inside dependent types: ownership, borrowing, lifetimes as types}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
This is the hardest part. The cleanest approach is: encode ownership with an affine/linear discipline in the type system, and implement Rust-style region inference as a specialized solver that produces proof objects (or at least checkable constraints) con
sumed by the kernel/type checker.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Core ownership model}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls16\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Values are affine by default: you can use them 0 or 1 times (dropping is allowed; destructors run).

\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Copyable values are \'93unrestricted\'94: you can duplicate them freely }{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 (}{
\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Copy}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 /}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 
\cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Dup}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 trait).
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Borrowing produces references with explicit lifetimes/regions:
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls16\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Shared:}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 
\af64\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af64\hich\af64\dbch\af31501\insrsid7956634 \hich\af64\dbch\af31501\loch\f64 \hich\f64 &'\'f1\loch\f64  A}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}Unique:}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af64\afs20 \ltrch\fcs0 
\cs38\fs20\cf1\loch\af64\hich\af64\dbch\af31501\insrsid7956634 \hich\af64\dbch\af31501\loch\f64 \hich\f64 &'\'f1\loch\f64  mut A}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls16\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Unique borrows are linear capabilities: you can\rquote t alias them.}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Region/lifetime system}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls17\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Lifetimes are first-class terms at the type level, but they are not value-dependent at runtime.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}There is a partial order (outlives relation) on regions.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}
The compiler runs a constraint solver (think Rust NLL) on a mid-level IR and produces a lifetime assignment plus justification that is checkable.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 \'93Safe code implies no UB\'94 contract}{\rtlch\fcs1 
\af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls18\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 In safe code, you cannot:
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls18\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 use-after-free
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}double-free
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}data race (with well-defined concurrency primitives)
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}violate aliasing rules}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af3\hich\af3\dbch\af31501\insrsid7956634 \loch\af3\dbch\af31501\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls18\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 unsafe}{\rtlch\fcs1 
\af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 is the only escape hatch and must be syntactically explicit.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Mutation + dependent indices: the honest story\line 
Dependent types want: mutate}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Vec A n}{\rtlch\fcs1 \af0 
\ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 into}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 
\cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Vec A (n+1)}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 .\line Rust wants:}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{
\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 &mut T}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
keeps}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 T}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 \rquote s type stable.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 You cannot have both freely without making type checking painful or unsound.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 So LRL should adopt explicit patterns:}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls19\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 In-place mutation requires stable type: if you mutate behind}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 &mut}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
, the type indices must remain definitionally equal.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}If an operation changes an index, you do it by \'93state replacement\'94:
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls19\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 take ownership, compute a new value with a new type, return it.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls19\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 For mutable containers whose size changes, hide indices behind existential packaging:}{\rtlch\fcs1 
\af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af64\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls19\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 \hich\f2 
Buffer A := \'d3\loch\f2  (n : Nat), Vec A n}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 (a sigma type)
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}Store}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 
\cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Buffer A}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
behind a pointer; updates change the hidden}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 n}{
\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 .}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 This is not a limitation; it\rquote 
s the price of not hallucinating soundness.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\dbch\af0\insrsid7956634 \hich\af0\dbch\af0\loch\f0 5.\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls20\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Effects without losing your mind: capability-based effect system}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
You need effects for I/O, concurrency, allocation, randomness, time, etc.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 A good direction:}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls21\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
Algebraic effects or a graded monad / effect row system, but with an eye on compilation and ergonomics.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Minimal core: a single}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af64\afs20 
\ltrch\fcs0 \cs38\fs20\cf1\loch\af64\hich\af64\dbch\af31501\insrsid7956634 \hich\af64\dbch\af31501\loch\f64 \hich\f64 Comp \'e5\loch\f64  A}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 computation type, where}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af64\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af64\hich\af64\dbch\af31501\insrsid7956634 \loch\af64\dbch\af31501\hich\f64 \'e5}{
\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 is an effect row (set/multiset of effects).
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Effects are introduced by primitives and eliminated by handlers/runners.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 

\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Capabilities integrate nicely with Rust-like discipline:}
{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls22\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Some effects require linear tokens (capabilities). Example:}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 World}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{
\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 token for I/O, or}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 
\hich\af2\dbch\af31501\loch\f2 Allocator}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 capability for allocation in a region.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}This makes \'93who is allowed to do what\'94 explicit and statically checkable.}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Why this matters for \'93advanced civilization\'94 vibes:
}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls23\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 You can represent \'93budget\'94
 (time, energy, memory) as a capability and make it impossible to exceed without}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 
\hich\af2\dbch\af31501\loch\f2 unsafe}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 or explicit proof.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\dbch\af0\insrsid7956634 \hich\af0\dbch\af0\loch\f0 6.\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls24\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Concurrency model: data-race freedom as a theorem, not a hope}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Safe concurrency primitives}{\rtlch\fcs1 \af0 
\ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls25\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Message passing (channels) with ownership transfer.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Shared state only via proven-safe abstractions:}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls25\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Mutex}{
\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 ,}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 
RwLock}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 , atomics with well-defined memory orderings.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls25\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Trait-like constraints:}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls25\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Send}{
\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 and}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 
\cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Sync}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
as typeclass/trait predicates that are proven/derived.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Dependent types give extra leverage}{\rtlch\fcs1 \af0 
\ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls26\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 You can encode protocols as types:
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls26\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 session types (who sends what when)
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}state machines where transitions are proven
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls26\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 But keep these as libraries, not baked into the kernel.}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\dbch\af0\insrsid7956634 \hich\af0\dbch\af0\loch\f0 7.\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls27\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Compilation pipeline: split the world into \'93trusted kernel\'94 and \'93fast compiler\'94}{
\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 A realistic architecture looks like this:}{\rtlch\fcs1 
\af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 A) Frontend}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls28\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Reader/parser: s-expressions + optional notation.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Macro expansion: hygienic, staged, produces \'93surface AST\'94.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
B) Elaborator (untrusted, but produces checkable artifacts)}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls29\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Type inference (limited, guided by annotations)
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Implicit argument insertion
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Typeclass resolution
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Tactic execution (produces proof terms)
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Desugaring pattern matching}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 C) Kernel (trusted)}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls30\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Small type checker for core calculus
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Definitional equality engine (normalization-by-evaluation is common)
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Checks all proof terms and all types
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Enforces the separation between total/partial/unsafe fragments}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 D) Ownership/lifetime checking\line Two possible designs:
}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\dbch\af0\insrsid7956634 \hich\af0\dbch\af0\loch\f0 1.\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls31\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Integrated into the typing judgments (pure type system). Elegant, but hard to engineer.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\dbch\af0\insrsid7956634 \hich\af0\dbch\af0\loch\f0 2.\tab}
Rust-style: generate a mid-level IR (LRL-MIR), run borrow checking + region inference, then emit evidence/constraints that the kernel can validate.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 I\rquote 
d pick (2) for engineering sanity. The borrow checker is complex; keeping it outside the kernel reduces trusted code size.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 E) Backend}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls32\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Lower to LLVM IR (or MLIR) for AOT compilation.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Emit debug info (DWARF), produce stable ABI for FFI.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Optionally a WASM backend.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Runtime model}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls33\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 No mandatory GC; ownership + RAII.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Optional region allocator / arena types in stdlib.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Optional tracing GC as a library for \'93high-level mode\'94 data structures (but not required).}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\dbch\af0\insrsid7956634 \hich\af0\dbch\af0\loch\f0 8.\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls34\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Module system and coherence: Rust crates + Lean namespaces, with rules}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 You want:}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls35\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Namespaces/modules like Lean for mathematical development.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Packages/crates like Rust for real software.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}A trait/typeclass system for ad-hoc polymorphism.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
But you must avoid incoherence (two instances of the same trait for same type causing ambiguity).\line A practical rule set:}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls36\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
Orphan-like rules: either the trait or the type must be defined in the current package to define an instance.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Instance resolution is deterministic and cached.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Explicit local instances allowed with lexical scoping (like Lean), but they must not leak globally without explicit export.}{
\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\dbch\af0\insrsid7956634 \hich\af0\dbch\af0\loch\f0 9.\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls37\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Tooling: if the IDE isn\rquote t good, the language is cosplay}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
Minimum viable tooling for LRL (otherwise proofs become suffering)}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls38\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 LSP server with:
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls38\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 incremental parsing
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}incremental macro expansion
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}incremental elaboration
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}goal display (proof state)
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}\'93go to definition\'94 across generated code
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls38\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Formatter (stable, deterministic)
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Doc generator that renders types, proofs, and examples
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Package manager + build tool with reproducible builds:
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls38\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 content-addressed dependencies
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}locked dependency sets
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}deterministic macro expansion (or at least pinned versions)}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\dbch\af0\insrsid7956634 \hich\af0\dbch\af0\loch\f0 10.\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls39\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Soundness + trust strategy}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Trusted Computing Base (TCB) should be tiny:}{
\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls40\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Kernel type checker + definitional equality
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}A minimal evaluator used by definitional equality (NbE engine)
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}A small set of primitives with axiomatic semantics (e.g.,}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~
}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Nat}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 , equality, inductives)}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Everything else is untrusted:}{\rtlch\fcs1 \af0 
\ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls41\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Elaborator
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Borrow checker
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Optimizer
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Macro system runtime
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Code generator}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 But \'93untrusted\'94 must still be checkable:}{
\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls42\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Elaborator emits fully explicit core terms; kernel checks them.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Borrow checker emits region/lifetime evidence or passes annotated IR to a validator.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Optimizations can be validated (optional but ideal): translation validation per pass, not \'93trust the optimizer.\'94}{
\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Now the development plan (phased, with exit criteria)}{
\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Phase 0: Foundational decisions and the boring paperwork that saves you later\line Deliverables}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls43\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Language charter: goals/non-goals, safety boundaries, total/partial/unsafe policy.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Core calculus sketch: syntax of core terms, universes, inductives, equality.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Ownership model spec: affine/linear discipline, reference types, lifetime constraints.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}\'93Minimal kernel\'94 definition: what is trusted, what isn\rquote t.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Repo layout, CI, coding standards, contribution model, license.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Exit criteria}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls44\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 A written spec that an implementer could follow without telepathy.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}A \'93hello theorem\'94 and a \'93hello systems program\'94 planned as golden tests.}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
Phase 1: Mechanize the core theory (before you implement 200k lines of wrong)\line Deliverables}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls45\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Formalization in an existing proof assistant (Lean/Coq/Agda) of:
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls45\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 core typing rules
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}definitional equality model
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}progress/preservation (type safety)
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls45\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 A model of the ownership discipline at the typing level (even simplified).}{\rtlch\fcs1 \af0 
\ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Exit criteria}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls46\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 You can prove the core is sound in the mechanized model (for the chosen subset).
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}You understand exactly which features are \'93library\'94 vs \'93kernel.\'94}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 

\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Phase 2: Kernel v0 (the sacred minimal checker)\line 
Deliverables}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls47\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Core AST representation (de Bruijn indices or locally nameless).
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Parser for a tiny core syntax (can be s-expr) that is fully explicit.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Kernel type checker for:
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af54 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls47\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 universes, \'d0-types, \'eb, application
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}inductives + pattern matching (or eliminators first)
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}definitional equality engine (NbE strongly recommended)
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls47\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Proof erasure pipeline for}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{
\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Prop}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 .}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Exit criteria}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls48\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Kernel can check small proof developments and reject incorrect ones.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Kernel is fuzz-tested: random terms don\rquote t crash it.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Kernel codebase remains small and audited.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
Phase 3: Surface language + hygienic macros (Lisp power, safely)\line Deliverables}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls49\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 S-expression reader with source spans.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Hygienic macro expander producing surface AST.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Pretty printer + error reporting infrastructure.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Deterministic expansion (same input => same expanded output).}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Exit criteria}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls50\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 You can write user-defined syntax extensions.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}The expanded program is inspectable and stable (critical for debugging).}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 

\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Phase 4: Elaborator v0 (make the language usable)\line 
Deliverables}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls51\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Elaboration from surface AST to core terms:
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls51\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 implicit arguments
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}holes/metavariables
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}unification (higher-order unification limited; use patterns + constraints)
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}typeclass/trait resolution (deterministic)
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}pattern matching compilation (to eliminators or to a core match)
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls51\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Basic tactic framework for constructing}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Prop}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{
\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 terms.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Exit criteria}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls52\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Users can write code without full explicit core terms.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}IDE can show goals and errors with reasonable locality.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Phase 5: Ownership/borrowing MVP (safe systems subset)
\line Deliverables}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls53\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Define LRL-MIR (typed mid-level IR with explicit moves/borrows).
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Implement borrow checking + region inference:
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls53\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 lexical lifetimes first, then NLL-style inference
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}generate constraints + solve
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls53\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Integrate with elaboration/type checking:
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls53\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 surface}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 
\af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 &}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 and}{\rtlch\fcs1 
\af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 &mut}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 desugar to MIR borrows
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}MIR validates and then lowers to core + evidence/annotations}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Exit criteria}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls54\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Classic Rust safety examples work:
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls54\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 no use-after-free
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}no double mutable alias
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}safe concurrency primitives enforce}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 
\ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Send/Sync}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls54\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Error messages are at least \'93Rust-quality\'94 (still painful, but actionable).}{\rtlch\fcs1 \af0 
\ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Phase 6: Effects, I/O, FFI, and the}{\rtlch\fcs1 \af0 
\ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 unsafe}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 boundary\line Deliverables}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls55\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Effect system MVP:}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af64\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls55\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 \hich\f2 Comp 
\'e5\loch\f2  A}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 + a few core effects }{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 (}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 
\cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 IO}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 ,}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 
\cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Alloc}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 ,}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 
\ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Time}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 ,}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 
\af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 Concurrency}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 )
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}effect inference (limited) and annotations
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls55\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 FFI design:}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls55\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 extern}{
\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 declarations
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}ABI spec, layout attributes
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}safe wrappers in stdlib}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af3\hich\af3\dbch\af31501\insrsid7956634 \loch\af3\dbch\af31501\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls55\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 unsafe}{\rtlch\fcs1 
\af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 blocks:
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls55\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 syntactic marker
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}linting and auditing hooks}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Exit criteria}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls56\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 You can write real programs: file I/O, networking, concurrency.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Unsafe is clearly compartmentalized.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Phase 7: Backend and performance story\line Deliverables}
{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls57\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Codegen from MIR to LLVM (or equivalent).
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Debug info, stack traces, profiling hooks.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Build tool integration: incremental compilation, caching.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Exit criteria}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls58\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Performance is within shouting distance of Rust/C for typical systems workloads.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Compiling a medium project isn\rquote t a spiritual endurance test.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Phase 8: Standard library + \'93proof + program\'94
 co-development style\line Deliverables}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls59\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Core stdlib:
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls59\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 basic types, collections, iterators
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}concurrency primitives
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}filesystem/networking wrappers
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls59\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Math/proof stdlib:
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls59\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 algebraic structures, common lemmas
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}automation tactics }{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 (}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 
\cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 simp}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 -like rewriting, decision procedures where feasible)
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls59\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Verified components as flagships:
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls59\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 verified parser combinators
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}verified bitvector library
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}verified critical algorithms (sorting, memory allocators, etc.), at least partly}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 

\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Exit criteria}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls60\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 People can build nontrivial applications without immediately writing their own universe.}{\rtlch\fcs1 
\af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Phase 9: Tooling hardening and ecosystem\line 
Deliverables}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls61\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 LSP with incremental elaboration and goal display.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Formatter + linter suite.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Package registry and reproducible builds:
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls61\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 lockfiles
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}content hashes
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}hermetic builds
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls61\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Documentation and tutorials that show the \'93LRL way\'94 (ownership + proofs together).}{\rtlch\fcs1 
\af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Exit criteria}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls62\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 New users can get productive without joining a cult or reading 800 pages of kernel code.}{\rtlch\fcs1 
\af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
Phase 10: Trust upgrades (optional but ideal): translation validation and verified kernel\line Deliverables}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls63\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Translation validation for key compiler passes:
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls63\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 each optimization pass emits a checkable equivalence witness (or runs a validator)
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls63\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Verified kernel:
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls63\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 either prove the kernel correct in another assistant
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}or implement the kernel in a proof-producing style
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls63\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Long-run: self-hosting
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}}\pard \ltrpar\s35\ql \fi-360\li1440\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx1440\wrapdefault\aspalpha\aspnum\faauto\ls63\ilvl1\adjustright\rin0\lin1440\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 write parts of compiler/stdlib in LRL
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f2\fs20\cf1\insrsid7956634 \hich\af2\dbch\af0\loch\f2 o\tab}keep the kernel minimal and auditable}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Exit criteria}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls64\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 You can plausibly claim \'93this compiler is harder to lie with,\'94
 which is exactly the kind of claim ambitious civilizations love to make before the universe punishes hubris.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
Team composition and workstreams (because this is not a one-person weekend project)}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls65\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Type theory + proof engineering: core calculus, kernel correctness, definitional equality, erasure.

\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Compiler frontend: parsing, macros, elaboration, unification, error reporting.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Borrow checker + MIR: region inference, lifetime constraints, diagnostics.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Backend: codegen, ABI, performance, debug info.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Tooling: LSP, incremental compilation, formatter, build system.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Stdlib + examples: libraries that stress every subsystem (and find your bugs first).}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Big risks and how to avoid becoming a cautionary tale}{
\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\dbch\af0\insrsid7956634 \hich\af0\dbch\af0\loch\f0 1.\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls66\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Dependent types + mutation\line Mitigation: enforce stable types under}{\rtlch\fcs1 \af0 \ltrch\fcs0 
\cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 &mut}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
; use existential packaging for changing indices; make \'93typestate transitions\'94 explicit.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\dbch\af0\insrsid7956634 \hich\af0\dbch\af0\loch\f0 2.\tab}Dependent type inference complexity\line 
Mitigation: require annotations at boundaries; keep elaboration predictable; prefer bidirectional typing; constrain unification.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\dbch\af0\insrsid7956634 \hich\af0\dbch\af0\loch\f0 3.\tab}Macro power nuking tooling\line 
Mitigation: deterministic macros, hygiene, staged compilation, caching; expose expanded code and spans.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\dbch\af0\insrsid7956634 \hich\af0\dbch\af0\loch\f0 4.\tab}Kernel bloat\line 
Mitigation: treat kernel size as sacred; push features into libraries and untrusted elaborator plugins; audit relentlessly.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\dbch\af0\insrsid7956634 \hich\af0\dbch\af0\loch\f0 5.\tab}\'93Unsafe\'94 creeping everywhere\line 
Mitigation: design safe primitives early; give people escape hatches that are still safe (arenas, verified wrappers); make unsafe noisy in tooling and CI.}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
A realistic MVP definition (the first version that proves the concept)}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}}\pard \ltrpar\s35\ql \fi-360\li720\ri0\sb100\sa100\sbauto1\saauto1\widctlpar
\jclisttab\tx720\wrapdefault\aspalpha\aspnum\faauto\ls67\adjustright\rin0\lin720\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 Total core with inductives + equality + basic tactics.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Affine ownership with}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 
\ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 &}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 /}{\rtlch\fcs1 \af0 
\ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 \cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 &mut}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 
\~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 and lifetimes (lexical first).
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}A small effectful}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af2\afs20 \ltrch\fcs0 
\cs38\fs20\cf1\loch\af2\hich\af2\dbch\af31501\insrsid7956634 \hich\af2\dbch\af31501\loch\f2 IO}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cs36\cf1\dbch\af31501\insrsid7956634 \~}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 layer.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}LLVM backend for a subset.
\par {\listtext\pard\plain\ltrpar \s35 \rtlch\fcs1 \af0 \ltrch\fcs0 \f3\fs20\cf1\insrsid7956634 \loch\af3\dbch\af0\hich\f3 \'b7\tab}Enough stdlib to write a small CLI tool plus prove a handful of nontrivial theorems about parts of it.}{\rtlch\fcs1 \af0 
\ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard \ltrpar\s35\ql \li0\ri0\sb100\sa100\sbauto1\saauto1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0\pararsid7956634 {\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 That\rquote s the plan that gets you from \'93
funny tweet language\'94 to \'93language whose compiler can reject incorrect thoughts with prejudice.\'94}{\rtlch\fcs1 \af0 \ltrch\fcs0 \cf1\insrsid7956634 
\par }\pard\plain \ltrpar\ql \li0\ri0\sa160\sl278\slmult1\widctlpar\wrapdefault\aspalpha\aspnum\faauto\adjustright\rin0\lin0\itap0 \rtlch\fcs1 \af31507\afs24\alang1025 \ltrch\fcs0 \f31506\fs24\lang1033\langfe1033\kerning2\cgrid\langnp1033\langfenp1033 {
\rtlch\fcs1 \af31507 \ltrch\fcs0 \insrsid7956634 
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