sim_proc.cc

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <inttypes.h>
#include <vector>
#include <algorithm>
#include "sim_proc.h"

using namespace std;



struct ROB_line {
    int robL_dest;
    unsigned long robL_pc_seq;
    bool robL_ready_bit;
    void clear() { 
        robL_dest = -1;
        robL_pc_seq = 0; 
        robL_ready_bit = false; 
    }
};

struct RMT_line {
    bool rmt_validity;
    int rmt_tag;
};



proc_params params;

unsigned long Cycle = 0;
unsigned long PC_seq = 0;        
bool pipeLine_empty = false;

vector<Instruction*> DE;  // Fetch -> Decode
vector<Instruction*> RN;  // Decode -> Rename
vector<Instruction*> RR;  // Rename -> RegRead
vector<Instruction*> DI;  // RegRead -> Dispatch
vector<Instruction*> WB;  // Execute -> Writeback
vector<Instruction*> RT;  // Writeback -> Retire 

vector<Instruction*> IQ;          
vector<Instruction*> Exec_List;    

vector<struct ROB_line> ROB;              
unsigned long ROB_head = 0;
unsigned long ROB_tail = 0;

vector<struct RMT_line> RMT;              

FILE *FP;

bool end_found = false;


void Fetch();
void Decode();
void Rename();
void RegRead();
void Dispatch();
void Issue();
void Execute();
void Writeback();
void Retire();
bool Advance_Cycle();


bool cmp_inst_seq(const Instruction* a, const Instruction* b) 
{
    return a->seq_num < b->seq_num;
}



bool Advance_Cycle() 
{
    if (pipeLine_empty == true && end_found){
        return false;
    }
    else{
        return true;
    }
}




void Fetch() {
   
    if (!DE.empty() || end_found) return;

    char line[512];
    int ctr = 0;


    while (ctr < (int)params.width) 
    {
        if (fgets(line, sizeof(line), FP) == NULL) 
        {
            end_found = true;
            break;
        }

        // <type> <dst> <src1> <src2>

        int op_type = -1, dst = -1, rs1 = -1, rs2 = -1;

        unsigned long long pc_infile;
        int scanned = sscanf(line, "%llx %d %d %d %d", &pc_infile, &op_type, &dst, &rs1, &rs2);

       
        Instruction* inst = new Instruction(PC_seq, op_type, dst, rs1, rs2, PC_seq);

        inst->ft.begin_cycle = Cycle;
        inst->ft.duration = 1; 
        inst->de.begin_cycle = Cycle + 1;

        DE.push_back(inst);
        PC_seq++;
        ctr++;
    }

}

void Decode() {

    if (DE.empty() || !RN.empty()) 
    {   
        return;
    }

    for (unsigned int i =0; i< DE.size();i++) 
    {
        Instruction* inst =DE[i];
        inst->de.duration =(Cycle+1) -inst->de.begin_cycle; 
        inst->rn.begin_cycle=Cycle+1;
        RN.push_back(inst);
    }

    DE.clear();
}

void Rename() {

    if (RN.empty()||!RR.empty())
    {
        return;
    } 

    int ROBspace=0;
    unsigned long ROB_Size = params.rob_size;

    if (ROB_tail < ROB_head)
    {

        ROBspace =ROB_head -ROB_tail;
    }
    else if (ROB_head <ROB_tail) 
    {
        ROBspace = ROB_Size -(ROB_tail - ROB_head);
    }

    else {

        if (ROB_tail < ROB_Size - 1) {


            if (ROB[ROB_tail + 1].robL_dest == -1 &&
                ROB[ROB_tail + 1].robL_pc_seq == 0 &&
                ROB[ROB_tail + 1].robL_ready_bit == false)
            {
                ROBspace = ROB_Size;
            } else {
                ROBspace = 0;
            }
        } 
        else {

            if (ROB[ROB_tail - 1].robL_dest == -1 &&
                ROB[ROB_tail - 1].robL_pc_seq == 0 &&
                ROB[ROB_tail - 1].robL_ready_bit == false)
            {
                ROBspace = ROB_Size;
            } else {
                ROBspace = 0;
            }
        }
    }

    // STALL IF NO SPACE IN ROB
    if ((unsigned)ROBspace < RN.size())return;


    for (Instruction* inst :RN) {

        // FOR SRC 1
        if (inst->src1_reg != -1 && RMT[inst->src1_reg].rmt_validity) 
        {
            inst->rs1_rob_tag =RMT[inst->src1_reg].rmt_tag;
            inst->rs1_ready= ROB[inst->rs1_rob_tag].robL_ready_bit;
        } 
        
        else 
        {
            inst->rs1_ready = true;
        }

        // FOR SRC 2
        if (inst->src2_reg != -1 && RMT[inst->src2_reg].rmt_validity) 
        {
            inst->rs2_rob_tag =RMT[inst->src2_reg].rmt_tag;
            inst->rs2_ready= ROB[inst->rs2_rob_tag].robL_ready_bit;
        } 

        else 
        {
            inst->rs2_ready = true;
        }

        ROB[ROB_tail].robL_dest =inst->dest_reg;
        ROB[ROB_tail].robL_pc_seq =inst->seq_num;
        ROB[ROB_tail].robL_ready_bit =false;


        if (inst->dest_reg != -1) 
        {
            RMT[inst->dest_reg].rmt_validity =true;
            RMT[inst->dest_reg].rmt_tag= ROB_tail;
        }


        inst->rob_tag = ROB_tail;


        if (ROB_tail != ROB_Size - 1)
            ROB_tail++;
        else
            ROB_tail = 0;
        inst->rn.duration  = (Cycle + 1) - inst->rn.begin_cycle;
        inst->rr.begin_cycle = Cycle + 1;

        RR.push_back(inst);
    }

    RN.clear();
}

void RegRead() {

    if (RR.empty()|| !DI.empty())
    { 
        return;
    }    
    for (unsigned int i = 0; i < RR.size(); i++) 
    {
        Instruction* inst = RR[i];

        if (inst->rs1_rob_tag != -1) {
            if (ROB[inst->rs1_rob_tag].robL_ready_bit) inst->rs1_ready = true;
        }

        if (inst->rs2_rob_tag != -1) {
            if (ROB[inst->rs2_rob_tag].robL_ready_bit) inst->rs2_ready = true;
        }

        inst->di.begin_cycle = Cycle + 1;
        inst->rr.duration = inst->di.begin_cycle - inst->rr.begin_cycle;

        DI.push_back(inst);
    }
    RR.clear();
}

void Dispatch() {

     if (DI.empty())
     { 
        return;
    }  

    unsigned long freeIQ =params.iq_size -IQ.size();
    if (freeIQ >= DI.size()) 
    {
        for (unsigned int i=0;i< DI.size();i++) 
        {
            Instruction* inst=DI[i];
            inst->is.begin_cycle =Cycle +1;
            inst->di.duration =inst->is.begin_cycle-inst->di.begin_cycle;
            IQ.push_back(inst);
        }
        DI.clear();
    } 
}

void Issue() {
    
    if (IQ.empty()) return;

    sort(IQ.begin(),IQ.end(),cmp_inst_seq);

    int issued = 0;

    int width = (int)params.width;
    bool progress = true;
    while (issued < width && progress) 
    {
        progress = false;
        for (unsigned int j = 0; j < IQ.size(); j++) 
        {
            Instruction* inst = IQ[j];
            if (inst->rs1_ready && inst->rs2_ready)
             {
                inst->ex.begin_cycle = Cycle + 1;
                inst->is.duration = inst->ex.begin_cycle - inst->is.begin_cycle; 
                Exec_List.push_back(inst);
                IQ.erase(IQ.begin() + j);
                issued++;
                progress = true;
                break; 
            }
        }
    }
}

void Execute() {
    if (Exec_List.empty()) return;

 
    for (unsigned int i = 0; i < Exec_List.size(); i++) 
    {
        Instruction* inst = Exec_List[i];
        inst->exec_timer--;
    }

    bool progress = true;
    while (progress) {
        progress = false;
        for (unsigned int i = 0; i < Exec_List.size(); i++) {
            Instruction* inst = Exec_List[i];
            if (inst->exec_timer == 0) {

                inst->wb.begin_cycle = Cycle + 1;
                inst->ex.duration = inst->wb.begin_cycle - inst->ex.begin_cycle; 

                WB.push_back(inst);

                int dst_rob_tag = inst->rob_tag; 

                for (unsigned int x = 0; x < IQ.size(); x++) 
                {
                    if (IQ[x]->rs1_rob_tag ==dst_rob_tag) IQ[x]->rs1_ready =true;
                    if (IQ[x]->rs2_rob_tag ==dst_rob_tag) IQ[x]->rs2_ready =true;
                }

                for (unsigned int y = 0; y < DI.size(); y++) 
                {
                    if (DI[y]->rs1_rob_tag ==dst_rob_tag) DI[y]->rs1_ready =true;
                    if (DI[y]->rs2_rob_tag ==dst_rob_tag) DI[y]->rs2_ready =true;
                }

                for (unsigned int z = 0; z < RR.size(); z++) 
                {
                    if (RR[z]->rs1_rob_tag ==dst_rob_tag) RR[z]->rs1_ready =true;
                    if (RR[z]->rs2_rob_tag ==dst_rob_tag) RR[z]->rs2_ready =true;
                }

            
                Exec_List.erase(Exec_List.begin() + i);
                progress = true;
                break;
            }
        }
    }
}

void Writeback() {
    if (WB.empty())
    {
        return;
    }

    for (unsigned int i = 0; i < WB.size(); i++)
    {
        Instruction* inst = WB[i];

        int rtag = inst->rob_tag;
        if (rtag >= 0 && (unsigned)rtag < params.rob_size) 
        {
            ROB[rtag].robL_ready_bit = true;
        }
        inst->rt.begin_cycle = Cycle + 1;
        inst->wb.duration = inst->rt.begin_cycle - inst->wb.begin_cycle; 
        RT.push_back(inst);
    }

    WB.clear();
}

void Retire(){
    int i = 0;
    int width = (int)params.width;

    while (i < width)
    {
        if (ROB_head == ROB_tail && ROB_head != (long)(params.rob_size - 1)) 
        {
            if (ROB[ROB_head + 1].robL_pc_seq == 0) return;
        }


        if (ROB[ROB_head].robL_ready_bit) 
        {
            
            for (unsigned int j = 0; j < RR.size(); j++) 
            {
                if (RR[j]->rs1_rob_tag == (int)ROB_head) 
                {
                    RR[j]->rs1_ready = true;
                }

                if (RR[j]->rs2_rob_tag == (int)ROB_head) 
                {
                    RR[j]->rs2_ready = true;
                }
            }


            unsigned long head_pc = ROB[ROB_head].robL_pc_seq;
            for (unsigned int x = 0; x < RT.size(); x++) 
            {
                if (RT[x]->seq_num ==head_pc) 
                {
                    RT[x]->rt.duration = (Cycle +1) -RT[x]->rt.begin_cycle;

                    printf("%lu fu{%d} src{%d,%d} dst{%d} FE{%lu,%lu} DE{%lu,%lu} RN{%lu,%lu} RR{%lu,%lu} DI{%lu,%lu} IS{%lu,%lu} EX{%lu,%lu} WB{%lu,%lu} RT{%lu,%lu}\n",
                        RT[x]->seq_num,
                        RT[x]->op_type,
                        RT[x]->src1_reg, RT[x]->src2_reg,

                        (ROB[ROB_head].robL_dest == -1 ? -1 : ROB[ROB_head].robL_dest),
                        RT[x]->ft.begin_cycle, RT[x]->ft.duration,
                        RT[x]->de.begin_cycle, RT[x]->de.duration,
                        RT[x]->rn.begin_cycle, RT[x]->rn.duration,
                        RT[x]->rr.begin_cycle, RT[x]->rr.duration,
                        RT[x]->di.begin_cycle, RT[x]->di.duration,
                        RT[x]->is.begin_cycle, RT[x]->is.duration,
                        RT[x]->ex.begin_cycle, RT[x]->ex.duration,
                        RT[x]->wb.begin_cycle, RT[x]->wb.duration,
                        RT[x]->rt.begin_cycle, RT[x]->rt.duration
                    );

                    delete RT[x]; 
                    RT.erase(RT.begin()+x);
                    break;
                }
            }

            for (unsigned int z = 0; z < RMT.size(); z++) 
            {
                if (RMT[z].rmt_validity && RMT[z].rmt_tag ==(int)ROB_head) 
                {
                    RMT[z].rmt_tag= -1;
                    RMT[z].rmt_validity= false;
                }
            }

            ROB[ROB_head].clear();

            if ((unsigned)ROB_head != params.rob_size - 1) ROB_head++;
            else ROB_head = 0;

            i++;
        } 
        else 
        {
            break;
        }
    }
}


int main(int argc, char* argv[]) {
    
    if (argc != 5) {
        printf("Usage: %s <ROB_SIZE> <IQ_SIZE> <WIDTH> <tracefile>\n", argv[0]);
        return 1;
    }

    params.rob_size = strtoul(argv[1], NULL, 10);
    params.iq_size  = strtoul(argv[2], NULL, 10);
    params.width    = strtoul(argv[3], NULL, 10);
    char *trace = argv[4];

    Cycle = 0;
    PC_seq = 0;
    pipeLine_empty = false;
    end_found = false;


    ROB.resize(params.rob_size);
    for (unsigned long i = 0; i < params.rob_size; i++) {
        ROB[i].clear();
    }

    RMT.resize(67);
    for (unsigned i = 0; i < 67; i++) {
        RMT[i].rmt_validity = false;
        RMT[i].rmt_tag = -1;
    }
;


    FP = fopen(trace, "r");
    if (FP == NULL) {
        printf("Error: Unable to open file %s\n", trace);
        return 1;
    }

    
    while (Advance_Cycle()) {
        Retire();
        Writeback();
        Execute();
        Issue();
        Dispatch();
        RegRead();
        Rename();
        Decode();
        Fetch();


        if (DE.empty() && RN.empty() && RR.empty() && DI.empty() && IQ.size() == 0 && Exec_List.size() == 0 && WB.size() == 0) {

            if (ROB_head == ROB_tail) {
                if (ROB[ROB_tail].robL_pc_seq == 0)
                    pipeLine_empty = true;
            }
        }

        Cycle++;
        
        if (feof(FP)) end_found = true;
    }

    printf("# === Simulator Command =========\n# ");
    for (int i = 0; i < argc; i++) {
        printf("%s ", argv[i]);
    }
    printf("\n# === Processor Configuration ===\n");
    printf("# ROB_SIZE = %lu\n", params.rob_size);
    printf("# IQ_SIZE  = %lu\n", params.iq_size);
    printf("# WIDTH    = %lu\n", params.width);
    printf("# === Simulation Results ========\n");

    printf("# Dynamic Instruction Count    = %lu\n", PC_seq);
    printf("# Cycles                       = %lu\n", Cycle);
    if (Cycle > 0) printf("# Instructions Per Cycle (IPC)  = %.2f\n", (double)PC_seq / (double)Cycle);
    else printf("# Instructions Per Cycle (IPC)  = 0.00\n");


    return 0;
}