From 0d6af7e7b1d2fcc98f815e223b933f0f26a1d702 Mon Sep 17 00:00:00 2001 From: dzarista Date: Wed, 20 May 2026 17:14:57 +0000 Subject: [PATCH 1/2] Saint Paul pm-config support --- .../configs/saintpaul/platform_manager.json | 904 ++++++++++++++++++ 1 file changed, 904 insertions(+) create mode 100644 fboss/platform/configs/saintpaul/platform_manager.json diff --git a/fboss/platform/configs/saintpaul/platform_manager.json b/fboss/platform/configs/saintpaul/platform_manager.json new file mode 100644 index 0000000000000..2397d780048b4 --- /dev/null +++ b/fboss/platform/configs/saintpaul/platform_manager.json @@ -0,0 +1,904 @@ +{ + "platformName": "SAINTPAUL", + "rootPmUnitName": "SCM", + "rootSlotType": "SCM_SLOT", + "slotTypeConfigs": { + "SCM_SLOT": { + "numOutgoingI2cBuses": 0, + "idpromConfig": { + "busName": "SMBus I801 adapter at 1000", + "address": "0x50", + "kernelDeviceName": "24c512", + "offset": 15360 + }, + "pmUnitName": "SCM" + }, + "SMB_SLOT": { + "numOutgoingI2cBuses": 4, + "idpromConfig": { + "busName": "INCOMING@0", + "address": "0x50", + "kernelDeviceName": "24c512", + "offset": 15360 + }, + "pmUnitName": "SMB" + }, + "PSU_SLOT": { + "numOutgoingI2cBuses": 1, + "pmUnitName": "PSU" + }, + "FAN_SLOT": { + "numOutgoingI2cBuses": 0, + "pmUnitName": "FAN" + } + }, + "pmUnitConfigs": { + "SCM": { + "pluggedInSlotType": "SCM_SLOT", + "i2cDeviceConfigs": [ + { + "busName": "SCM_I2C_MASTER_0@0", + "address": "0x40", + "kernelDeviceName": "pmbus", + "pmUnitScopedName": "SCM_MPS_PMBUS" + }, + { + "busName": "SCM_I2C_MASTER_0@0", + "address": "0x48", + "kernelDeviceName": "lm75", + "pmUnitScopedName": "SCM_INLET" + } + ], + "outgoingSlotConfigs": { + "SMB_SLOT@0": { + "slotType": "SMB_SLOT", + "outgoingI2cBusNames": [ + "SCM_I2C_MASTER_1@0", + "SCM_I2C_MASTER_1@1", + "SCM_I2C_MASTER_1@2", + "SCM_I2C_MASTER_1@3" + ] + } + }, + "pciDeviceConfigs": [ + { + "pmUnitScopedName": "SCM_FPGA", + "vendorId": "0x3475", + "deviceId": "0x0001", + "subSystemVendorId": "0x3475", + "subSystemDeviceId": "0x0008", + "i2cAdapterBlockConfigs": [ + { + "pmUnitScopedNamePrefix": "SCM_I2C_MASTER", + "deviceName": "i2c_master", + "csrOffsetCalc": "0x8000 + ({adapterIndex} - {startAdapterIndex})*0x80", + "startAdapterIndex": 0, + "numAdapters": 2, + "numBusesPerAdapter": 8 + } + ], + "spiMasterConfigs": [], + "sysLedCtrlConfigs": [ + { + "pmUnitScopedName": "SYSTEM_STATUS_LED", + "deviceName": "sys_led", + "csrOffset": "0x6050" + }, + { + "pmUnitScopedName": "FAN_STATUS_LED", + "deviceName": "fan_led", + "csrOffset": "0x6060" + }, + { + "pmUnitScopedName": "PSU_STATUS_LED", + "deviceName": "psu_led", + "csrOffset": "0x6070" + } + ], + "infoRomConfigs": [ + { + "pmUnitScopedName": "SCM_FPGA_INFO_ROM", + "deviceName": "fpga_info_iob", + "csrOffset": "0x100" + } + ], + "miscCtrlConfigs": [ + { + "pmUnitScopedName": "SCM_ADC", + "deviceName": "adc", + "csrOffset": "0x7300" + } + ] + } + ], + "embeddedSensorConfigs": [ + { + "pmUnitScopedName": "CPU_CORE_TEMP", + "sysfsPath": "/sys/bus/platform/devices/coretemp.0" + }, + { + "pmUnitScopedName": "NVME_TEMP", + "sysfsPath": "/sys/class/nvme/nvme0" + } + ] + }, + "SMB": { + "pluggedInSlotType": "SMB_SLOT", + "i2cDeviceConfigs": [ + { + "busName": "INCOMING@0", + "address": "0x23", + "kernelDeviceName": "fbg_smbcpld", + "pmUnitScopedName": "SMB_CPLD", + "cpldSysfsAttrs": [ + { + "name": "cpld_sub_ver", + "regAddr": "0x00", + "numBits": 8, + "description": "CPLD sub version" + }, + { + "name": "cpld_ver", + "regAddr": "0x01", + "numBits": 8, + "description": "CPLD major version" + }, + { + "name": "switch_card_pwr_status", + "regAddr": "0x05", + "flags": [ + "show_notes" + ], + "description": "0: switch card power bad\n1: switch card power good" + }, + { + "name": "scd_config_done", + "regAddr": "0x0A", + "flags": [ + "show_notes" + ], + "description": "0: SCD FPGA configuration not done yet\n1: SCD FPGA configuration done" + } + ] + }, + { + "busName": "INCOMING@0", + "address": "0x24", + "kernelDeviceName": "fbcpld_generic", + "pmUnitScopedName": "CHASSIS_CPLD", + "cpldSysfsAttrs": [ + { + "name": "cpld_sub_ver", + "regAddr": "0x00", + "numBits": 8, + "description": "CPLD sub version" + }, + { + "name": "cpld_ver", + "regAddr": "0x01", + "numBits": 8, + "description": "CPLD major version" + }, + { + "name": "switch_card_pwr_status", + "regAddr": "0x05", + "flags": [ + "show_notes" + ], + "description": "0: switch card power bad\n1: switch card power good" + }, + { + "name": "cpu1_pwr_status", + "regAddr": "0x05", + "bitOffset": 1, + "flags": [ + "show_notes" + ], + "description": "0: CPU1 Power not OK\n1: CPU1 Power OK" + }, + { + "name": "jtag_mux_en", + "mode": "rw", + "regAddr": "0x0C", + "bitOffset": 4, + "flags": [ + "show_notes" + ], + "description": "0: Disable MUX select (default)\n1: Enable MUX select" + }, + { + "name": "jtag_mux_sel", + "mode": "rw", + "regAddr": "0x0C", + "numBits": 4, + "flags": [ + "show_notes" + ], + "description": "0x0: SCD1 (default)\n0x1: SCD2\n0x2: FanCard\n0x3: SwitchCard\n0x4: PCIe Switch\n0x5-0xF: N/A" + }, + { + "name": "psu1_present", + "regAddr": "0xC0", + "flags": [ + "show_notes" + ], + "description": "0: PSU1 not present\n1: PSU1 present" + }, + { + "name": "psu2_present", + "regAddr": "0xC0", + "bitOffset": 1, + "flags": [ + "show_notes" + ], + "description": "0: PSU2 not present\n1: PSU2 present" + }, + { + "name": "psu3_present", + "regAddr": "0xC0", + "bitOffset": 2, + "flags": [ + "show_notes" + ], + "description": "0: PSU3 not present\n1: PSU3 present" + }, + { + "name": "psu4_present", + "regAddr": "0xC0", + "bitOffset": 3, + "flags": [ + "show_notes" + ], + "description": "0: PSU4 not present\n1: PSU4 present" + }, + { + "name": "psu1_input_ok", + "regAddr": "0xC1", + "flags": [ + "show_notes" + ], + "description": "0: PSU1 input not OK\n1: PSU1 input OK" + }, + { + "name": "psu2_input_ok", + "regAddr": "0xC1", + "bitOffset": 1, + "flags": [ + "show_notes" + ], + "description": "0: PSU2 input not OK\n1: PSU2 input OK" + }, + { + "name": "psu3_input_ok", + "regAddr": "0xC1", + "bitOffset": 2, + "flags": [ + "show_notes" + ], + "description": "0: PSU3 input not OK\n1: PSU3 input OK" + }, + { + "name": "psu4_input_ok", + "regAddr": "0xC1", + "bitOffset": 3, + "flags": [ + "show_notes" + ], + "description": "0: PSU4 input not OK\n1: PSU4 input OK" + }, + { + "name": "psu1_output_ok", + "regAddr": "0xC2", + "flags": [ + "show_notes" + ], + "description": "0: PSU1 output not OK\n1: PSU1 output OK" + }, + { + "name": "psu2_output_ok", + "regAddr": "0xC2", + "bitOffset": 1, + "flags": [ + "show_notes" + ], + "description": "0: PSU2 output not OK\n1: PSU2 output OK" + }, + { + "name": "psu3_output_ok", + "regAddr": "0xC2", + "bitOffset": 2, + "flags": [ + "show_notes" + ], + "description": "0: PSU3 output not OK\n1: PSU3 output OK" + }, + { + "name": "psu4_output_ok", + "regAddr": "0xC2", + "bitOffset": 3, + "flags": [ + "show_notes" + ], + "description": "0: PSU4 output not OK\n1: PSU4 output OK" + } + ] + }, + { + "busName": "INCOMING@0", + "address": "0x74", + "kernelDeviceName": "pca9539", + "pmUnitScopedName": "SMB_PCA", + "isGpioChip": true + }, + { + "busName": "INCOMING@2", + "address": "0x53", + "kernelDeviceName": "24c512", + "pmUnitScopedName": "CHASSIS_EEPROM", + "isEeprom": true, + "eepromOffset": 15360 + }, + { + "busName": "INCOMING@1", + "address": "0x11", + "kernelDeviceName": "aucd90320", + "pmUnitScopedName": "SMB_CP_DPM" + }, + { + "busName": "INCOMING@1", + "address": "0x13", + "kernelDeviceName": "aucd90320", + "pmUnitScopedName": "SMB_DP_DPM0" + }, + { + "busName": "INCOMING@1", + "address": "0x31", + "kernelDeviceName": "aucd90320", + "pmUnitScopedName": "SMB_DP_DPM1" + }, + { + "busName": "INCOMING@2", + "address": "0x75", + "kernelDeviceName": "pca9548", + "pmUnitScopedName": "PSU_MUX", + "numOutgoingChannels": 8 + }, + { + "busName": "INCOMING@3", + "address": "0x48", + "kernelDeviceName": "lm75", + "pmUnitScopedName": "FAN_BOARD" + }, + { + "busName": "INCOMING@3", + "address": "0x60", + "kernelDeviceName": "bwp_fan_cpld", + "pmUnitScopedName": "FAN_CPLD" + }, + { + "busName": "SMB_I2C_MASTER_0@0", + "address": "0x1c", + "kernelDeviceName": "amax31732", + "pmUnitScopedName": "SMB_DUAL_CORE" + }, + { + "busName": "SMB_I2C_MASTER_0@0", + "address": "0x1e", + "kernelDeviceName": "amax31732", + "pmUnitScopedName": "SMB_JE0_PERIPH" + }, + { + "busName": "SMB_I2C_MASTER_0@0", + "address": "0x4c", + "kernelDeviceName": "amax31732", + "pmUnitScopedName": "SMB_JE1_PERIPH" + }, + { + "busName": "SMB_I2C_MASTER_0@1", + "address": "0x32", + "kernelDeviceName": "amax20830", + "pmUnitScopedName": "SMB_JE0_0V75HBM0" + }, + { + "busName": "SMB_I2C_MASTER_0@1", + "address": "0x34", + "kernelDeviceName": "amax20830", + "pmUnitScopedName": "SMB_JE0_0V4HBM0" + }, + { + "busName": "SMB_I2C_MASTER_0@2", + "address": "0x32", + "kernelDeviceName": "amax20830", + "pmUnitScopedName": "SMB_JE1_0V75HBM0" + }, + { + "busName": "SMB_I2C_MASTER_0@2", + "address": "0x34", + "kernelDeviceName": "amax20830", + "pmUnitScopedName": "SMB_JE1_0V4HBM0" + }, + { + "busName": "SMB_I2C_MASTER_0@3", + "address": "0x4c", + "kernelDeviceName": "raa228228", + "pmUnitScopedName": "SMB_JE0_MCORE" + }, + { + "busName": "SMB_I2C_MASTER_0@3", + "address": "0x4e", + "kernelDeviceName": "raa228228", + "pmUnitScopedName": "SMB_POS3V3_PORTS" + }, + { + "busName": "SMB_I2C_MASTER_0@3", + "address": "0x54", + "kernelDeviceName": "bp4a_isl68226", + "pmUnitScopedName": "SMB_JE0_PCORES_1V1HBM" + }, + { + "busName": "SMB_I2C_MASTER_0@3", + "address": "0x55", + "kernelDeviceName": "bp4a_isl68226", + "pmUnitScopedName": "SMB_JE0_PCORE_0V75A_0V72A" + }, + { + "busName": "SMB_I2C_MASTER_0@3", + "address": "0x56", + "kernelDeviceName": "bp4a_isl68226", + "pmUnitScopedName": "SMB_JE0_PCORE_0V9A_1V8" + }, + { + "busName": "SMB_I2C_MASTER_0@4", + "address": "0x4c", + "kernelDeviceName": "raa228228", + "pmUnitScopedName": "SMB_JE1_MCORE" + }, + { + "busName": "SMB_I2C_MASTER_0@4", + "address": "0x54", + "kernelDeviceName": "bp4a_isl68226", + "pmUnitScopedName": "SMB_JE1_PCORES_1V1HBM" + }, + { + "busName": "SMB_I2C_MASTER_0@4", + "address": "0x55", + "kernelDeviceName": "bp4a_isl68226", + "pmUnitScopedName": "SMB_JE1_PCORE_0V75A_0V72A" + }, + { + "busName": "SMB_I2C_MASTER_0@4", + "address": "0x56", + "kernelDeviceName": "bp4a_isl68226", + "pmUnitScopedName": "SMB_JE1_PCORE_0V9A_1V8" + }, + { + "busName": "SMB_I2C_MASTER_10@0", + "address": "0x22", + "kernelDeviceName": "pcal6534", + "pmUnitScopedName": "SMB_J4_PUC_GPIO", + "isGpioChip": true + }, + { + "busName": "SMB_I2C_MASTER_10@3", + "address": "0x33", + "kernelDeviceName": "amax20830", + "pmUnitScopedName": "SMB_JE0_0V75HBM1" + }, + { + "busName": "SMB_I2C_MASTER_10@3", + "address": "0x35", + "kernelDeviceName": "amax20830", + "pmUnitScopedName": "SMB_JE0_0V4HBM1" + }, + { + "busName": "SMB_I2C_MASTER_10@4", + "address": "0x33", + "kernelDeviceName": "amax20830", + "pmUnitScopedName": "SMB_JE1_0V75HBM1" + }, + { + "busName": "SMB_I2C_MASTER_10@4", + "address": "0x35", + "kernelDeviceName": "amax20830", + "pmUnitScopedName": "SMB_JE1_0V4HBM1" + } + ], + "outgoingSlotConfigs": { + "FAN_SLOT@0": { + "slotType": "FAN_SLOT", + "presenceDetection": { + "sysfsFileHandle": { + "devicePath": "/SMB_SLOT@0/[FAN_CPLD]", + "presenceFileName": "fan1_present", + "desiredValue": 1 + } + }, + "outgoingI2cBusNames": [] + }, + "FAN_SLOT@1": { + "slotType": "FAN_SLOT", + "presenceDetection": { + "sysfsFileHandle": { + "devicePath": "/SMB_SLOT@0/[FAN_CPLD]", + "presenceFileName": "fan2_present", + "desiredValue": 1 + } + }, + "outgoingI2cBusNames": [] + }, + "FAN_SLOT@2": { + "slotType": "FAN_SLOT", + "presenceDetection": { + "sysfsFileHandle": { + "devicePath": "/SMB_SLOT@0/[FAN_CPLD]", + "presenceFileName": "fan3_present", + "desiredValue": 1 + } + }, + "outgoingI2cBusNames": [] + }, + "FAN_SLOT@3": { + "slotType": "FAN_SLOT", + "presenceDetection": { + "sysfsFileHandle": { + "devicePath": "/SMB_SLOT@0/[FAN_CPLD]", + "presenceFileName": "fan4_present", + "desiredValue": 1 + } + }, + "outgoingI2cBusNames": [] + }, + "FAN_SLOT@4": { + "slotType": "FAN_SLOT", + "presenceDetection": { + "sysfsFileHandle": { + "devicePath": "/SMB_SLOT@0/[FAN_CPLD]", + "presenceFileName": "fan5_present", + "desiredValue": 1 + } + }, + "outgoingI2cBusNames": [] + } + }, + "pciDeviceConfigs": [ + { + "pmUnitScopedName": "SMB_FPGA", + "vendorId": "0x3475", + "deviceId": "0x0001", + "subSystemVendorId": "0x3475", + "subSystemDeviceId": "0x0016", + "i2cAdapterBlockConfigs": [ + { + "pmUnitScopedNamePrefix": "SMB_I2C_MASTER", + "deviceName": "i2c_master", + "csrOffsetCalc": "0x8000 + ({adapterIndex} - {startAdapterIndex})*0x80", + "startAdapterIndex": 0, + "numAdapters": 1, + "numBusesPerAdapter": 7 + }, + { + "pmUnitScopedNamePrefix": "SMB_I2C_MASTER", + "deviceName": "i2c_master", + "csrOffsetCalc": "0x8080 + ({adapterIndex} - {startAdapterIndex})*0x80", + "startAdapterIndex": 1, + "numAdapters": 9, + "numBusesPerAdapter": 8 + }, + { + "pmUnitScopedNamePrefix": "SMB_I2C_MASTER", + "deviceName": "i2c_master", + "csrOffsetCalc": "0x8500 + ({adapterIndex} - {startAdapterIndex})*0x80", + "startAdapterIndex": 10, + "numAdapters": 1, + "numBusesPerAdapter": 5 + } + ], + "spiMasterConfigs": [ + { + "fpgaIpBlockConfig": { + "pmUnitScopedName": "SMB_SPI_MASTER0", + "deviceName": "spi_master", + "csrOffset": "0x7900" + }, + "spiDeviceConfigs": [ + { + "pmUnitScopedName": "SMB_SPI_MASTER0_DEVICE1", + "chipSelect": 0, + "modalias": "spidev", + "maxSpeedHz": 25000000 + } + ] + } + ], + "ledCtrlBlockConfigs": [ + { + "pmUnitScopedNamePrefix": "OSFP", + "deviceName": "port_led", + "csrOffsetCalc": "0x6100 + ({portNum} - {startPort})*0x10 + ({ledNum} - 1)*0x10", + "numPorts": 32, + "ledPerPort": 1, + "startPort": 1 + }, + { + "pmUnitScopedNamePrefix": "QSFP", + "deviceName": "port_led", + "csrOffsetCalc": "0x6540 + ({portNum} - {startPort})*0x10 + ({ledNum} - 1)*0x10", + "numPorts": 2, + "ledPerPort": 1, + "startPort": 33, + "lanesPerPort": 4 + } + ], + "xcvrCtrlBlockConfigs": [ + { + "pmUnitScopedNamePrefix": "OSFP", + "deviceName": "xcvr_ctrl", + "csrOffsetCalc": "0xa000 + ({portNum} - {startPort})*0x10", + "numPorts": 32, + "startPort": 1 + }, + { + "pmUnitScopedNamePrefix": "QSFP", + "deviceName": "xcvr_ctrl", + "csrOffsetCalc": "0xa440 + ({portNum} - {startPort})*0x10", + "numPorts": 2, + "startPort": 33 + } + ], + "infoRomConfigs": [ + { + "pmUnitScopedName": "SMB_FPGA_INFO_ROM", + "deviceName": "fpga_info_iob", + "csrOffset": "0x100" + } + ] + } + ] + }, + "PSU": { + "pluggedInSlotType": "PSU_SLOT", + "i2cDeviceConfigs": [ + { + "busName": "INCOMING@0", + "address": "0x58", + "kernelDeviceName": "pmbus", + "pmUnitScopedName": "PSU_PMBUS" + } + ], + "outgoingSlotConfigs": {}, + "pciDeviceConfigs": [] + }, + "FAN": { + "pluggedInSlotType": "FAN_SLOT", + "i2cDeviceConfigs": [], + "outgoingSlotConfigs": {}, + "pciDeviceConfigs": [] + } + }, + "i2cAdaptersFromCpu": [ + "SMBus I801 adapter at 1000" + ], + "symbolicLinkToDevicePath": { + "/run/devmap/fpgas/MERU_SCM_CPLD": "/[SCM_FPGA]", + "/run/devmap/fpgas/MERU_SCM_CPLD_INFO_ROM": "/[SCM_FPGA_INFO_ROM]", + "/run/devmap/inforoms/MERU_SCM_CPLD_INFO_ROM": "/[SCM_FPGA_INFO_ROM]", + "/run/devmap/i2c-busses/MERU_SCM_CPLD_SMBUS0_CH0": "/[SCM_I2C_MASTER_0@0]", + "/run/devmap/i2c-busses/MERU_SCM_CPLD_SMBUS0_CH1": "/[SCM_I2C_MASTER_0@1]", + "/run/devmap/i2c-busses/MERU_SCM_CPLD_SMBUS0_CH2": "/[SCM_I2C_MASTER_0@2]", + "/run/devmap/i2c-busses/MERU_SCM_CPLD_SMBUS0_CH3": "/[SCM_I2C_MASTER_0@3]", + "/run/devmap/i2c-busses/MERU_SCM_CPLD_SMBUS0_CH4": "/[SCM_I2C_MASTER_0@4]", + "/run/devmap/i2c-busses/MERU_SCM_CPLD_SMBUS0_CH5": "/[SCM_I2C_MASTER_0@5]", + "/run/devmap/i2c-busses/MERU_SCM_CPLD_SMBUS0_CH6": "/[SCM_I2C_MASTER_0@6]", + "/run/devmap/i2c-busses/MERU_SCM_CPLD_SMBUS0_CH7": "/[SCM_I2C_MASTER_0@7]", + "/run/devmap/i2c-busses/MERU_SCM_CPLD_SMBUS1_CH0": "/[SCM_I2C_MASTER_1@0]", + "/run/devmap/i2c-busses/MERU_SCM_CPLD_SMBUS1_CH1": "/[SCM_I2C_MASTER_1@1]", + "/run/devmap/i2c-busses/MERU_SCM_CPLD_SMBUS1_CH2": "/[SCM_I2C_MASTER_1@2]", + "/run/devmap/i2c-busses/MERU_SCM_CPLD_SMBUS1_CH3": "/[SCM_I2C_MASTER_1@3]", + "/run/devmap/i2c-busses/MERU_SCM_CPLD_SMBUS1_CH4": "/[SCM_I2C_MASTER_1@4]", + "/run/devmap/i2c-busses/MERU_SCM_CPLD_SMBUS1_CH5": "/[SCM_I2C_MASTER_1@5]", + "/run/devmap/i2c-busses/MERU_SCM_CPLD_SMBUS1_CH6": "/[SCM_I2C_MASTER_1@6]", + "/run/devmap/i2c-busses/MERU_SCM_CPLD_SMBUS1_CH7": "/[SCM_I2C_MASTER_1@7]", + "/run/devmap/eeproms/SMB_EEPROM": "/SMB_SLOT@0/[IDPROM]", + "/run/devmap/sensors/CPU_MPS_PMBUS": "/[SCM_MPS_PMBUS]", + "/run/devmap/sensors/SCM_INLET": "/[SCM_INLET]", + "/run/devmap/sensors/CPU_CORE_TEMP": "/[CPU_CORE_TEMP]", + "/run/devmap/sensors/NVME_TEMP": "/[NVME_TEMP]", + "/run/devmap/fpgas/SMB_FPGA": "/SMB_SLOT@0/[SMB_FPGA]", + "/run/devmap/fpgas/SMB_FPGA_INFO_ROM": "/SMB_SLOT@0/[SMB_FPGA_INFO_ROM]", + "/run/devmap/inforoms/SMB_FPGA_INFO_ROM": "/SMB_SLOT@0/[SMB_FPGA_INFO_ROM]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS0_CH0": "/SMB_SLOT@0/[SMB_I2C_MASTER_0@0]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS0_CH1": "/SMB_SLOT@0/[SMB_I2C_MASTER_0@1]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS0_CH2": "/SMB_SLOT@0/[SMB_I2C_MASTER_0@2]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS0_CH3": "/SMB_SLOT@0/[SMB_I2C_MASTER_0@3]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS0_CH4": "/SMB_SLOT@0/[SMB_I2C_MASTER_0@4]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS0_CH5": "/SMB_SLOT@0/[SMB_I2C_MASTER_0@5]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS0_CH6": "/SMB_SLOT@0/[SMB_I2C_MASTER_0@6]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS1_CH0": "/SMB_SLOT@0/[SMB_I2C_MASTER_1@0]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS1_CH1": "/SMB_SLOT@0/[SMB_I2C_MASTER_1@1]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS1_CH2": "/SMB_SLOT@0/[SMB_I2C_MASTER_1@2]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS1_CH3": "/SMB_SLOT@0/[SMB_I2C_MASTER_1@3]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS1_CH4": "/SMB_SLOT@0/[SMB_I2C_MASTER_1@4]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS1_CH5": "/SMB_SLOT@0/[SMB_I2C_MASTER_1@5]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS1_CH6": "/SMB_SLOT@0/[SMB_I2C_MASTER_1@6]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS1_CH7": "/SMB_SLOT@0/[SMB_I2C_MASTER_1@7]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS2_CH0": "/SMB_SLOT@0/[SMB_I2C_MASTER_2@0]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS2_CH1": "/SMB_SLOT@0/[SMB_I2C_MASTER_2@1]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS2_CH2": "/SMB_SLOT@0/[SMB_I2C_MASTER_2@2]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS2_CH3": "/SMB_SLOT@0/[SMB_I2C_MASTER_2@3]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS2_CH4": "/SMB_SLOT@0/[SMB_I2C_MASTER_2@4]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS2_CH5": "/SMB_SLOT@0/[SMB_I2C_MASTER_2@5]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS2_CH6": "/SMB_SLOT@0/[SMB_I2C_MASTER_2@6]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS2_CH7": "/SMB_SLOT@0/[SMB_I2C_MASTER_2@7]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS3_CH0": "/SMB_SLOT@0/[SMB_I2C_MASTER_3@0]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS3_CH1": "/SMB_SLOT@0/[SMB_I2C_MASTER_3@1]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS3_CH2": "/SMB_SLOT@0/[SMB_I2C_MASTER_3@2]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS3_CH3": "/SMB_SLOT@0/[SMB_I2C_MASTER_3@3]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS3_CH4": "/SMB_SLOT@0/[SMB_I2C_MASTER_3@4]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS3_CH5": "/SMB_SLOT@0/[SMB_I2C_MASTER_3@5]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS3_CH6": "/SMB_SLOT@0/[SMB_I2C_MASTER_3@6]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS3_CH7": "/SMB_SLOT@0/[SMB_I2C_MASTER_3@7]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS4_CH0": "/SMB_SLOT@0/[SMB_I2C_MASTER_4@0]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS4_CH1": "/SMB_SLOT@0/[SMB_I2C_MASTER_4@1]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS4_CH2": "/SMB_SLOT@0/[SMB_I2C_MASTER_4@2]", + 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"/SMB_SLOT@0/[SMB_I2C_MASTER_8@5]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS8_CH6": "/SMB_SLOT@0/[SMB_I2C_MASTER_8@6]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS8_CH7": "/SMB_SLOT@0/[SMB_I2C_MASTER_8@7]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS9_CH0": "/SMB_SLOT@0/[SMB_I2C_MASTER_9@0]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS9_CH1": "/SMB_SLOT@0/[SMB_I2C_MASTER_9@1]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS9_CH2": "/SMB_SLOT@0/[SMB_I2C_MASTER_9@2]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS9_CH3": "/SMB_SLOT@0/[SMB_I2C_MASTER_9@3]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS9_CH4": "/SMB_SLOT@0/[SMB_I2C_MASTER_9@4]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS9_CH5": "/SMB_SLOT@0/[SMB_I2C_MASTER_9@5]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS9_CH6": "/SMB_SLOT@0/[SMB_I2C_MASTER_9@6]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS9_CH7": "/SMB_SLOT@0/[SMB_I2C_MASTER_9@7]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS10_CH0": "/SMB_SLOT@0/[SMB_I2C_MASTER_10@0]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS10_CH1": "/SMB_SLOT@0/[SMB_I2C_MASTER_10@1]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS10_CH2": "/SMB_SLOT@0/[SMB_I2C_MASTER_10@2]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS10_CH3": "/SMB_SLOT@0/[SMB_I2C_MASTER_10@3]", + "/run/devmap/i2c-busses/SMB_FPGA_SMBUS10_CH4": "/SMB_SLOT@0/[SMB_I2C_MASTER_10@4]", + "/run/devmap/cplds/SMB_CPLD": "/SMB_SLOT@0/[SMB_CPLD]", + "/run/devmap/cplds/CHASSIS_CPLD": "/SMB_SLOT@0/[CHASSIS_CPLD]", + "/run/devmap/gpiochips/SMB_PCA": "/SMB_SLOT@0/[SMB_PCA]", + "/run/devmap/eeproms/CHASSIS_EEPROM": "/SMB_SLOT@0/[CHASSIS_EEPROM]", + "/run/devmap/sensors/SMB_CP_DPM": "/SMB_SLOT@0/[SMB_CP_DPM]", + "/run/devmap/sensors/SMB_DP_DPM0": "/SMB_SLOT@0/[SMB_DP_DPM0]", + "/run/devmap/sensors/SMB_DP_DPM1": "/SMB_SLOT@0/[SMB_DP_DPM1]", + "/run/devmap/sensors/FAN_BOARD": "/SMB_SLOT@0/[FAN_BOARD]", + "/run/devmap/cplds/FAN_CPLD": "/SMB_SLOT@0/[FAN_CPLD]", + "/run/devmap/sensors/FAN_CPLD": "/SMB_SLOT@0/[FAN_CPLD]", + "/run/devmap/sensors/SMB_DUAL_CORE": "/SMB_SLOT@0/[SMB_DUAL_CORE]", + "/run/devmap/sensors/SMB_JE0_PERIPH": "/SMB_SLOT@0/[SMB_JE0_PERIPH]", + "/run/devmap/sensors/SMB_JE1_PERIPH": "/SMB_SLOT@0/[SMB_JE1_PERIPH]", + "/run/devmap/sensors/SMB_JE0_0V75HBM0": "/SMB_SLOT@0/[SMB_JE0_0V75HBM0]", + "/run/devmap/sensors/SMB_JE0_0V4HBM0": "/SMB_SLOT@0/[SMB_JE0_0V4HBM0]", + "/run/devmap/sensors/SMB_JE1_0V75HBM0": "/SMB_SLOT@0/[SMB_JE1_0V75HBM0]", + "/run/devmap/sensors/SMB_JE1_0V4HBM0": "/SMB_SLOT@0/[SMB_JE1_0V4HBM0]", + "/run/devmap/sensors/SMB_JE0_MCORE": "/SMB_SLOT@0/[SMB_JE0_MCORE]", + "/run/devmap/sensors/SMB_POS3V3_PORTS": "/SMB_SLOT@0/[SMB_POS3V3_PORTS]", + "/run/devmap/sensors/SMB_JE0_PCORES_1V1HBM": "/SMB_SLOT@0/[SMB_JE0_PCORES_1V1HBM]", + "/run/devmap/sensors/SMB_JE0_PCORE_0V75A_0V72A": "/SMB_SLOT@0/[SMB_JE0_PCORE_0V75A_0V72A]", + "/run/devmap/sensors/SMB_JE0_PCORE_0V9A_1V8": "/SMB_SLOT@0/[SMB_JE0_PCORE_0V9A_1V8]", + "/run/devmap/sensors/SMB_JE1_MCORE": "/SMB_SLOT@0/[SMB_JE1_MCORE]", + "/run/devmap/sensors/SMB_JE1_PCORES_1V1HBM": "/SMB_SLOT@0/[SMB_JE1_PCORES_1V1HBM]", + "/run/devmap/sensors/SMB_JE1_PCORE_0V75A_0V72A": "/SMB_SLOT@0/[SMB_JE1_PCORE_0V75A_0V72A]", + "/run/devmap/sensors/SMB_JE1_PCORE_0V9A_1V8": "/SMB_SLOT@0/[SMB_JE1_PCORE_0V9A_1V8]", + "/run/devmap/gpiochips/SMB_J4_PUC_GPIO": "/SMB_SLOT@0/[SMB_J4_PUC_GPIO]", + "/run/devmap/sensors/SMB_JE0_0V75HBM1": "/SMB_SLOT@0/[SMB_JE0_0V75HBM1]", + "/run/devmap/sensors/SMB_JE0_0V4HBM1": "/SMB_SLOT@0/[SMB_JE0_0V4HBM1]", + "/run/devmap/sensors/SMB_JE1_0V75HBM1": "/SMB_SLOT@0/[SMB_JE1_0V75HBM1]", + "/run/devmap/sensors/SMB_JE1_0V4HBM1": "/SMB_SLOT@0/[SMB_JE1_0V4HBM1]", + "/run/devmap/flashes/SMB_SPI_MASTER0_DEVICE1": "/SMB_SLOT@0/[SMB_SPI_MASTER0_DEVICE1]", + "/run/devmap/xcvrs/xcvr_io_1": "/SMB_SLOT@0/[SMB_I2C_MASTER_3@0]", + "/run/devmap/xcvrs/xcvr_ctrl_1": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_1]", + "/run/devmap/xcvrs/xcvr_io_2": "/SMB_SLOT@0/[SMB_I2C_MASTER_3@1]", + "/run/devmap/xcvrs/xcvr_ctrl_2": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_2]", + "/run/devmap/xcvrs/xcvr_io_3": "/SMB_SLOT@0/[SMB_I2C_MASTER_3@2]", + "/run/devmap/xcvrs/xcvr_ctrl_3": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_3]", + "/run/devmap/xcvrs/xcvr_io_4": "/SMB_SLOT@0/[SMB_I2C_MASTER_3@3]", + "/run/devmap/xcvrs/xcvr_ctrl_4": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_4]", + "/run/devmap/xcvrs/xcvr_io_5": "/SMB_SLOT@0/[SMB_I2C_MASTER_3@4]", + "/run/devmap/xcvrs/xcvr_ctrl_5": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_5]", + "/run/devmap/xcvrs/xcvr_io_6": "/SMB_SLOT@0/[SMB_I2C_MASTER_3@5]", + "/run/devmap/xcvrs/xcvr_ctrl_6": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_6]", + "/run/devmap/xcvrs/xcvr_io_7": "/SMB_SLOT@0/[SMB_I2C_MASTER_3@6]", + "/run/devmap/xcvrs/xcvr_ctrl_7": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_7]", + "/run/devmap/xcvrs/xcvr_io_8": "/SMB_SLOT@0/[SMB_I2C_MASTER_3@7]", + "/run/devmap/xcvrs/xcvr_ctrl_8": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_8]", + "/run/devmap/xcvrs/xcvr_io_9": "/SMB_SLOT@0/[SMB_I2C_MASTER_4@0]", + "/run/devmap/xcvrs/xcvr_ctrl_9": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_9]", + "/run/devmap/xcvrs/xcvr_io_10": "/SMB_SLOT@0/[SMB_I2C_MASTER_4@1]", + "/run/devmap/xcvrs/xcvr_ctrl_10": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_10]", + "/run/devmap/xcvrs/xcvr_io_11": "/SMB_SLOT@0/[SMB_I2C_MASTER_4@2]", + "/run/devmap/xcvrs/xcvr_ctrl_11": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_11]", + "/run/devmap/xcvrs/xcvr_io_12": "/SMB_SLOT@0/[SMB_I2C_MASTER_4@3]", + "/run/devmap/xcvrs/xcvr_ctrl_12": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_12]", + "/run/devmap/xcvrs/xcvr_io_13": "/SMB_SLOT@0/[SMB_I2C_MASTER_4@4]", + "/run/devmap/xcvrs/xcvr_ctrl_13": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_13]", + "/run/devmap/xcvrs/xcvr_io_14": "/SMB_SLOT@0/[SMB_I2C_MASTER_4@5]", + "/run/devmap/xcvrs/xcvr_ctrl_14": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_14]", + "/run/devmap/xcvrs/xcvr_io_15": "/SMB_SLOT@0/[SMB_I2C_MASTER_4@6]", + "/run/devmap/xcvrs/xcvr_ctrl_15": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_15]", + "/run/devmap/xcvrs/xcvr_io_16": "/SMB_SLOT@0/[SMB_I2C_MASTER_4@7]", + "/run/devmap/xcvrs/xcvr_ctrl_16": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_16]", + "/run/devmap/xcvrs/xcvr_io_17": "/SMB_SLOT@0/[SMB_I2C_MASTER_5@0]", + "/run/devmap/xcvrs/xcvr_ctrl_17": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_17]", + "/run/devmap/xcvrs/xcvr_io_18": "/SMB_SLOT@0/[SMB_I2C_MASTER_5@1]", + "/run/devmap/xcvrs/xcvr_ctrl_18": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_18]", + "/run/devmap/xcvrs/xcvr_io_19": "/SMB_SLOT@0/[SMB_I2C_MASTER_5@2]", + "/run/devmap/xcvrs/xcvr_ctrl_19": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_19]", + "/run/devmap/xcvrs/xcvr_io_20": "/SMB_SLOT@0/[SMB_I2C_MASTER_5@3]", + "/run/devmap/xcvrs/xcvr_ctrl_20": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_20]", + "/run/devmap/xcvrs/xcvr_io_21": "/SMB_SLOT@0/[SMB_I2C_MASTER_5@4]", + "/run/devmap/xcvrs/xcvr_ctrl_21": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_21]", + "/run/devmap/xcvrs/xcvr_io_22": "/SMB_SLOT@0/[SMB_I2C_MASTER_5@5]", + "/run/devmap/xcvrs/xcvr_ctrl_22": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_22]", + "/run/devmap/xcvrs/xcvr_io_23": "/SMB_SLOT@0/[SMB_I2C_MASTER_5@6]", + "/run/devmap/xcvrs/xcvr_ctrl_23": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_23]", + "/run/devmap/xcvrs/xcvr_io_24": "/SMB_SLOT@0/[SMB_I2C_MASTER_5@7]", + "/run/devmap/xcvrs/xcvr_ctrl_24": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_24]", + "/run/devmap/xcvrs/xcvr_io_25": "/SMB_SLOT@0/[SMB_I2C_MASTER_6@0]", + "/run/devmap/xcvrs/xcvr_ctrl_25": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_25]", + "/run/devmap/xcvrs/xcvr_io_26": "/SMB_SLOT@0/[SMB_I2C_MASTER_6@1]", + "/run/devmap/xcvrs/xcvr_ctrl_26": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_26]", + "/run/devmap/xcvrs/xcvr_io_27": "/SMB_SLOT@0/[SMB_I2C_MASTER_6@2]", + "/run/devmap/xcvrs/xcvr_ctrl_27": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_27]", + "/run/devmap/xcvrs/xcvr_io_28": "/SMB_SLOT@0/[SMB_I2C_MASTER_6@3]", + "/run/devmap/xcvrs/xcvr_ctrl_28": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_28]", + "/run/devmap/xcvrs/xcvr_io_29": "/SMB_SLOT@0/[SMB_I2C_MASTER_6@4]", + "/run/devmap/xcvrs/xcvr_ctrl_29": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_29]", + "/run/devmap/xcvrs/xcvr_io_30": "/SMB_SLOT@0/[SMB_I2C_MASTER_6@5]", + "/run/devmap/xcvrs/xcvr_ctrl_30": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_30]", + "/run/devmap/xcvrs/xcvr_io_31": "/SMB_SLOT@0/[SMB_I2C_MASTER_6@6]", + "/run/devmap/xcvrs/xcvr_ctrl_31": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_31]", + "/run/devmap/xcvrs/xcvr_io_32": "/SMB_SLOT@0/[SMB_I2C_MASTER_6@7]", + "/run/devmap/xcvrs/xcvr_ctrl_32": "/SMB_SLOT@0/[OSFP_XCVR_CTRL_PORT_32]", + "/run/devmap/xcvrs/xcvr_io_33": "/SMB_SLOT@0/[SMB_I2C_MASTER_7@6]", + "/run/devmap/xcvrs/xcvr_ctrl_33": "/SMB_SLOT@0/[QSFP_XCVR_CTRL_PORT_33]", + "/run/devmap/xcvrs/xcvr_io_34": "/SMB_SLOT@0/[SMB_I2C_MASTER_7@7]", + "/run/devmap/xcvrs/xcvr_ctrl_34": "/SMB_SLOT@0/[QSFP_XCVR_CTRL_PORT_34]" + }, + "chassisEepromDevicePath": "/SMB_SLOT@0/[CHASSIS_EEPROM]", + "numXcvrs": 34, + "bspKmodsRpmName": "arista_bsp_kmods", + "bspKmodsRpmVersion": "0.7.22-1", + "requiredKmodsToLoad": [ + "spidev", + "i2c_i801", + "scd", + "ledtrig_timer" + ] +} From 35b33ef8ccb03b01350a7241881813421fe59fab Mon Sep 17 00:00:00 2001 From: Daniel Zhu Date: Wed, 20 May 2026 12:58:43 -0500 Subject: [PATCH 2/2] Bump kmods version --- fboss/platform/configs/saintpaul/platform_manager.json | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fboss/platform/configs/saintpaul/platform_manager.json b/fboss/platform/configs/saintpaul/platform_manager.json index 2397d780048b4..7054d072c17ce 100644 --- a/fboss/platform/configs/saintpaul/platform_manager.json +++ b/fboss/platform/configs/saintpaul/platform_manager.json @@ -894,7 +894,7 @@ "chassisEepromDevicePath": "/SMB_SLOT@0/[CHASSIS_EEPROM]", "numXcvrs": 34, "bspKmodsRpmName": "arista_bsp_kmods", - "bspKmodsRpmVersion": "0.7.22-1", + "bspKmodsRpmVersion": "0.7.23-1", "requiredKmodsToLoad": [ "spidev", "i2c_i801",