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Copy pathDMA.cpp
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Copy pathDMA.cpp
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489 lines (409 loc) · 20.5 KB
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//
// DMA.cpp
// SDL3Test
//
// Created by Matt Parsons on 06/03/2026.
//
#include "DMA.hpp"
#include "m68k.h"
#include "Gayle.hpp"
#include "SDL3/SDL.h"
static Gayle* bus;
void CopperAndBlitter(){
if((bus->chipset->dmacon & 0x280) == 0x280){
if(bus->chipset->copper.Execute()){return;};
}
//do blitter when we have a cycle accurate one
if((bus->chipset->dmacon & 0x4240) == 0x4240){
bus->chipset->blitter.Instant();
return;
}
}
void CPUAccess(){
bus->Service();
}
int DMAThread(void* data){
bus = (Gayle*)data;
int* colorClock = &bus->chipset->denise.ColorClock;
int* hLine = &bus->chipset->denise.Hline;
uint16_t* dmacon = &bus->chipset->dmacon;
uint64_t cycles = 0;
auto Bpl1Fetch = [](void){
int addr = bus->chipset->denise.bpl1pt;
bus->chipset->denise.bpl1pt += 2;
bus->chipset->denise.BPL1DAT(true, bus->chipram->Read16(addr));
};
auto Bpl2Fetch = [](void){
int addr = bus->chipset->denise.bpl2pt;
bus->chipset->denise.bpl2pt += 2;
bus->chipset->denise.bplxdat[1] = bus->chipram->Read16(addr);
};
auto Bpl3Fetch = [](void){
int addr = bus->chipset->denise.bpl3pt;
bus->chipset->denise.bpl3pt += 2;
bus->chipset->denise.bplxdat[2] = bus->chipram->Read16(addr);
};
auto Bpl4Fetch = [](void){
int addr = bus->chipset->denise.bpl4pt;
bus->chipset->denise.bpl4pt += 2;
bus->chipset->denise.bplxdat[3] = bus->chipram->Read16(addr);
};
auto Bpl5Fetch = [](void){
int addr = bus->chipset->denise.bpl5pt;
bus->chipset->denise.bpl5pt += 2;
bus->chipset->denise.bplxdat[4] = bus->chipram->Read16(addr);
};
auto Bpl6Fetch = [](void){
int addr = bus->chipset->denise.bpl6pt;
bus->chipset->denise.bpl6pt += 2;
bus->chipset->denise.bplxdat[5] = bus->chipram->Read16(addr);
};
while(1){
bool fetchActive = false;
int fetchOffset = 0;
for(*colorClock = 0; *colorClock < 228; ++(*colorClock)){
int cc = *colorClock;
bool slotUsed = false;
// --- Bitplane DMA (highest priority) ---
// Read current register state each slot so Copper changes take effect immediately
bool bplDMAon = (*dmacon & 0x300) == 0x300;
bool verticalDMA = (*hLine > bus->chipset->denise.vstart && *hLine <= bus->chipset->denise.vstop);
int dffstrt = bus->chipset->denise.dffstrt;
int dffstop = bus->chipset->denise.dffstop;
// Start fetching when we hit dffstrt
if(!fetchActive && bplDMAon && verticalDMA && cc == dffstrt){
fetchActive = true;
fetchOffset = 0;
}
if(fetchActive){
int planes = bus->chipset->denise.planeCount();
bool hires = bus->chipset->denise.isHires();
if(hires){
// Hires: 8-slot pattern (4-slot repeated twice): BPL4,BPL3,BPL2,BPL1, BPL4,BPL3,BPL2,BPL1
int phase = fetchOffset & 7;
switch(phase){
case 0:
if(planes > 3){ Bpl4Fetch(); slotUsed = true; }
break;
case 1:
if(planes > 2){ Bpl3Fetch(); slotUsed = true; }
break;
case 2:
if(planes > 1){ Bpl2Fetch(); slotUsed = true; }
break;
case 3:
if(planes > 0){ Bpl1Fetch(); slotUsed = true; }
break;
case 4:
if(planes > 3){ Bpl4Fetch(); slotUsed = true; }
break;
case 5:
if(planes > 2){ Bpl3Fetch(); slotUsed = true; }
break;
case 6:
if(planes > 1){ Bpl2Fetch(); slotUsed = true; }
break;
case 7:
if(planes > 0){ Bpl1Fetch(); slotUsed = true; }
break;
}
fetchOffset = (fetchOffset + 1) & 7;
// Group complete — decide whether to stop or continue
if(fetchOffset == 0){
if(cc >= dffstop){
bus->chipset->denise.applyModulos();
fetchActive = false;
}
}
}else{
// Lowres: 8-slot pattern: free, BPL4, BPL6, BPL2, free, BPL3, BPL5, BPL1
int phase = fetchOffset & 7;
switch(phase){
case 0: // free slot (Copper/Blitter)
break;
case 1:
if(planes > 3){ Bpl4Fetch(); slotUsed = true; }
break;
case 2:
if(planes > 5){ Bpl6Fetch(); slotUsed = true; }
break;
case 3:
if(planes > 1){ Bpl2Fetch(); slotUsed = true; }
break;
case 4: // free slot (CPU)
break;
case 5:
if(planes > 2){ Bpl3Fetch(); slotUsed = true; }
break;
case 6:
if(planes > 4){ Bpl5Fetch(); slotUsed = true; }
break;
case 7:
if(planes > 0){ Bpl1Fetch(); slotUsed = true; }
break;
}
fetchOffset = (fetchOffset + 1) & 7;
// Group complete — decide whether to stop or continue
if(fetchOffset == 0){
if(cc >= dffstop){
bus->chipset->denise.applyModulos();
fetchActive = false;
}
}
}
}
// --- Sprite DMA (only if bitplane didn't use this slot) ---
if(!slotUsed && (*dmacon & 0x220) == 0x220){
//Sprite 0: slots 21 and 23
if(cc == 21){
if(!bus->chipset->denise.sprite[0].armed){
int addr = bus->chipset->denise.sprite[0].pt;
bus->chipset->denise.sprite[0].pt += 2;
bus->chipset->denise.SPRxPOS(0, true, bus->chipram->Read16(addr));
addr = bus->chipset->denise.sprite[0].pt;
bus->chipset->denise.sprite[0].pt += 2;
bus->chipset->denise.SPRxCTL(0, true, bus->chipram->Read16(addr));
slotUsed = true;
} else if(*hLine >= bus->chipset->denise.sprite[0].vstart && *hLine <= bus->chipset->denise.sprite[0].vstop){
int addr = bus->chipset->denise.sprite[0].pt;
bus->chipset->denise.sprite[0].pt += 2;
bus->chipset->denise.sprite[0].dat[0] = bus->chipram->Read16(addr);
slotUsed = true;
}
}
if(cc == 23){
if(bus->chipset->denise.sprite[0].armed){
if(*hLine >= bus->chipset->denise.sprite[0].vstart && *hLine <= bus->chipset->denise.sprite[0].vstop){
int addr = bus->chipset->denise.sprite[0].pt;
bus->chipset->denise.sprite[0].pt += 2;
bus->chipset->denise.SPRxDATB(0, true, bus->chipram->Read16(addr));
slotUsed = true;
}
}
}
//Sprite 1: slots 25 and 27
if(cc == 25){
if(!bus->chipset->denise.sprite[1].armed){
int addr = bus->chipset->denise.sprite[1].pt;
bus->chipset->denise.sprite[1].pt += 2;
bus->chipset->denise.SPRxPOS(1, true, bus->chipram->Read16(addr));
addr = bus->chipset->denise.sprite[1].pt;
bus->chipset->denise.sprite[1].pt += 2;
bus->chipset->denise.SPRxCTL(1, true, bus->chipram->Read16(addr));
slotUsed = true;
} else if(*hLine >= bus->chipset->denise.sprite[1].vstart && *hLine <= bus->chipset->denise.sprite[1].vstop){
int addr = bus->chipset->denise.sprite[1].pt;
bus->chipset->denise.sprite[1].pt += 2;
bus->chipset->denise.sprite[1].dat[0] = bus->chipram->Read16(addr);
slotUsed = true;
}
}
if(cc == 27){
if(bus->chipset->denise.sprite[1].armed){
if(*hLine >= bus->chipset->denise.sprite[1].vstart && *hLine <= bus->chipset->denise.sprite[1].vstop){
int addr = bus->chipset->denise.sprite[1].pt;
bus->chipset->denise.sprite[1].pt += 2;
bus->chipset->denise.SPRxDATB(1, true, bus->chipram->Read16(addr));
slotUsed = true;
}
}
}
//Sprite 2: slots 29 and 31
if(cc == 29){
if(!bus->chipset->denise.sprite[2].armed){
int addr = bus->chipset->denise.sprite[2].pt;
bus->chipset->denise.sprite[2].pt += 2;
bus->chipset->denise.SPRxPOS(2, true, bus->chipram->Read16(addr));
addr = bus->chipset->denise.sprite[2].pt;
bus->chipset->denise.sprite[2].pt += 2;
bus->chipset->denise.SPRxCTL(2, true, bus->chipram->Read16(addr));
slotUsed = true;
} else if(*hLine >= bus->chipset->denise.sprite[2].vstart && *hLine <= bus->chipset->denise.sprite[2].vstop){
int addr = bus->chipset->denise.sprite[2].pt;
bus->chipset->denise.sprite[2].pt += 2;
bus->chipset->denise.sprite[2].dat[0] = bus->chipram->Read16(addr);
slotUsed = true;
}
}
if(cc == 31){
if(bus->chipset->denise.sprite[2].armed){
if(*hLine >= bus->chipset->denise.sprite[2].vstart && *hLine <= bus->chipset->denise.sprite[2].vstop){
int addr = bus->chipset->denise.sprite[2].pt;
bus->chipset->denise.sprite[2].pt += 2;
bus->chipset->denise.SPRxDATB(2, true, bus->chipram->Read16(addr));
slotUsed = true;
}
}
}
//Sprite 3: slots 33 and 35
if(cc == 33){
if(!bus->chipset->denise.sprite[3].armed){
int addr = bus->chipset->denise.sprite[3].pt;
bus->chipset->denise.sprite[3].pt += 2;
bus->chipset->denise.SPRxPOS(3, true, bus->chipram->Read16(addr));
addr = bus->chipset->denise.sprite[3].pt;
bus->chipset->denise.sprite[3].pt += 2;
bus->chipset->denise.SPRxCTL(3, true, bus->chipram->Read16(addr));
slotUsed = true;
} else if(*hLine >= bus->chipset->denise.sprite[3].vstart && *hLine <= bus->chipset->denise.sprite[3].vstop){
int addr = bus->chipset->denise.sprite[3].pt;
bus->chipset->denise.sprite[3].pt += 2;
bus->chipset->denise.sprite[3].dat[0] = bus->chipram->Read16(addr);
slotUsed = true;
}
}
if(cc == 35){
if(bus->chipset->denise.sprite[3].armed){
if(*hLine >= bus->chipset->denise.sprite[3].vstart && *hLine <= bus->chipset->denise.sprite[3].vstop){
int addr = bus->chipset->denise.sprite[3].pt;
bus->chipset->denise.sprite[3].pt += 2;
bus->chipset->denise.SPRxDATB(3, true, bus->chipram->Read16(addr));
slotUsed = true;
}
}
}
//Sprite 4: slots 37 and 39
if(cc == 37){
if(!bus->chipset->denise.sprite[4].armed){
int addr = bus->chipset->denise.sprite[4].pt;
bus->chipset->denise.sprite[4].pt += 2;
bus->chipset->denise.SPRxPOS(4, true, bus->chipram->Read16(addr));
addr = bus->chipset->denise.sprite[4].pt;
bus->chipset->denise.sprite[4].pt += 2;
bus->chipset->denise.SPRxCTL(4, true, bus->chipram->Read16(addr));
slotUsed = true;
} else if(*hLine >= bus->chipset->denise.sprite[4].vstart && *hLine <= bus->chipset->denise.sprite[4].vstop){
int addr = bus->chipset->denise.sprite[4].pt;
bus->chipset->denise.sprite[4].pt += 2;
bus->chipset->denise.sprite[4].dat[0] = bus->chipram->Read16(addr);
slotUsed = true;
}
}
if(cc == 39){
if(bus->chipset->denise.sprite[4].armed){
if(*hLine >= bus->chipset->denise.sprite[4].vstart && *hLine <= bus->chipset->denise.sprite[4].vstop){
int addr = bus->chipset->denise.sprite[4].pt;
bus->chipset->denise.sprite[4].pt += 2;
bus->chipset->denise.SPRxDATB(4, true, bus->chipram->Read16(addr));
slotUsed = true;
}
}
}
//Sprite 5: slots 41 and 43
if(cc == 41){
if(!bus->chipset->denise.sprite[5].armed){
int addr = bus->chipset->denise.sprite[5].pt;
bus->chipset->denise.sprite[5].pt += 2;
bus->chipset->denise.SPRxPOS(5, true, bus->chipram->Read16(addr));
addr = bus->chipset->denise.sprite[5].pt;
bus->chipset->denise.sprite[5].pt += 2;
bus->chipset->denise.SPRxCTL(5, true, bus->chipram->Read16(addr));
slotUsed = true;
} else if(*hLine >= bus->chipset->denise.sprite[5].vstart && *hLine <= bus->chipset->denise.sprite[5].vstop){
int addr = bus->chipset->denise.sprite[5].pt;
bus->chipset->denise.sprite[5].pt += 2;
bus->chipset->denise.sprite[5].dat[0] = bus->chipram->Read16(addr);
slotUsed = true;
}
}
if(cc == 43){
if(bus->chipset->denise.sprite[5].armed){
if(*hLine >= bus->chipset->denise.sprite[5].vstart && *hLine <= bus->chipset->denise.sprite[5].vstop){
int addr = bus->chipset->denise.sprite[5].pt;
bus->chipset->denise.sprite[5].pt += 2;
bus->chipset->denise.SPRxDATB(5, true, bus->chipram->Read16(addr));
slotUsed = true;
}
}
}
//Sprite 6: slots 45 and 47
if(cc == 45){
if(!bus->chipset->denise.sprite[6].armed){
int addr = bus->chipset->denise.sprite[6].pt;
bus->chipset->denise.sprite[6].pt += 2;
bus->chipset->denise.SPRxPOS(6, true, bus->chipram->Read16(addr));
addr = bus->chipset->denise.sprite[6].pt;
bus->chipset->denise.sprite[6].pt += 2;
bus->chipset->denise.SPRxCTL(6, true, bus->chipram->Read16(addr));
slotUsed = true;
} else if(*hLine >= bus->chipset->denise.sprite[6].vstart && *hLine <= bus->chipset->denise.sprite[6].vstop){
int addr = bus->chipset->denise.sprite[6].pt;
bus->chipset->denise.sprite[6].pt += 2;
bus->chipset->denise.sprite[6].dat[0] = bus->chipram->Read16(addr);
slotUsed = true;
}
}
if(cc == 47){
if(bus->chipset->denise.sprite[6].armed){
if(*hLine >= bus->chipset->denise.sprite[6].vstart && *hLine <= bus->chipset->denise.sprite[6].vstop){
int addr = bus->chipset->denise.sprite[6].pt;
bus->chipset->denise.sprite[6].pt += 2;
bus->chipset->denise.SPRxDATB(6, true, bus->chipram->Read16(addr));
slotUsed = true;
}
}
}
//Sprite 7: slots 49 and 51
if(cc == 49){
if(!bus->chipset->denise.sprite[7].armed){
int addr = bus->chipset->denise.sprite[7].pt;
bus->chipset->denise.sprite[7].pt += 2;
bus->chipset->denise.SPRxPOS(7, true, bus->chipram->Read16(addr));
addr = bus->chipset->denise.sprite[7].pt;
bus->chipset->denise.sprite[7].pt += 2;
bus->chipset->denise.SPRxCTL(7, true, bus->chipram->Read16(addr));
slotUsed = true;
} else if(*hLine >= bus->chipset->denise.sprite[7].vstart && *hLine <= bus->chipset->denise.sprite[7].vstop){
int addr = bus->chipset->denise.sprite[7].pt;
bus->chipset->denise.sprite[7].pt += 2;
bus->chipset->denise.sprite[7].dat[0] = bus->chipram->Read16(addr);
slotUsed = true;
}
}
if(cc == 51){
if(bus->chipset->denise.sprite[7].armed){
if(*hLine >= bus->chipset->denise.sprite[7].vstart && *hLine <= bus->chipset->denise.sprite[7].vstop){
int addr = bus->chipset->denise.sprite[7].pt;
bus->chipset->denise.sprite[7].pt += 2;
bus->chipset->denise.SPRxDATB(7, true, bus->chipram->Read16(addr));
slotUsed = true;
}
}
}
}
// --- Free slot: Copper (odd) or CPU (even) ---
if(!slotUsed){
if(cc & 1){
CopperAndBlitter();
}else{
CPUAccess();
}
}
// --- Display output (CC >= 21) ---
if(cc >= 21){
bus->chipset->denise.DisplayPixels(bplDMAon);
}
// --- CIA ticks ---
if(cycles % 5 == 0){
bus->chipset->CIAA.run();
bus->chipset->CIAB.run();
}
cycles++;
}
//End of line
bus->chipset->denise.ResetHLine();
bus->chipset->CIAB.TOD();
(*hLine) += 1;
if(*hLine > 312){
*hLine = 0;
bus->chipset->CIAA.TOD();
bus->chipset->copper.COPJMP1(true, 0);
bus->chipset->INTREQ(true, 0x8020); //VertB
// 1. Wait until the main thread gives the green light to process the next frame
std::unique_lock<std::mutex> lock(bus->chipset->frame_mtx);
bus->chipset->cv.wait(lock, []{ return bus->chipset->ready_for_next_frame; });
bus->chipset->ready_for_next_frame = false; // "Lock" the state while we work
lock.unlock();
}
}
}