From ab4f774616457e8446a26eb1e88ce78dc2af8709 Mon Sep 17 00:00:00 2001 From: Louis Vialar Date: Fri, 5 Jun 2026 19:21:38 +0200 Subject: [PATCH 1/4] riscv: fix memory unmapping --- src/arch/riscv64/mm/paging.rs | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) diff --git a/src/arch/riscv64/mm/paging.rs b/src/arch/riscv64/mm/paging.rs index 167f1099da..b35f54d8f7 100644 --- a/src/arch/riscv64/mm/paging.rs +++ b/src/arch/riscv64/mm/paging.rs @@ -135,6 +135,11 @@ impl PageTableEntry { (self.physical_address_and_flags & PageTableEntryFlags::EXECUTABLE.bits()) != 0 } + /// Mark this as an invalid (not present) entry + fn unset(&mut self) { + self.physical_address_and_flags = PhysAddr::zero(); + } + /// Mark this as a valid (present) entry and set address translation and flags. /// /// # Arguments @@ -147,6 +152,10 @@ impl PageTableEntry { physical_address.is_aligned_to(BasePageSize::SIZE), "Physical address is not on a 4 KiB page boundary (physical_address = {physical_address:#X})" ); + assert!( + !physical_address.is_null(), + "Cannot set a page table entry with null address" + ); let mut flags_to_set = flags; flags_to_set.insert(PageTableEntryFlags::VALID); @@ -377,10 +386,15 @@ impl PageTableMethods for PageTable { let index = page.table_index::(); let flush = self.entries[index].is_present(); - self.entries[index].set( - physical_address, - S::MAP_EXTRA_FLAG | PageTableEntryFlags::ACCESSED | PageTableEntryFlags::DIRTY | flags, - ); + if physical_address.is_null() { + // Clear PTE + self.entries[index].unset() + } else { + self.entries[index].set( + physical_address, + S::MAP_EXTRA_FLAG | PageTableEntryFlags::ACCESSED | PageTableEntryFlags::DIRTY | flags, + ); + } if flush { page.flush_from_tlb(); From fbeb77e80edd8abda0bc37d3a04214618631e25b Mon Sep 17 00:00:00 2001 From: Louis Vialar Date: Fri, 5 Jun 2026 19:25:05 +0200 Subject: [PATCH 2/4] aarch64: fix memory unmapping --- src/arch/aarch64/mm/paging.rs | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/src/arch/aarch64/mm/paging.rs b/src/arch/aarch64/mm/paging.rs index 61316a906a..003a1ca44b 100644 --- a/src/arch/aarch64/mm/paging.rs +++ b/src/arch/aarch64/mm/paging.rs @@ -149,6 +149,11 @@ impl PageTableEntry { (self.physical_address_and_flags & PageTableEntryFlags::TABLE_OR_4KIB_PAGE.bits()) != 0 } + /// Mark this as an invalid (not present) entry + fn unset(&mut self) { + self.physical_address_and_flags = 0; + } + /// Mark this as a valid (present) entry and set address translation and flags. /// /// # Arguments @@ -161,6 +166,10 @@ impl PageTableEntry { physical_address.is_aligned_to(BasePageSize::SIZE), "Physical address is not on a 4 KiB page boundary (physical_address = {physical_address:p})" ); + assert!( + !physical_address.is_null(), + "Cannot set a page table entry with null address" + ); let mut flags_to_set = flags; flags_to_set.insert(PageTableEntryFlags::PRESENT); @@ -414,7 +423,7 @@ impl PageTableMethods for PageTable { if flags == PageTableEntryFlags::BLANK { // in this case we unmap the pages - self.entries[index].set(physical_address, flags); + self.entries[index].unset() } else { self.entries[index].set(physical_address, S::MAP_EXTRA_FLAG | flags); } From d5f27ea0c388c0e43a4efa9cdf0042b59ad06a81 Mon Sep 17 00:00:00 2001 From: Louis Vialar Date: Fri, 5 Jun 2026 20:21:26 +0200 Subject: [PATCH 3/4] aarch64: fix --- src/arch/aarch64/mm/paging.rs | 13 ++----------- 1 file changed, 2 insertions(+), 11 deletions(-) diff --git a/src/arch/aarch64/mm/paging.rs b/src/arch/aarch64/mm/paging.rs index 003a1ca44b..92161ddeff 100644 --- a/src/arch/aarch64/mm/paging.rs +++ b/src/arch/aarch64/mm/paging.rs @@ -149,11 +149,6 @@ impl PageTableEntry { (self.physical_address_and_flags & PageTableEntryFlags::TABLE_OR_4KIB_PAGE.bits()) != 0 } - /// Mark this as an invalid (not present) entry - fn unset(&mut self) { - self.physical_address_and_flags = 0; - } - /// Mark this as a valid (present) entry and set address translation and flags. /// /// # Arguments @@ -166,10 +161,6 @@ impl PageTableEntry { physical_address.is_aligned_to(BasePageSize::SIZE), "Physical address is not on a 4 KiB page boundary (physical_address = {physical_address:p})" ); - assert!( - !physical_address.is_null(), - "Cannot set a page table entry with null address" - ); let mut flags_to_set = flags; flags_to_set.insert(PageTableEntryFlags::PRESENT); @@ -422,8 +413,8 @@ impl PageTableMethods for PageTable { } if flags == PageTableEntryFlags::BLANK { - // in this case we unmap the pages - self.entries[index].unset() + // We already unmapped the page + return; } else { self.entries[index].set(physical_address, S::MAP_EXTRA_FLAG | flags); } From 2274e53fb587c068e862bc23b5df8105c9727990 Mon Sep 17 00:00:00 2001 From: Louis Vialar Date: Fri, 5 Jun 2026 20:21:33 +0200 Subject: [PATCH 4/4] riscv64: fix --- src/arch/riscv64/mm/paging.rs | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/src/arch/riscv64/mm/paging.rs b/src/arch/riscv64/mm/paging.rs index b35f54d8f7..6ed8f99097 100644 --- a/src/arch/riscv64/mm/paging.rs +++ b/src/arch/riscv64/mm/paging.rs @@ -152,10 +152,6 @@ impl PageTableEntry { physical_address.is_aligned_to(BasePageSize::SIZE), "Physical address is not on a 4 KiB page boundary (physical_address = {physical_address:#X})" ); - assert!( - !physical_address.is_null(), - "Cannot set a page table entry with null address" - ); let mut flags_to_set = flags; flags_to_set.insert(PageTableEntryFlags::VALID); @@ -386,9 +382,9 @@ impl PageTableMethods for PageTable { let index = page.table_index::(); let flush = self.entries[index].is_present(); - if physical_address.is_null() { + if physical_address.is_null() && flags == PageTableEntryFlags::BLANK { // Clear PTE - self.entries[index].unset() + self.entries[index].unset(); } else { self.entries[index].set( physical_address,