From 569daa39127c070cc98758dea13d2a48abce1339 Mon Sep 17 00:00:00 2001
From: TaoTao-real <TaoTao-real@users.noreply.github.com>
Date: Fri, 3 Apr 2026 16:36:30 +0800
Subject: [PATCH 1/2] test(sync): add A5 TMOV col-major alignment repro samples

---
 .../test_tmov_col_major_16x1_align_a5.pto     | 12 +++++++
 .../Sync/test_tmov_col_major_16x1_align_a5.py |  6 ++++
 .../test_tmov_row_major_1x16_control_a5.pto   | 11 ++++++
 .../test_tmov_row_major_1x16_control_a5.py    |  6 ++++
 test/samples/runop.sh                         | 34 +++++++++++++++++++
 5 files changed, 69 insertions(+)
 create mode 100644 test/samples/Sync/test_tmov_col_major_16x1_align_a5.pto
 create mode 100644 test/samples/Sync/test_tmov_col_major_16x1_align_a5.py
 create mode 100644 test/samples/Sync/test_tmov_row_major_1x16_control_a5.pto
 create mode 100644 test/samples/Sync/test_tmov_row_major_1x16_control_a5.py

diff --git a/test/samples/Sync/test_tmov_col_major_16x1_align_a5.pto b/test/samples/Sync/test_tmov_col_major_16x1_align_a5.pto
new file mode 100644
index 000000000..1503da00d
--- /dev/null
+++ b/test/samples/Sync/test_tmov_col_major_16x1_align_a5.pto
@@ -0,0 +1,12 @@
+module {
+  // A5 repro case: TMOV on a 16x1 f32 col_major view.
+  // Layout stride is [1, 16], i.e. RowStride=1.
+  // On A5 TMOV_V2V this tends to hit unaligned vector accesses at i>0.
+  func.func @test_tmov_col_major_16x1_align_a5() {
+    %src = pto.alloc_tile : !pto.tile_buf<loc=vec, dtype=f32, rows=16, cols=1, v_row=16, v_col=1, blayout=col_major, slayout=none_box, fractal=512, pad=0>
+    %dst = pto.alloc_tile : !pto.tile_buf<loc=vec, dtype=f32, rows=16, cols=1, v_row=16, v_col=1, blayout=col_major, slayout=none_box, fractal=512, pad=0>
+    pto.tmov ins(%src : !pto.tile_buf<loc=vec, dtype=f32, rows=16, cols=1, v_row=16, v_col=1, blayout=col_major, slayout=none_box, fractal=512, pad=0>)
+             outs(%dst : !pto.tile_buf<loc=vec, dtype=f32, rows=16, cols=1, v_row=16, v_col=1, blayout=col_major, slayout=none_box, fractal=512, pad=0>)
+    return
+  }
+}
diff --git a/test/samples/Sync/test_tmov_col_major_16x1_align_a5.py b/test/samples/Sync/test_tmov_col_major_16x1_align_a5.py
new file mode 100644
index 000000000..7baa3c4c2
--- /dev/null
+++ b/test/samples/Sync/test_tmov_col_major_16x1_align_a5.py
@@ -0,0 +1,6 @@
+#!/usr/bin/env python3
+from pathlib import Path
+
+
+if __name__ == "__main__":
+    print(Path(__file__).with_suffix(".pto").read_text(encoding="utf-8"))
diff --git a/test/samples/Sync/test_tmov_row_major_1x16_control_a5.pto b/test/samples/Sync/test_tmov_row_major_1x16_control_a5.pto
new file mode 100644
index 000000000..654344484
--- /dev/null
+++ b/test/samples/Sync/test_tmov_row_major_1x16_control_a5.pto
@@ -0,0 +1,11 @@
+module {
+  // Control case: TMOV on a 1x16 f32 row_major view.
+  // Layout stride is [16, 1], and validRow=1.
+  func.func @test_tmov_row_major_1x16_control_a5() {
+    %src = pto.alloc_tile : !pto.tile_buf<loc=vec, dtype=f32, rows=1, cols=16, v_row=1, v_col=16, blayout=row_major, slayout=none_box, fractal=512, pad=0>
+    %dst = pto.alloc_tile : !pto.tile_buf<loc=vec, dtype=f32, rows=1, cols=16, v_row=1, v_col=16, blayout=row_major, slayout=none_box, fractal=512, pad=0>
+    pto.tmov ins(%src : !pto.tile_buf<loc=vec, dtype=f32, rows=1, cols=16, v_row=1, v_col=16, blayout=row_major, slayout=none_box, fractal=512, pad=0>)
+             outs(%dst : !pto.tile_buf<loc=vec, dtype=f32, rows=1, cols=16, v_row=1, v_col=16, blayout=row_major, slayout=none_box, fractal=512, pad=0>)
+    return
+  }
+}
diff --git a/test/samples/Sync/test_tmov_row_major_1x16_control_a5.py b/test/samples/Sync/test_tmov_row_major_1x16_control_a5.py
new file mode 100644
index 000000000..7baa3c4c2
--- /dev/null
+++ b/test/samples/Sync/test_tmov_row_major_1x16_control_a5.py
@@ -0,0 +1,6 @@
+#!/usr/bin/env python3
+from pathlib import Path
+
+
+if __name__ == "__main__":
+    print(Path(__file__).with_suffix(".pto").read_text(encoding="utf-8"))
diff --git a/test/samples/runop.sh b/test/samples/runop.sh
index bd992aeab..704dc7fd1 100755
--- a/test/samples/runop.sh
+++ b/test/samples/runop.sh
@@ -269,6 +269,12 @@ process_one_dir() {
       echo -e "${A}(${base}.py)\tSKIP\trequires --pto-arch=a3"
       continue
     fi
+    if [[ ( "$base" == "test_tmov_col_major_16x1_align_a5" || \
+            "$base" == "test_tmov_row_major_1x16_control_a5" ) && \
+          "${target_arch_lc}" != "a5" ]]; then
+      echo -e "${A}(${base}.py)\tSKIP\trequires --pto-arch=a5"
+      continue
+    fi
 
     # Some samples are expected to fail depending on the selected ptoas flags.
     #
@@ -627,6 +633,34 @@ process_one_dir() {
       fi
     fi
 
+    # A5 TMOV alignment repro/control samples:
+    # - col_major 16x1 should preserve TMOV + ColMajor tile shape in emitted C++
+    # - row_major 1x16 control should preserve TMOV + RowMajor tile shape
+    if [[ "$base" == "test_tmov_col_major_16x1_align_a5" ]]; then
+      if ! grep -Eq "\\bTMOV\\(" "$cpp"; then
+        echo -e "${A}(${base}.py)\tFAIL\tmissing TMOV() in col_major repro sample"
+        overall=1
+        continue
+      fi
+      if ! grep -Fq "Tile<TileType::Vec, float, 16, 1, BLayout::ColMajor" "$cpp"; then
+        echo -e "${A}(${base}.py)\tFAIL\tmissing 16x1 ColMajor tile in col_major repro sample"
+        overall=1
+        continue
+      fi
+    fi
+    if [[ "$base" == "test_tmov_row_major_1x16_control_a5" ]]; then
+      if ! grep -Eq "\\bTMOV\\(" "$cpp"; then
+        echo -e "${A}(${base}.py)\tFAIL\tmissing TMOV() in row_major control sample"
+        overall=1
+        continue
+      fi
+      if ! grep -Fq "Tile<TileType::Vec, float, 1, 16, BLayout::RowMajor" "$cpp"; then
+        echo -e "${A}(${base}.py)\tFAIL\tmissing 1x16 RowMajor tile in row_major control sample"
+        overall=1
+        continue
+      fi
+    fi
+
     # Regression guard for issue #185: barrier_sync must support op types
     # beyond TMATMUL/TVEC and lower to the expected per-pipe barrier.
     if [[ "$base" == "test_barrier_sync" ]]; then

From aa3155265c97ef32dd717031ad99ab06b87cef3d Mon Sep 17 00:00:00 2001
From: TaoTao-real <TaoTao-real@users.noreply.github.com>
Date: Fri, 3 Apr 2026 16:57:28 +0800
Subject: [PATCH 2/2] test(runop): fix A5 case filter unbound target_arch_lc

---
 test/samples/runop.sh | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/test/samples/runop.sh b/test/samples/runop.sh
index 704dc7fd1..a35fb5d32 100755
--- a/test/samples/runop.sh
+++ b/test/samples/runop.sh
@@ -181,9 +181,11 @@ process_one_dir() {
       fi
     done
   fi
+  local target_arch_lc
+  target_arch_lc="$(printf '%s' "$target_arch" | tr '[:upper:]' '[:lower:]')"
   local expected_vec_barrier="pipe_barrier(PIPE_V)"
   local skip_vec_barrier=0
-  if [[ "$(printf '%s' "$target_arch" | tr '[:upper:]' '[:lower:]')" == "a5" ]]; then
+  if [[ "${target_arch_lc}" == "a5" ]]; then
     skip_vec_barrier=1
   fi