Dear 7-Zip development team,
I have encountered a CPU instruction set compatibility issue when compiling 7-Zip from source:
- The current source code enables hardware AES (USE_HW_AES) and AVX/Vector AES (USE_HW_VAES) based on compiler version and certain conditional macros.
- There is no unified macro or option to explicitly disable these hardware instruction paths.
- As a result, binaries compiled on a machine with AVX/AVX2 support may fail to run on older CPUs, producing "illegal instruction" errors or SIMD type errors (e.g., unknown type '__m256i').
To improve portability, I would like to suggest:
- Provide optional macros (e.g.,
DISABLE_HW_AES / DISABLE_HW_VAES) to allow users to force-disable hardware AES and AVX AES paths at compile time.
- Ensure these macros take precedence in the conditional compilation logic, so users can generate cross-CPU compatible binaries.
- Keep the current hardware acceleration enabled by default, but allow users to choose based on target CPU capabilities.
Benefits:
- Prevent binaries compiled on newer CPUs from crashing on older CPUs.
- Improve source portability across multiple architectures and deployment environments.
- Facilitate building compatible packages for distributions and CI/CD pipelines.
Thank you for your time and for maintaining 7-Zip. I hope the team can consider adding this option to enhance cross-platform compatibility.
Best regards
Dear 7-Zip development team,
I have encountered a CPU instruction set compatibility issue when compiling 7-Zip from source:
To improve portability, I would like to suggest:
DISABLE_HW_AES/DISABLE_HW_VAES) to allow users to force-disable hardware AES and AVX AES paths at compile time.Benefits:
Thank you for your time and for maintaining 7-Zip. I hope the team can consider adding this option to enhance cross-platform compatibility.
Best regards