From 88bccbc97bff051c92e77aa05f827e80190d84e6 Mon Sep 17 00:00:00 2001 From: Charlie Jenkins Date: Thu, 5 Mar 2026 00:11:29 -0800 Subject: [PATCH 1/4] selftests: riscv: Add definition of BIT() macro The BIT() macros is used by the validate_v_ptrace() test case, but not defined. Include linux/bits.h to pull in this definition. To ensure that the header in the kernel source is used, add tools/include to the header search path. Fixes: 30eb191c895b ("selftests: riscv: verify ptrace rejects invalid vector csr inputs") Signed-off-by: Charlie Jenkins Signed-off-by: Linux RISC-V bot --- tools/testing/selftests/riscv/vector/Makefile | 2 ++ tools/testing/selftests/riscv/vector/validate_v_ptrace.c | 1 + 2 files changed, 3 insertions(+) diff --git a/tools/testing/selftests/riscv/vector/Makefile b/tools/testing/selftests/riscv/vector/Makefile index 326dafd739bf5b..92c4cfe5f34da6 100644 --- a/tools/testing/selftests/riscv/vector/Makefile +++ b/tools/testing/selftests/riscv/vector/Makefile @@ -2,6 +2,8 @@ # Copyright (C) 2021 ARM Limited # Originally tools/testing/arm64/abi/Makefile +CFLAGS += -I$(top_srcdir)/tools/include + TEST_GEN_PROGS := v_initval vstate_prctl vstate_ptrace validate_v_ptrace TEST_GEN_PROGS_EXTENDED := vstate_exec_nolibc v_exec_initval_nolibc TEST_GEN_LIBS := v_helpers.c sys_hwprobe.c diff --git a/tools/testing/selftests/riscv/vector/validate_v_ptrace.c b/tools/testing/selftests/riscv/vector/validate_v_ptrace.c index 3589549f722891..257de36274e9b4 100644 --- a/tools/testing/selftests/riscv/vector/validate_v_ptrace.c +++ b/tools/testing/selftests/riscv/vector/validate_v_ptrace.c @@ -6,6 +6,7 @@ #include #include +#include #include #include From f2fef622f91052ef58c6fa8cef271562356a07ea Mon Sep 17 00:00:00 2001 From: Charlie Jenkins Date: Thu, 5 Mar 2026 00:11:30 -0800 Subject: [PATCH 2/4] selftests: riscv: Add braces around EXPECT_EQ() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit EXPECT_EQ() expands to multiple lines, breaking up one-line if statements. This issue was not present in the patch on the mailing list but was instead introduced by the maintainer when attempting to fix up checkpatch warnings. Add braces around EXPECT_EQ() to avoid the error even though checkpatch suggests them to be removed: validate_v_ptrace.c:626:17: error: ‘else’ without a previous ‘if’ Fixes: 3789d5eecd5a ("selftests: riscv: verify syscalls discard vector context") Fixes: 30eb191c895b ("selftests: riscv: verify ptrace rejects invalid vector csr inputs") Fixes: 849f05ae1ea6 ("selftests: riscv: verify ptrace accepts valid vector csr values") Signed-off-by: Charlie Jenkins Signed-off-by: Linux RISC-V bot --- .../selftests/riscv/vector/validate_v_ptrace.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/tools/testing/selftests/riscv/vector/validate_v_ptrace.c b/tools/testing/selftests/riscv/vector/validate_v_ptrace.c index 257de36274e9b4..5724e6eb3309e5 100644 --- a/tools/testing/selftests/riscv/vector/validate_v_ptrace.c +++ b/tools/testing/selftests/riscv/vector/validate_v_ptrace.c @@ -291,10 +291,11 @@ TEST(ptrace_v_syscall_clobbering) /* verify initial vsetvli settings */ - if (is_xtheadvector_supported()) + if (is_xtheadvector_supported()) { EXPECT_EQ(5UL, regset_data->vtype); - else + } else { EXPECT_EQ(9UL, regset_data->vtype); + } EXPECT_EQ(regset_data->vlenb, regset_data->vl); EXPECT_EQ(vlenb, regset_data->vlenb); @@ -620,10 +621,11 @@ TEST_F(v_csr_invalid, ptrace_v_invalid_values) /* verify initial vsetvli settings */ - if (is_xtheadvector_supported()) + if (is_xtheadvector_supported()) { EXPECT_EQ(5UL, regset_data->vtype); - else + } else { EXPECT_EQ(9UL, regset_data->vtype); + } EXPECT_EQ(regset_data->vlenb, regset_data->vl); EXPECT_EQ(vlenb, regset_data->vlenb); @@ -828,10 +830,11 @@ TEST_F(v_csr_valid, ptrace_v_valid_values) /* verify initial vsetvli settings */ - if (is_xtheadvector_supported()) + if (is_xtheadvector_supported()) { EXPECT_EQ(5UL, regset_data->vtype); - else + } else { EXPECT_EQ(9UL, regset_data->vtype); + } EXPECT_EQ(regset_data->vlenb, regset_data->vl); EXPECT_EQ(vlenb, regset_data->vlenb); From e5ed7b5d0ec6ceb5269b9c8a067d8f6d4e5a01a6 Mon Sep 17 00:00:00 2001 From: Charlie Jenkins Date: Thu, 5 Mar 2026 00:11:31 -0800 Subject: [PATCH 3/4] riscv: ptrace: Fix BIT() compilation issues MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit BIT() is being used in ptrace.h without a definition, resulting in compilation errors in tools/testing/selftests/riscv/cfi/cfitests.c: cfitests.c:101:60: error: implicit declaration of function ‘BIT’ [-Wimplicit-function-declaration] 101 | if ((cfi_reg.cfi_status.cfi_state & CFI_ENABLE_MASK) != CFI_ENABLE_MASK) Include linux/bits.h to resolve this issue. Fixes: 2af7c9cf021c ("riscv/ptrace: expose riscv CFI status and state via ptrace and in core files") Signed-off-by: Charlie Jenkins Signed-off-by: Linux RISC-V bot --- arch/riscv/include/uapi/asm/ptrace.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/include/uapi/asm/ptrace.h b/arch/riscv/include/uapi/asm/ptrace.h index 18988a5f1a630b..5b53cea1435546 100644 --- a/arch/riscv/include/uapi/asm/ptrace.h +++ b/arch/riscv/include/uapi/asm/ptrace.h @@ -8,6 +8,7 @@ #ifndef __ASSEMBLER__ +#include #include #define PTRACE_GETFDPIC 33 From eb57545a30fdedbadad52d956b3dcdc0329612e2 Mon Sep 17 00:00:00 2001 From: Charlie Jenkins Date: Thu, 5 Mar 2026 00:11:32 -0800 Subject: [PATCH 4/4] selftests: riscv: Add license to cfi selftest The cfi selftest was missing a license so add it. Signed-off-by: Charlie Jenkins Signed-off-by: Linux RISC-V bot --- tools/testing/selftests/riscv/cfi/Makefile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tools/testing/selftests/riscv/cfi/Makefile b/tools/testing/selftests/riscv/cfi/Makefile index 96a4dc4b69c3d6..93b4738c0e2e8d 100644 --- a/tools/testing/selftests/riscv/cfi/Makefile +++ b/tools/testing/selftests/riscv/cfi/Makefile @@ -1,3 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0 + CFLAGS += $(KHDR_INCLUDES) CFLAGS += -I$(top_srcdir)/tools/include