From 2d4fcddf927223c056615660017ee104ef0357dd Mon Sep 17 00:00:00 2001 From: Linux RISC-V bot Date: Sun, 10 May 2026 02:08:11 +0000 Subject: [PATCH 01/19] Adding CI files --- .github/scripts/build_ubuntu_defconfig.sh | 29 + .github/scripts/ci/__init__.py | 2 + .github/scripts/ci/base.py | 120 + .github/scripts/ci/shelltest.py | 67 + .github/scripts/cleanup_pr.py | 238 + .github/scripts/config.json | 28 + .github/scripts/defconfig.sh | 18 + .github/scripts/kselftest.sh | 22 + .github/scripts/libhugetlbfs.sh | 31 + .github/scripts/libs/__init__.py | 6 + .github/scripts/libs/context.py | 95 + .github/scripts/libs/email.py | 66 + .github/scripts/libs/githubtool.py | 77 + .github/scripts/libs/patchwork.py | 181 + .github/scripts/libs/repotool.py | 92 + .github/scripts/libs/utils.py | 105 + .github/scripts/ltp.sh | 43 + .github/scripts/pw_ci.py | 343 + .../scripts/pw_tests/build_rv32_defconfig.sh | 26 + .../pw_tests/build_rv64_clang_allmodconfig.sh | 88 + .../pw_tests/build_rv64_gcc_allmodconfig.sh | 88 + .../build_rv64_nommu_k210_defconfig.sh | 26 + .../build_rv64_nommu_virt_defconfig.sh | 26 + .github/scripts/pw_tests/checkpatch.sh | 34 + .github/scripts/pw_tests/dtb_warn_rv64.sh | 61 + .github/scripts/pw_tests/header_inline.sh | 19 + .github/scripts/pw_tests/kdoc.sh | 50 + .github/scripts/pw_tests/module_param.sh | 21 + .github/scripts/pw_tests/verify_fixes.sh | 212 + .github/scripts/pw_tests/verify_signedoff.sh | 81 + .github/scripts/requirements.txt | 5 + .github/scripts/series.sh | 40 + .github/scripts/series/build_all.sh | 18 + .github/scripts/series/build_kernel.sh | 94 + .../scripts/series/build_only_defconfig.sh | 13 + .../scripts/series/build_only_kselftest.sh | 15 + .github/scripts/series/build_selftest.sh | 69 + .../scripts/series/generate_build_configs.sh | 36 + .github/scripts/series/generate_kconfigs.sh | 65 + .github/scripts/series/generate_metadata.py | 29 + .../series/generate_qemu_test_configs.sh | 24 + .github/scripts/series/generate_test_runs.sh | 47 + .../scripts/series/github_ci_squad_results.py | 78 + .../kconfigs/defconfig/early_boot_alternative | 2 + .../defconfig/early_boot_alternative_reloc | 3 + .../scripts/series/kconfigs/defconfig/flatmem | 3 + .../kconfigs/defconfig/hardened_usercopy_slub | 2 + .../scripts/series/kconfigs/defconfig/kasan | 2 + .../series/kconfigs/defconfig/kasan_inline | 2 + .../defconfig/kasan_sparsemem_novmemmmap | 5 + .../defconfig/kasan_sparsemem_vmemmmap | 5 + .../series/kconfigs/defconfig/kasan_vmalloc | 2 + .../scripts/series/kconfigs/defconfig/kfence | 3 + .../series/kconfigs/defconfig/legacy_sbi | 4 + .../scripts/series/kconfigs/defconfig/lockdep | 3 + .../scripts/series/kconfigs/defconfig/medany | 2 + .../scripts/series/kconfigs/defconfig/medlow | 2 + .github/scripts/series/kconfigs/defconfig/noc | 3 + .../scripts/series/kconfigs/defconfig/nosmp | 1 + .github/scripts/series/kconfigs/defconfig/pmu | 4 + .../scripts/series/kconfigs/defconfig/preempt | 2 + .../series/kconfigs/defconfig/preempt_rt | 1 + .../series/kconfigs/defconfig/qspinlock | 1 + .../series/kconfigs/defconfig/randomize_base | 2 + .../scripts/series/kconfigs/defconfig/rseq | 1 + .../series/kconfigs/defconfig/rseq_debug | 3 + .../scripts/series/kconfigs/defconfig/size | 1 + .../series/kconfigs/defconfig/sparsemem | 3 + .../series/kconfigs/defconfig/spinwait | 1 + .../series/kconfigs/defconfig/strict_rwx | 1 + .../scripts/series/kconfigs/defconfig/svnapot | 1 + .../series/kconfigs/defconfig/ticket_spinlock | 1 + .../series/kconfigs/defconfig/vmap_stack | 1 + .../scripts/series/kconfigs/ubuntu_defconfig | 5503 +++++++++++++++++ .github/scripts/series/kernel_builder.sh | 35 + .github/scripts/series/kernel_tester.sh | 43 + .github/scripts/series/kselftest_prep.sh | 10 + ...tests-bpf-Add-RISC-V-specific-config.patch | 47 + .../0002-selftests-bpf-Rename-fallback.patch | 70 + ...sts-iommu-Add-RISC-V-specific-config.patch | 30 + ...004-selftests-exec-Remove-static-pie.patch | 40 + .../0005-selftests-hid-Fix-broken-build.patch | 30 + ...Add-missing-net-lib-kselftest-target.patch | 28 + .../patches/0007-BPF-kselftest-fix.patch | 32 + .../patches/0008-BPF-selftest-install.patch | 35 + ...s-clone3-Avoid-fragile-struct-poking.patch | 66 + ...s-clone3-Avoid-fragile-struct-poking.patch | 48 + ...pf-Add-missing-per-arch-include-path.patch | 54 + .../patches/0012-Missing-iommu-config.patch | 29 + ...3-selftests-filesystems-mount-notify.patch | 34 + .../patches/0014-selftests-mm-page_frag.patch | 40 + ...sts-mount_setattr-mount_setattr_test.patch | 47 + ...0016-selftests-pid_namespace-pid_max.patch | 30 + .../0017-selftests-proc-proc-pid-vm.patch | 39 + ...-selftests-riscv-abi-pointer_masking.patch | 39 + .../series/patches/0019-selftests-ublk.patch | 31 + ...ing-utility-script-to-install-target.patch | 31 + .../series/patches/0021-ntsync-typo.patch | 25 + .github/scripts/series/post_to_squad.py | 296 + .github/scripts/series/prepare_rootfs.sh | 111 + .github/scripts/series/qemu_test_utils.sh | 95 + .github/scripts/series/selftest_builder.sh | 24 + .github/scripts/series/test_all.sh | 17 + .github/scripts/series/test_kernel.sh | 206 + .github/scripts/series/test_only_defconfig.sh | 15 + .github/scripts/series/test_only_kselftest.sh | 26 + .../scripts/series/tuxrun_to_squad_json.py | 54 + .github/scripts/series/unpack_fw.sh | 25 + .github/scripts/series/utils.sh | 48 + .github/scripts/sync.sh | 122 + .github/scripts/sync_patchwork.py | 452 ++ .github/scripts/xfstests.sh | 43 + .github/workflows/kselftest.yml | 59 + .github/workflows/patchwork.yml | 64 + .github/workflows/series.yml | 52 + .github/workflows/sync.yml | 82 + .github/workflows/testsuites.yml | 174 + 117 files changed, 11276 insertions(+) create mode 100755 .github/scripts/build_ubuntu_defconfig.sh create mode 100644 .github/scripts/ci/__init__.py create mode 100644 .github/scripts/ci/base.py create mode 100644 .github/scripts/ci/shelltest.py create mode 100755 .github/scripts/cleanup_pr.py create mode 100644 .github/scripts/config.json create mode 100755 .github/scripts/defconfig.sh create mode 100755 .github/scripts/kselftest.sh create mode 100755 .github/scripts/libhugetlbfs.sh create mode 100755 .github/scripts/libs/__init__.py create mode 100755 .github/scripts/libs/context.py create mode 100755 .github/scripts/libs/email.py create mode 100755 .github/scripts/libs/githubtool.py create mode 100755 .github/scripts/libs/patchwork.py create mode 100755 .github/scripts/libs/repotool.py create mode 100755 .github/scripts/libs/utils.py create mode 100755 .github/scripts/ltp.sh create mode 100755 .github/scripts/pw_ci.py create mode 100644 .github/scripts/pw_tests/build_rv32_defconfig.sh create mode 100644 .github/scripts/pw_tests/build_rv64_clang_allmodconfig.sh create mode 100644 .github/scripts/pw_tests/build_rv64_gcc_allmodconfig.sh create mode 100644 .github/scripts/pw_tests/build_rv64_nommu_k210_defconfig.sh create mode 100644 .github/scripts/pw_tests/build_rv64_nommu_virt_defconfig.sh create mode 100644 .github/scripts/pw_tests/checkpatch.sh create mode 100644 .github/scripts/pw_tests/dtb_warn_rv64.sh create mode 100644 .github/scripts/pw_tests/header_inline.sh create mode 100644 .github/scripts/pw_tests/kdoc.sh create mode 100644 .github/scripts/pw_tests/module_param.sh create mode 100644 .github/scripts/pw_tests/verify_fixes.sh create mode 100644 .github/scripts/pw_tests/verify_signedoff.sh create mode 100644 .github/scripts/requirements.txt create mode 100755 .github/scripts/series.sh create mode 100755 .github/scripts/series/build_all.sh create mode 100755 .github/scripts/series/build_kernel.sh create mode 100755 .github/scripts/series/build_only_defconfig.sh create mode 100755 .github/scripts/series/build_only_kselftest.sh create mode 100755 .github/scripts/series/build_selftest.sh create mode 100755 .github/scripts/series/generate_build_configs.sh create mode 100755 .github/scripts/series/generate_kconfigs.sh create mode 100644 .github/scripts/series/generate_metadata.py create mode 100644 .github/scripts/series/generate_qemu_test_configs.sh create mode 100755 .github/scripts/series/generate_test_runs.sh create mode 100644 .github/scripts/series/github_ci_squad_results.py create mode 100644 .github/scripts/series/kconfigs/defconfig/early_boot_alternative create mode 100644 .github/scripts/series/kconfigs/defconfig/early_boot_alternative_reloc create mode 100644 .github/scripts/series/kconfigs/defconfig/flatmem create mode 100644 .github/scripts/series/kconfigs/defconfig/hardened_usercopy_slub create mode 100644 .github/scripts/series/kconfigs/defconfig/kasan create mode 100644 .github/scripts/series/kconfigs/defconfig/kasan_inline create mode 100644 .github/scripts/series/kconfigs/defconfig/kasan_sparsemem_novmemmmap create mode 100644 .github/scripts/series/kconfigs/defconfig/kasan_sparsemem_vmemmmap create mode 100644 .github/scripts/series/kconfigs/defconfig/kasan_vmalloc create mode 100644 .github/scripts/series/kconfigs/defconfig/kfence create mode 100644 .github/scripts/series/kconfigs/defconfig/legacy_sbi create mode 100644 .github/scripts/series/kconfigs/defconfig/lockdep create mode 100644 .github/scripts/series/kconfigs/defconfig/medany create mode 100644 .github/scripts/series/kconfigs/defconfig/medlow create mode 100644 .github/scripts/series/kconfigs/defconfig/noc create mode 100644 .github/scripts/series/kconfigs/defconfig/nosmp create mode 100644 .github/scripts/series/kconfigs/defconfig/pmu create mode 100644 .github/scripts/series/kconfigs/defconfig/preempt create mode 100644 .github/scripts/series/kconfigs/defconfig/preempt_rt create mode 100644 .github/scripts/series/kconfigs/defconfig/qspinlock create mode 100644 .github/scripts/series/kconfigs/defconfig/randomize_base create mode 100644 .github/scripts/series/kconfigs/defconfig/rseq create mode 100644 .github/scripts/series/kconfigs/defconfig/rseq_debug create mode 100644 .github/scripts/series/kconfigs/defconfig/size create mode 100644 .github/scripts/series/kconfigs/defconfig/sparsemem create mode 100644 .github/scripts/series/kconfigs/defconfig/spinwait create mode 100644 .github/scripts/series/kconfigs/defconfig/strict_rwx create mode 100644 .github/scripts/series/kconfigs/defconfig/svnapot create mode 100644 .github/scripts/series/kconfigs/defconfig/ticket_spinlock create mode 100644 .github/scripts/series/kconfigs/defconfig/vmap_stack create mode 100644 .github/scripts/series/kconfigs/ubuntu_defconfig create mode 100755 .github/scripts/series/kernel_builder.sh create mode 100755 .github/scripts/series/kernel_tester.sh create mode 100644 .github/scripts/series/kselftest_prep.sh create mode 100644 .github/scripts/series/patches/0001-selftests-bpf-Add-RISC-V-specific-config.patch create mode 100644 .github/scripts/series/patches/0002-selftests-bpf-Rename-fallback.patch create mode 100644 .github/scripts/series/patches/0003-selftests-iommu-Add-RISC-V-specific-config.patch create mode 100644 .github/scripts/series/patches/0004-selftests-exec-Remove-static-pie.patch create mode 100644 .github/scripts/series/patches/0005-selftests-hid-Fix-broken-build.patch create mode 100644 .github/scripts/series/patches/0006-Add-missing-net-lib-kselftest-target.patch create mode 100644 .github/scripts/series/patches/0007-BPF-kselftest-fix.patch create mode 100644 .github/scripts/series/patches/0008-BPF-selftest-install.patch create mode 100644 .github/scripts/series/patches/0009-selftests-clone3-Avoid-fragile-struct-poking.patch create mode 100644 .github/scripts/series/patches/0010-selftests-clone3-Avoid-fragile-struct-poking.patch create mode 100644 .github/scripts/series/patches/0011-selftests-bpf-Add-missing-per-arch-include-path.patch create mode 100644 .github/scripts/series/patches/0012-Missing-iommu-config.patch create mode 100644 .github/scripts/series/patches/0013-selftests-filesystems-mount-notify.patch create mode 100644 .github/scripts/series/patches/0014-selftests-mm-page_frag.patch create mode 100644 .github/scripts/series/patches/0015-selftests-mount_setattr-mount_setattr_test.patch create mode 100644 .github/scripts/series/patches/0016-selftests-pid_namespace-pid_max.patch create mode 100644 .github/scripts/series/patches/0017-selftests-proc-proc-pid-vm.patch create mode 100644 .github/scripts/series/patches/0018-selftests-riscv-abi-pointer_masking.patch create mode 100644 .github/scripts/series/patches/0019-selftests-ublk.patch create mode 100644 .github/scripts/series/patches/0020-Add-missing-utility-script-to-install-target.patch create mode 100644 .github/scripts/series/patches/0021-ntsync-typo.patch create mode 100755 .github/scripts/series/post_to_squad.py create mode 100755 .github/scripts/series/prepare_rootfs.sh create mode 100644 .github/scripts/series/qemu_test_utils.sh create mode 100755 .github/scripts/series/selftest_builder.sh create mode 100755 .github/scripts/series/test_all.sh create mode 100755 .github/scripts/series/test_kernel.sh create mode 100755 .github/scripts/series/test_only_defconfig.sh create mode 100755 .github/scripts/series/test_only_kselftest.sh create mode 100644 .github/scripts/series/tuxrun_to_squad_json.py create mode 100755 .github/scripts/series/unpack_fw.sh create mode 100644 .github/scripts/series/utils.sh create mode 100755 .github/scripts/sync.sh create mode 100755 .github/scripts/sync_patchwork.py create mode 100755 .github/scripts/xfstests.sh create mode 100644 .github/workflows/kselftest.yml create mode 100644 .github/workflows/patchwork.yml create mode 100644 .github/workflows/series.yml create mode 100644 .github/workflows/sync.yml create mode 100644 .github/workflows/testsuites.yml diff --git a/.github/scripts/build_ubuntu_defconfig.sh b/.github/scripts/build_ubuntu_defconfig.sh new file mode 100755 index 00000000000000..66c9b407f781b4 --- /dev/null +++ b/.github/scripts/build_ubuntu_defconfig.sh @@ -0,0 +1,29 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2024 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -euox pipefail +d=$(dirname "${BASH_SOURCE[0]}") +. $d/series/utils.sh + +logs=$(get_logs_dir) +f=${logs}/build_ubuntu_defconfig.log + +date -Iseconds | tee -a ${f} +echo "Build an ubuntu kernel" | tee -a ${f} +echo "Top 16 commits" | tee -a ${f} +git log -16 --abbrev=12 --pretty="commit %h (\"%s\")" | tee -a ${f} + +kernel_base_sha=$(git log -1 --pretty=%H $(git log -1 --reverse --pretty=%H .github)^) +echo "build_name $(git describe --tags ${kernel_base_sha})" | tee -a ${f} +build_name=$(git describe --tags ${kernel_base_sha}) + +# Build the kernel that will run LTP +export CI_TRIPLE="riscv64-linux-gnu" +cp $d/series/kconfigs/ubuntu_defconfig arch/riscv/configs/ +$d/series/kernel_builder.sh rv64 testsuites plain gcc | tee -a ${f} + +kernel_dir="/build/$(gen_kernel_name rv64 testsuites plain gcc)" +echo $build_name > $kernel_dir/kernel_version +#tar cJvf --exclude $(basename $kernel_path) modules.tar.xz /build/$(gen_kernel_name rv64 testsuites plain gcc)/ diff --git a/.github/scripts/ci/__init__.py b/.github/scripts/ci/__init__.py new file mode 100644 index 00000000000000..05c3610326d57f --- /dev/null +++ b/.github/scripts/ci/__init__.py @@ -0,0 +1,2 @@ +from .base import Base, EndTest, Verdict, submit_pw_check +from .shelltest import ShellTest diff --git a/.github/scripts/ci/base.py b/.github/scripts/ci/base.py new file mode 100644 index 00000000000000..d62af70b5141bf --- /dev/null +++ b/.github/scripts/ci/base.py @@ -0,0 +1,120 @@ +from abc import ABC, abstractmethod +from enum import Enum +import time +import sys + +from libs import utils + +sys.path.insert(0, '../libs') +from libs import log_debug + +class Verdict(Enum): + PENDING = 0 + PASS = 1 + FAIL = 2 + ERROR = 3 + SKIP = 4 + WARNING = 5 + + +class EndTest(Exception): + """ + End of Test + """ + +class Base(ABC): + """ + Base class for CI Tests. + """ + def __init__(self): + self.start_time = 0 + self.end_time = 0 + self.verdict = Verdict.PENDING + self.output = "" + + def success(self): + self.end_timer() + self.verdict = Verdict.PASS + + def error(self, msg): + self.verdict = Verdict.ERROR + self.output = msg + self.end_timer() + raise EndTest + + def warning(self, msg): + self.verdict = Verdict.WARNING + self.output = msg + self.end_timer() + + def skip(self, msg): + self.verdict = Verdict.SKIP + self.output = msg + self.end_timer() + raise EndTest + + def add_failure(self, msg): + self.verdict = Verdict.FAIL + if not self.output: + self.output = msg + else: + self.output += "\n" + msg + + def add_failure_end_test(self, msg): + self.add_failure(msg) + self.end_timer() + raise EndTest + + def start_timer(self): + self.start_time = time.time() + + def end_timer(self): + self.end_time = time.time() + + def elapsed(self): + if self.start_time == 0: + return 0 + if self.end_time == 0: + self.end_timer() + return self.end_time - self.start_time + + def log_err(self, msg): + utils.log_error(f"CI: {self.name}: {msg}") + + def log_info(self, msg): + utils.log_info(f"CI: {self.name}: {msg}") + + def log_dbg(self, msg): + utils.log_debug(f"CI: {self.name}: {msg}") + + @abstractmethod + def run(self, worktree=None): + """ + The child class should implement run() method + If the test fail, it should raise the EndTest exception + """ + pass + + @abstractmethod + def post_run(self): + """ + The child class should implement post_run() method + """ + pass + + +def submit_pw_check(pw, patch, name, verdict, desc, url=None, dry_run=False): + + utils.log_debug(f"Submitting the result to PW: dry_run={dry_run}") + + if not dry_run: + state = 0 + + if verdict == Verdict.PASS: + state = 1 + if verdict == Verdict.WARNING: + state = 2 + if verdict == Verdict.FAIL: + state = 3 + + pw.post_check(patch, name, state, desc, url) diff --git a/.github/scripts/ci/shelltest.py b/.github/scripts/ci/shelltest.py new file mode 100644 index 00000000000000..7f3f56c3ba6f52 --- /dev/null +++ b/.github/scripts/ci/shelltest.py @@ -0,0 +1,67 @@ +from gettext import install +import os +import sys + +sys.path.insert(0, '../libs') +from libs import RepoTool, cmd_run + +from ci import Base, Verdict, EndTest, submit_pw_check + +class ShellTest(Base): + """Run shell test class + This class runs a shell based test + """ + + def __init__(self, ci_data, patch, name, desc, sh): + + # Common + self.name = name + self.desc = desc + self.ci_data = ci_data + + self.sh = sh + self.patch = patch + + super().__init__() + + self.log_dbg("Initialization completed") + + def run(self, worktree=None): + + self.log_dbg("Run") + self.start_timer() + + current_script_path = os.path.dirname(os.path.abspath(__file__)) + + cwd = worktree if worktree else self.ci_data.src_dir + cmd = ["bash", f"{current_script_path}/../pw_tests/{self.sh}"] + (ret, stdout, stderr) = cmd_run(cmd, cwd=cwd) + + if ret == 0: + submit_pw_check(self.ci_data.pw, self.patch, + self.name, Verdict.PASS, + self.name, + None, self.ci_data.config['dry_run']) + self.success() + elif ret == 250: + url = self.ci_data.gh.create_gist(f"pw{self.ci_data.series['id']}-p{self.patch['id']}", + f"{self.name}-WARNING", + stdout + '\n' + stderr) + submit_pw_check(self.ci_data.pw, self.patch, + self.name, Verdict.WARNING, + self.name, + url, self.ci_data.config['dry_run']) + self.warning(stdout + '\n' + stderr) + else: + url = self.ci_data.gh.create_gist(f"pw{self.ci_data.series['id']}-p{self.patch['id']}", + f"{self.name}-FAIL", + stdout + '\n' + stderr) + submit_pw_check(self.ci_data.pw, self.patch, + self.name, Verdict.FAIL, + self.name, + url, self.ci_data.config['dry_run']) + self.error(stdout + '\n' + stderr) + + def post_run(self): + + self.log_dbg("Post Run...") diff --git a/.github/scripts/cleanup_pr.py b/.github/scripts/cleanup_pr.py new file mode 100755 index 00000000000000..691a00c7d353ab --- /dev/null +++ b/.github/scripts/cleanup_pr.py @@ -0,0 +1,238 @@ +#!/usr/bin/env python3 +# -*- coding: utf-8 -*- +import os +import sys +import logging +import argparse + +from datetime import datetime +from github import Github + +from libs import init_logger, log_debug, log_error, log_info, pr_get_sid +from libs import GithubTool + +dry_run = False + +MAGIC_LINE = "BlueZ Testbot Message:" +MAGIC_LINE_2 = "BlueZ Testbot Message #2:" +MAGIC_LINE_3 = "BlueZ Testbot Message #3:" +MAGIC_LINE_4 = "BlueZ Testbot Message #4:" + +PATCH_SUBMISSION_MSG = ''' +This is an automated message and please do not change or delete. + +Dear submitter, + +Thanks for submitting the pull request to the BlueZ github repo. +Currently, the BlueZ repo in Github is only for CI and testing purposes, +and not accepting any pull request at this moment. + +If you still want us to review your patch and merge them, please send your +patch to the Linux Bluetooth mailing list(linux-bluetooth@vger.kernel.org). + +For more detail about submitting a patch to the mailing list, +Please refer \"Submitting patches\" section in the HACKING file in the source. + +Note that this pull request will be closed in the near future. + +Best regards, +BlueZ Team +''' + +PATCH_SUBMISSION_MSG_2 = ''' +This is an automated message and please do not change or delete. + +Dear submitter, + +This is a friendly reminder that this pull request will be closed within +a week or two. + +If you already submitted the patches to the Linux Bluetooth mailing list +(linux-bluetooth@vger.kernel.org) for review, Please close this pull +request. + +If you haven't submitted the patches but still want us to review your patch, +please send your patch to the Linux Bluetooth mailing list +(linux-bluetooth@vger.kernel.org). + +For more detail about submitting a patch to the mailing list, +Please refer \"Submitting patches\" section in the HACKING file in the source. + +Note that this pull request will be closed in a week or two. + +Best regards, +BlueZ Team +''' + +PATCH_SUBMISSION_MSG_3 = ''' +This is an automated message and please do not change or delete. + +Dear submitter, + +Thanks for submitting the pull request to the BlueZ github repo. +Currently, the BlueZ repo in Github is only for CI and testing purposes, +and not accepting any pull request at this moment. + +If you still want us to review your patch and merge them, please send your +patch to the Linux Bluetooth mailing list(linux-bluetooth@vger.kernel.org). + +For more detail about submitting a patch to the mailing list, +Please refer \"Submitting patches\" section in the HACKING file in the source. + +Note that this pull request will be closed in the near future. + +Best regards, +BlueZ Team +''' + +PATCH_SUBMISSION_MSG_4 = ''' +This is an automated message and please do not change or delete. + +Closing without taking any action. + +Best regards, +BlueZ Team +''' + +def get_comment_str(magic_line): + """ + Generate the comment string including magic_line + """ + if magic_line == MAGIC_LINE: + msg = PATCH_SUBMISSION_MSG + if magic_line == MAGIC_LINE_2: + msg = PATCH_SUBMISSION_MSG_2 + if magic_line == MAGIC_LINE_3: + msg = PATCH_SUBMISSION_MSG_3 + if magic_line == MAGIC_LINE_4: + msg = PATCH_SUBMISSION_MSG_4 + + return magic_line + "\n\n" + msg + +def get_magic_line(body): + if (body.find(MAGIC_LINE) >= 0): + return MAGIC_LINE + if (body.find(MAGIC_LINE_2) >= 0): + return MAGIC_LINE_2 + if (body.find(MAGIC_LINE_3) >= 0): + return MAGIC_LINE_3 + if (body.find(MAGIC_LINE_4) >= 0): + return MAGIC_LINE_4 + return None + +def pr_add_comment(gh, pr, magic_line): + """ + Add the comment based on magic line + """ + comment = get_comment_str(magic_line) + + log_debug(f"Add PR comments{magic_line}:\n{comment}") + + if dry_run: + log_info("Dry-Run: Skip adding comment to PR") + return + + gh.pr_post_comment(pr, comment) + +def pr_close(gh, pr): + """ + Close pull request + """ + log_debug(f"Close PR{pr.number}") + + if dry_run: + log_info("Dry-Run: Skip closing PR") + return + + gh.pr_close(pr) + +def get_latest_comment(gh, pr): + """ + Search through the comments and find the latest comment + """ + comments = gh.pr_get_issue_comments(pr) + if not comments: + log_error("Unable to get the comments") + return None + + log_info(f"PR#{pr.number} Comment count: {comments.totalCount}") + + for comment in comments.reversed: + magic_line = get_magic_line(comment.body) + if magic_line != None: + log_debug(f"The most recent comment: {magic_line}") + return magic_line + + log_debug("No bluez comment found") + return None + +def update_pull_request(gh, pr, days_created): + + if days_created > 14: + log_debug("Days created > 14") + log_debug("PR is more than 2 weeks and close the PR") + pr_close(gh, pr) + +def manage_pr(gh): + + prs = gh.get_prs(force=True) + log_info(f"Pull Request count: {prs.totalCount}") + + # Handle each PR + for pr in prs: + log_debug(f"Check PR#_{pr.number}") + + # Check if this PR is created with Patchwork series. + # If yes, stop processing. + pw_sid = pr_get_sid(pr.title) + if pw_sid: + log_info(f"PR is created with Patchwork SID: {pw_sid}") + continue + + # Calcuate the number of days since PR was created + delta = datetime.now().astimezone(pr.created_at.tzinfo) - pr.created_at + days_created = delta.days + + log_debug(f"PR opended {days_created} days ago") + + # Update the PR + update_pull_request(gh, pr, days_created) + +def parse_args(): + """ Parse input argument """ + + ap = argparse.ArgumentParser(description="Clean up PR") + ap.add_argument('-d', '--dry-run', action='store_true', default=False, + help='Run it without updating the PR') + # Positional paramter + ap.add_argument("repo", + help="Name of Github repository. i.e. bluez/bluez") + return ap.parse_args() + +def main(): + + global dry_run + + init_logger("ManagePR", verbose=True) + + args = parse_args() + + # Make sure GITHUB_TOKEN exists + if 'GITHUB_TOKEN' not in os.environ: + log_error("Set GITHUB_TOKEN environment variable") + sys.exit(1) + + # Initialize github repo object + try: + gh = GithubTool(args.repo, os.environ['GITHUB_TOKEN']) + except: + log_error("Failed to initialize GithubTool class") + sys.exit(1) + + dry_run = args.dry_run + + manage_pr(gh) + +if __name__ == "__main__": + main() + diff --git a/.github/scripts/config.json b/.github/scripts/config.json new file mode 100644 index 00000000000000..050c106f8da16c --- /dev/null +++ b/.github/scripts/config.json @@ -0,0 +1,28 @@ +{ + "email": { + "server": "smtp.gmail.com", + "port": 587, + "user": "linux.riscv.bot@gmail.com", + "starttls": true, + "default-to": "linux-riscv-reports@googlegroups.com", + "only-maintainers": false, + "maintainers": [ + "linux.riscv.bot@gmail.com" + ] + }, + "patchwork": { + "url": "https://patchwork.kernel.org", + "project_name": "Linux RISC-V" + }, + "space_details": { + "kernel": { + "include": [ + ], + "exclude": [ + "pull request", + "git pull", + "git,pull" + ] + } + } +} diff --git a/.github/scripts/defconfig.sh b/.github/scripts/defconfig.sh new file mode 100755 index 00000000000000..f133b00006bb00 --- /dev/null +++ b/.github/scripts/defconfig.sh @@ -0,0 +1,18 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2024 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -euo pipefail +d=$(dirname "${BASH_SOURCE[0]}") +. $d/series/utils.sh + +logs=$(get_logs_dir) +f=${logs}/defconfig.log + +date -Iseconds | tee -a ${f} +echo "Top 16 commits" | tee -a ${f} +git log -16 --abbrev=12 --pretty="commit %h (\"%s\")" | tee -a ${f} + +${d}/series/build_only_defconfig.sh | tee -a ${f} +${d}/series/test_only_defconfig.sh | tee -a ${f} diff --git a/.github/scripts/kselftest.sh b/.github/scripts/kselftest.sh new file mode 100755 index 00000000000000..19ba8442561392 --- /dev/null +++ b/.github/scripts/kselftest.sh @@ -0,0 +1,22 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2023 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -euo pipefail +d=$(dirname "${BASH_SOURCE[0]}") +. $d/series/utils.sh + +logs=$(get_logs_dir) +f=${logs}/kselftest.log + +date -Iseconds | tee -a ${f} +echo "Build, boot, and run kselftests on various kernels" | tee -a ${f} +echo "Top 16 commits" | tee -a ${f} +git log -16 --abbrev=12 --pretty="commit %h (\"%s\")" | tee -a ${f} + +kernel_base_sha=$(git log -1 --pretty=%H $(git log -1 --reverse --pretty=%H .github)^) +echo "build_name $(git describe --tags ${kernel_base_sha})" | tee -a ${f} + +${d}/series/build_only_kselftest.sh | tee -a ${f} +${d}/series/test_only_kselftest.sh | tee -a ${f} diff --git a/.github/scripts/libhugetlbfs.sh b/.github/scripts/libhugetlbfs.sh new file mode 100755 index 00000000000000..fbb8d632c18476 --- /dev/null +++ b/.github/scripts/libhugetlbfs.sh @@ -0,0 +1,31 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2024 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -euox pipefail +d=$(dirname "${BASH_SOURCE[0]}") +. $d/series/utils.sh + +logs=$(get_logs_dir) +f=${logs}/libhugetlbfs.log + +KERNEL_PATH=$(find "$1" -name '*vmlinu[zx]*') +mv $KERNEL_PATH $KERNEL_PATH.gz +gunzip $KERNEL_PATH.gz + +build_name=$(cat "$1/kernel_version") + +# The Docker image comes with a prebuilt python environment with all tuxrun +# dependencies +source /build/.env/bin/activate + +mkdir -p /build/squad_json/ + +/build/tuxrun/run --runtime null --device qemu-riscv64 --kernel $KERNEL_PATH --tests libhugetlbfs --results /build/squad_json/libhugetlbfs.json --log-file-text /build/squad_json/libhugetlbfs.log --timeouts libhugetlbfs=480 --overlay /build/libhugetlbfs.tar.xz || true + +# Convert JSON to squad datamodel +python3 /build/my-linux/.github/scripts/series/tuxrun_to_squad_json.py --result-path /build/squad_json/libhugetlbfs.json --testsuite libhugetlbfs +python3 /build/my-linux/.github/scripts/series/generate_metadata.py --logs-path /build/squad_json/ --job-url ${GITHUB_JOB_URL} --branch ${GITHUB_BRANCH_NAME} + +curl --header "Authorization: token $SQUAD_TOKEN" --form tests=@/build/squad_json/libhugetlbfs.squad.json --form log=@/build/squad_json/libhugetlbfs.log --form metadata=@/build/squad_json/metadata.json https://squad.di.riseproject.dev/api/submit/riscv-linux/linux-all/${build_name}/qemu diff --git a/.github/scripts/libs/__init__.py b/.github/scripts/libs/__init__.py new file mode 100755 index 00000000000000..eb89c4fbbc9ca2 --- /dev/null +++ b/.github/scripts/libs/__init__.py @@ -0,0 +1,6 @@ +from .utils import init_logger, log_debug, log_error, log_info, cmd_run, pr_get_sid +from .patchwork import Patchwork, PostException +from .email import EmailTool +from .repotool import RepoTool +from .githubtool import GithubTool +from .context import Context diff --git a/.github/scripts/libs/context.py b/.github/scripts/libs/context.py new file mode 100755 index 00000000000000..dc15589e16ba66 --- /dev/null +++ b/.github/scripts/libs/context.py @@ -0,0 +1,95 @@ +import os +import json + +from libs import EmailTool, GithubTool, Patchwork, RepoTool +from libs import log_info, log_debug, log_error + + +class ContextError(Exception): + pass + + +class Context(): + """Collection of data for bzcafe. It is useful for CI""" + + def __init__(self, config_file=None, github_repo=None, src_dir=None, + patch_root=None, **kwargs): + + # Init config + log_info(f"Initialize config file: {config_file}") + self.config = None + if config_file: + with open(os.path.abspath(config_file), 'r') as f: + self.config = json.load(f) + + # Init patchwork + log_info("Initialize patchwork") + try: + self.pw = Patchwork(self.config['patchwork']['url'], + self.config['patchwork']['project_name']) + except: + log_error("Failed to initialize Patchwork class") + raise ContextError + + # If token and username is available, set it here + if 'PATCHWORK_TOKEN' in os.environ and os.environ['PATCHWORK_TOKEN'] != "": + log_debug("Found Patchwork Token in environment variable") + self.pw.set_token(os.environ['PATCHWORK_TOKEN']) + + if 'PATCHWORK_USER' in os.environ and os.environ['PATCHWORK_USER'] != "": + log_debug("Found Patchwork User in environment variable") + self.pw.set_user(int(os.environ['PATCHWORK_USER'])) + + # Init github + log_info(f"Initialize Github: {github_repo}") + if 'GITHUB_TOKEN' not in os.environ: + log_error("Set GITHUB_TOKEN environment variable") + raise ContextError + + if 'GIST_TOKEN' not in os.environ: + log_error("Set GIST_TOKEN environment variable") + raise ContextError + + try: + self.gh = GithubTool(github_repo, os.environ['GITHUB_TOKEN'], + os.environ['GIST_TOKEN']) + except: + log_error("Failed to initialize GithubTool class") + raise ContextError + + # Init email + log_info("Initailze EmailTool") + token = None + if 'EMAIL_TOKEN' in os.environ: + token = os.environ['EMAIL_TOKEN'] + log_info("Email Token is read from environment variable") + + self.email = EmailTool(token=token, config=self.config['email']) + + # Init src_dir + log_info(f"Initialize Source directory: {src_dir}") + try: + self.src_repo = RepoTool(os.path.basename(src_dir), src_dir) + except: + log_error("Failed to initialize RepoTool class") + raise ContextError + self.src_dir = self.src_repo.path() + self.patch_root = patch_root + + # Custome confguration + for kw in kwargs: + log_info(f"Storing {kw}:{kwargs[kw]}") + self.config[kw] = kwargs[kw] + + # These are the frequently used variables by CI + self.series = None + self.patches = None + self.shas = None + + log_info("Context Initialization Completed") + + def update_series(self, series, shas): + self.series = series + self.patches = series['patches'] + self.shas = shas + diff --git a/.github/scripts/libs/email.py b/.github/scripts/libs/email.py new file mode 100755 index 00000000000000..23654a351e3d43 --- /dev/null +++ b/.github/scripts/libs/email.py @@ -0,0 +1,66 @@ +from asyncio import SendfileNotAvailableError +import smtplib +from email.mime.multipart import MIMEMultipart +from email.mime.text import MIMEText + +import libs + +class EmailTool: + + def __init__(self, server=None, port=None, sender=None, receivers=[], + startls=True, token=None, config=None): + self._server = server + self._port = port + self._sender = sender + self._receivers = receivers + self._starttls = startls + self._token = token + self._message = MIMEMultipart() + + if config: + if 'server' in config: + self._server = config['server'] + if 'port' in config: + self._port = config['port'] + if 'user' in config: + self._sender = config['user'] + if 'startls' in config: + self._startls = config['startls'] + + def send(self): + try: + session = smtplib.SMTP(self._server, self._port) + session.ehlo() + if self._starttls: + session.starttls() + session.ehlo() + session.login(self._sender, self._token) + session.sendmail(self._sender, self._receivers, self._message.as_string()) + except Exception as e: + libs.log_error("Failed to Send email") + libs.log_error(e) + finally: + session.quit() + + libs.log_info("Email sent successfully") + + def set_receivers(self, receivers): + self._receivers = receivers + libs.log_info("Receivers are updated") + + def set_token(self, token): + self._token = token + libs.log_info("Email Token is updated") + + def _update_header(self, headers): + for key, value in headers.items(): + self._message.add_header(key, value) + + def compose(self, title, body, headers): + self._message['From'] = self._sender + self._message['To'] = ", ".join(self._receivers) + self._message['Subject'] = title + self._message.attach(MIMEText(body, 'plain')) + self._update_header(headers) + + libs.log_debug(f"EMAIL Message: \n{self._message}") diff --git a/.github/scripts/libs/githubtool.py b/.github/scripts/libs/githubtool.py new file mode 100755 index 00000000000000..97bf7cf49d1ed4 --- /dev/null +++ b/.github/scripts/libs/githubtool.py @@ -0,0 +1,77 @@ +from github import Github, InputFileContent +import re + +class GithubTool: + + def __init__(self, repo, token=None, gist_token=None): + self._repo = Github(token).get_repo(repo) + self._user = Github(gist_token).get_user() + self._pr = None + self._prs = None + + def get_pr_commits(self, pr_id): + pr = self.get_pr(pr_id, True) + + return pr.get_commits() + + def get_pr(self, pr_id, force=False): + if force or self._pr == None: + self._pr = self._repo.get_pull(pr_id) + + return self._pr + + def get_prs(self, force=False): + if force or not self._prs: + self._prs = self._repo.get_pulls() + + return self._prs + + def create_pr(self, title, body, base, head): + + return self._repo.create_pull(base, head, title=title, body=body, + maintainer_can_modify=True) + + def close_pr(self, pr_id): + pr = self.get_pr(pr_id, force=True) + pr.edit(state="closed") + + git_ref = self._repo.get_git_ref(f"heads/{pr.head.ref}") + git_ref.delete() + + def pr_exist_title(self, str): + if not self._prs: + self._prs = self.get_prs(force=True) + + for pr in self._prs: + if re.search(str, pr.title, re.IGNORECASE): + return True + + return False + + def pr_post_comment(self, pr, comment): + + try: + pr.create_issue_comment(comment) + except: + return False + + return True + + def pr_get_issue_comments(self, pr): + try: + comments = pr.get_issue_comments() + except: + return None + + return comments + + def pr_close(self, pr): + pr.edit(state="closed") + + def create_gist(self, title, test, body): + gist = self._user.create_gist( + public=True, + description=title, + files={test: InputFileContent(body)}) + + return gist.html_url diff --git a/.github/scripts/libs/patchwork.py b/.github/scripts/libs/patchwork.py new file mode 100755 index 00000000000000..c1f8cbb3abd978 --- /dev/null +++ b/.github/scripts/libs/patchwork.py @@ -0,0 +1,181 @@ +import datetime +import requests +from requests.adapters import HTTPAdapter +from urllib3.util.retry import Retry + +import libs + +class PostException(Exception): + pass + + +class Patchwork(): + + def __init__(self, server, project_name, user=None, token=None, api=None): + self._session = requests.Session() + retry = Retry(connect=10, backoff_factor=1) + adapter = HTTPAdapter(max_retries=retry) + self._session.mount('http://', adapter) + self._session.mount('https://', adapter) + self._server = server + self._token = token + self._user = user + self._project_name = project_name + self._api = "/api" if api == None else f"/api/{api}" + self._project_id= self._get_project_id(project_name) + + libs.log_info(f"Connected to Patchwork Server: {self._server}: {self._project_id}") + + def set_token(self, token): + self._token = token + + def set_user(self, user): + self._user = user + + def _request(self, url): + libs.log_debug(f"PW GET URL: {url}") + resp = self._session.get(url) + if resp.status_code != 200: + raise requests.HTTPError(f"GET {resp.status_code}") + + return resp + + def _get(self, req): + return self._request(f'{self._server}{self._api}/{req}') + + def _get_project(self, name): + projects = self.get_all('projects') + for project in projects: + if project['name'] == name: + return project + + libs.log_error(f"No matched project found: {name}") + return None + + def _get_project_id(self, name): + project = self._get_project(name) + if project: + return project['id'] + + raise ValueError + + def _post(self, req, headers, data): + url = f'{self._server}{self._api}/{req}' + libs.log_debug(f"PW POST URL: {url}") + return self._session.post(url, headers=headers, data=data) + + def get(self, type, identifier): + return self._get(f'{type}/{identifier}/').json() + + def get_all(self, type, filters=None): + if filters is None: + filters={} + params = '' + for key, val in filters.items(): + if val is not None: + params += f'{key}={val}&' + + items = [] + + response = self._get(f'{type}/?{params}') + while response: + for entry in response.json(): + items.append(entry) + + if 'Link' not in response.headers: + break + + links = response.headers['Link'].split(',') + response = None + for link in links: + info = link.split(';') + if info[1].strip() == 'rel="next"': + response = self._request(info[0][1:-1]) + + return items + + def post_check(self, patch, context, state, desc, url=None): + headers = {} + if self._token: + headers['Authorization'] = f'Token {self._token}' + + data = { + 'user': self._user, + 'state': state, + 'target_url': url if url else "", + 'context': context, + 'description': desc + } + + resp = self._post(f"patches/{patch['id']}/checks/", data=data, + headers=headers) + if resp.status_code != 201 and resp.status_code != 200: + libs.log_error(f"PW POST failed: {resp.status_code}") + raise PostException(f"POST {resp.status_code}") + + def get_series_mbox(self, id): + url = f'{self._server}/series/{id}/mbox/' + return self._request(url).content.decode() + + def get_patch_mbox(self, id): + patch = self.get_patch(id) + return self._request(patch['mbox']).content.decode() + + def get_series(self, series_id): + return self.get('series', series_id) + + def get_patch(self, patch_id): + return self.get('patches', patch_id) + + def get_patches_by_state(self, state, archived=False, days_lookback=0): + filter = {} + + filter['project'] = self._project_id + filter['state'] = state + filter['archived'] = 'true' if archived else 'false' + if days_lookback > 0: + today = datetime.datetime.utcnow().date() + lookback = today - datetime.timedelta(days=days_lookback) + filter['since'] = lookback.strftime("%Y-%m-%dT%H:%M:%S") + + + return self.get_all('patches', filter) + + def get_series_by_state(self, state, archived=False, days_lookback=0): + series_ids = [] + series_list = [] + + patches = self.get_patches_by_state(state, archived, days_lookback) + if len(patches) == 0: + return series + + for patch in patches: + # Skip if patch has no series + if 'series' not in patch: + continue + + for series in patch['series']: + # Check if series id already exist + if series['id'] not in series_ids: + series_ids.append(series['id']) + series_list.append(self.get_series(series['id'])) + + return series_list + + def save_patch_mbox(self, patch_id, filename): + patch_mbox = self.get_patch_mbox(patch_id) + + with open(filename, 'w+') as f: + f.write(patch_mbox) + + return filename + + def save_patch_msg(self, patch_id, filename): + patch = self.get_patch(patch_id) + + with open(filename, 'w+') as f: + f.write(patch['name']) + f.write('\n\n') + f.write(patch['content']) + + return filename diff --git a/.github/scripts/libs/repotool.py b/.github/scripts/libs/repotool.py new file mode 100755 index 00000000000000..5276f465c62e98 --- /dev/null +++ b/.github/scripts/libs/repotool.py @@ -0,0 +1,92 @@ +import os +from typing import List + +import libs + + +class RepoToolNotRepo(Exception): + pass + + +class RepoTool: + + def __init__(self, name, path, remote=None): + self._name = name + self._path = os.path.abspath(path) + self._remote = "origin" + self._branch = "master" + + if remote: + self._remote = remote + + # Last executed stdout and stderr + self.stdout = None + self.stderr = None + + self._verify_repo() + libs.log_info(f'Git Repo({self._name}) verified: {self._path}') + + def path(self): + return self._path + + def git(self, args: List[str]): + (ret, self.stdout, self.stderr) = libs.cmd_run(["git"] + args, + cwd=self._path) + return ret + + def _verify_repo(self): + cmd = ["branch", "--show-current"] + + ret = self.git(cmd) + # except: + # libs.log_error("Failed to verify repo") + # raise RepoToolNotRepo + return ret + + def git_checkout(self, branch, create_branch=False): + cmd = ["checkout"] + + if create_branch: + cmd += ["-B"] + + cmd += [branch] + + return self.git(cmd) + + def git_push(self, branch, remote=None, force=False): + cmd = ["push"] + + if force: + cmd += ["-f"] + + if remote: + cmd += [remote] + else: + cmd += [self._remote] + + cmd += [branch] + + return self.git(cmd) + + def git_reset(self, target, hard=False): + cmd = ["reset", target] + + if hard: + cmd += ["--hard"] + + return self.git(cmd) + + def git_am(self, patch=None, abort=False): + cmd = ["am"] + + if abort: + cmd += ["--abort"] + else: + cmd += ["-s", patch] + + return self.git(cmd) + + def git_clean(self): + # Recursively remove all untracked files, not limited to gitignore + return self.git(["clean", "-d", "--force", "-x"]) + diff --git a/.github/scripts/libs/utils.py b/.github/scripts/libs/utils.py new file mode 100755 index 00000000000000..fada7b6c3a379c --- /dev/null +++ b/.github/scripts/libs/utils.py @@ -0,0 +1,105 @@ +import logging +import os +import subprocess +import time +import re +from typing import List, Dict, Tuple + +# Global logging object +logger = None + +def init_logger(name, verbose=False): + global logger + + logger = logging.getLogger(name) + logger.setLevel(logging.INFO) + if verbose: + logger.setLevel(logging.DEBUG) + + ch = logging.StreamHandler() + formatter = logging.Formatter('%(asctime)s:%(levelname)-8s:%(message)s') + ch.setFormatter(formatter) + + logger.addHandler(ch) + + logger.info("Logger initialized: level=%s", + logging.getLevelName(logger.getEffectiveLevel())) + +def log_info(msg): + if logger is not None: + logger.info(msg) + +def log_error(msg): + if logger is not None: + logger.error(msg) + +def log_debug(msg): + if logger is not None: + logger.debug(msg) + +def pr_get_sid(pr_title): + """ + Parse PR title prefix and get PatchWork Series ID + PR Title Prefix = "[PW_S_ID:] XXXXX" + """ + + try: + sid = re.search(r'^\[PW_SID:([0-9]+)\]', pr_title).group(1) + except AttributeError: + log_error(f"Unable to find the series_id from title {pr_title}") + sid = None + + return sid + +def cmd_run(cmd: List[str], shell: bool = False, add_env: Dict[str, str] = None, + cwd: str = None, pass_fds=()) -> Tuple[str, str, str]: + log_info(f"------------- CMD_RUN -------------") + log_info(f"CMD: {cmd}") + + stdout = "" + + # Update ENV + env = os.environ.copy() + if add_env: + env.update(add_env) + + start_time = time.time() + + proc = subprocess.Popen(cmd, shell=shell, env=env, cwd=cwd, + stdout=subprocess.PIPE, stderr=subprocess.PIPE, + bufsize=1, universal_newlines=True, + pass_fds=pass_fds) + log_debug(f"PROC args: {proc.args}") + + # Print the stdout in realtime + for line in proc.stdout: + log_debug("> " + line.rstrip('\n')) + stdout += line + + # STDOUT returned by proc.communicate() is empty because it was all consumed + # by the above read. + _stdout, stderr = proc.communicate() + proc.stdout.close() + proc.stderr.close() + + stderr = "\n" + stderr + if stderr[-1] == "\n": + stderr = stderr[:-1] + + log_info(f'RET: {proc.returncode}') + # No need to print STDOUT here again. It is already printed above + # log_debug(f'STDOUT:{stdout}') + # Print STDOUT only if ret != 0 + if proc.returncode: + log_debug(f'STDERR:{stderr}') + + if proc.returncode != 0: + if stderr and stderr[:-1] == "\n": + stderr = stderr[:-1] + + elapsed = time.time() - start_time + + log_info(f"------------- CMD_RUN END ({elapsed:.2f} s) -------------") + return proc.returncode, stdout, stderr + + diff --git a/.github/scripts/ltp.sh b/.github/scripts/ltp.sh new file mode 100755 index 00000000000000..6eec1bff20fbae --- /dev/null +++ b/.github/scripts/ltp.sh @@ -0,0 +1,43 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2023 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -euox pipefail +d=$(dirname "${BASH_SOURCE[0]}") +. $d/series/utils.sh + +logs=$(get_logs_dir) +f=${logs}/ltp.log + +KERNEL_PATH=$(find "$1" -name '*vmlinu[zx]*') +mv $KERNEL_PATH $KERNEL_PATH.gz +gunzip $KERNEL_PATH.gz + +build_name=$(cat "$1/kernel_version") + +# The Docker image comes with a prebuilt python environment with all tuxrun +# dependencies +source /build/.env/bin/activate + +# TODO ltp-controllers is too slow for now because of cgroup_fj_stress.sh +# but I haven't found an easy to skip this one from tuxrun +ltp_tests=( "ltp-commands" "ltp-syscalls" "ltp-mm" "ltp-hugetlb" "ltp-crypto" "ltp-cve" "ltp-containers" "ltp-fs" "ltp-sched" ) + +mkdir -p /build/squad_json/ +parallel_log=$(mktemp -p ${ci_root}) + +for ltp_test in ${ltp_tests[@]}; do + echo "/build/tuxrun/run --runtime null --device qemu-riscv64 --kernel $KERNEL_PATH --tests $ltp_test --results /build/squad_json/$ltp_test.json --log-file-text /build/squad_json/$ltp_test.log --timeouts $ltp_test=480 || true" +done | parallel -j $(($(nproc)/4)) --colsep ' ' --joblog ${parallel_log} + +cat ${parallel_log} +rm ${parallel_log} + +for ltp_test in ${ltp_tests[@]}; do + # Convert JSON to squad datamodel + python3 /build/my-linux/.github/scripts/series/tuxrun_to_squad_json.py --result-path /build/squad_json/$ltp_test.json --testsuite $ltp_test + python3 /build/my-linux/.github/scripts/series/generate_metadata.py --logs-path /build/squad_json/ --job-url ${GITHUB_JOB_URL} --branch ${GITHUB_BRANCH_NAME} + + curl --header "Authorization: token $SQUAD_TOKEN" --form tests=@/build/squad_json/$ltp_test.squad.json --form log=@/build/squad_json/$ltp_test.log --form metadata=@/build/squad_json/metadata.json https://squad.di.riseproject.dev/api/submit/riscv-linux/linux-all/${build_name}/qemu +done diff --git a/.github/scripts/pw_ci.py b/.github/scripts/pw_ci.py new file mode 100755 index 00000000000000..48e7067ad3955c --- /dev/null +++ b/.github/scripts/pw_ci.py @@ -0,0 +1,343 @@ +#!/usr/bin/env python3 +# -*- coding: utf-8 -*- +import os +import sys +import argparse +import tempfile + +from libs import init_logger, log_debug, log_error, log_info, pr_get_sid +from libs import Context + +import ci + +def check_args(args): + if not os.path.exists(os.path.abspath(args.config)): + log_error(f"Invalid parameter(config) {args.config}") + return False + + if not os.path.exists(os.path.abspath(args.src_dir)): + log_error(f"Invalid parameter(src_dir) {args.src_dir}") + return False + + return True + +def parse_args(): + ap = argparse.ArgumentParser(description="Run CI tests") + ap.add_argument('-c', '--config', default='./config.json', + help='Configuration file to use. default=./config.json') + ap.add_argument('-s', '--src-dir', required=True, + help='Source directory') + ap.add_argument('-d', '--dry-run', action='store_true', default=False, + help='Run it without uploading the result. default=False') + + # Positional parameter + ap.add_argument("repo", + help="Name of Github repository. i.e. bluez/bluez") + return ap.parse_args() + +# Email Message Templates + +EMAIL_MESSAGE = '''This is automated email and please do not reply to this email! + +Dear submitter, + +Thank you for submitting the patches to the Linux RISC-V mailing list. +This is a CI test results with your patch series: +PW Link:{pw_link} + +---Test result--- +{content} + +--- +Regards, +Linux RISC-V bot + +''' + +def github_pr_post_result(ci_data, i, patch, test): + pr = ci_data.gh.get_pr(ci_data.config['pr_num'], force=True) + + comment = f'Patch {i+1}: "{patch['name']}"\n' + comment += f"**{test.name}**\n" + comment += f"Desc: {test.desc}\n" + comment += f"Duration: {test.elapsed():.2f} seconds\n" + comment += f"**Result: {test.verdict.name}**\n" + + if test.output: + comment += f"Output:\n```\n{test.output}\n```" + + return ci_data.gh.pr_post_comment(pr, comment) + +def is_maintainers_only(email_config): + if 'only-maintainers' in email_config and email_config['only-maintainers']: + return True + return False + +def get_receivers(email_config, submitter): + log_debug("Get the list of email receivers") + + receivers = [] + if is_maintainers_only(email_config): + # Send only to the maintainers + receivers.extend(email_config['maintainers']) + else: + # Send to default-to and submitter + receivers.append(email_config['default-to']) + receivers.append(submitter) + + return receivers + +def send_email(ci_data, content): + headers = {} + email_config = ci_data.config['email'] + + body = EMAIL_MESSAGE.format(pw_link=ci_data.series['web_url'], + content=content) + + headers['In-Reply-To'] = ci_data.patches[0]['msgid'] + headers['References'] = ci_data.patches[0]['msgid'] + + if not is_maintainers_only(email_config): + headers['Reply-To'] = email_config['default-to'] + + receivers = get_receivers(email_config, ci_data.series['submitter']['email']) + ci_data.email.set_receivers(receivers) + ci_data.email.compose("Re: " + ci_data.series['name'], body, headers) + + if ci_data.config['dry_run']: + log_info("Dry-Run is set. Skip sending email") + return + + log_info("Sending Email...") + ci_data.email.send() + +def report_ci(ci_data, test_list): + """Generate the CI result and send email""" + results = "" + summary = "Test Summary:\n" + + line = "{head:<100}{name:<35}{result:<10}{elapsed:.2f} seconds\n" + fail_msg = '{head}\nTest: {name} - {result}\nDesc: {desc}\nOutput:\n{output}\n' + + for i in range(len(test_list)): + sha, tests = test_list[i] + patch = ci_data.patches[i] # 'name' + + for test in tests: + if test.verdict == ci.Verdict.PASS: + # No need to add result of passed tests to simplify the email + summary += line.format(head=f'Patch {i+1}: "{patch['name']}"', + name=test.name, result='PASS', + elapsed=test.elapsed()) + continue + + # Rest of the verdicts use same output format + results += "##############################\n" + results += fail_msg.format(head=f'Patch {i+1}: "{patch['name']}"', + name=test.name, result=test.verdict.name, + desc=test.desc, output=test.output) + summary += line.format(head=f'Patch {i+1}: "{patch['name']}"', + name=test.name, result=test.verdict.name, + elapsed=test.elapsed()) + + if results != "": + results = "Details\n" + results + + send_email(ci_data, summary + '\n' + results) + +def create_test_list(ci_data): + test_list = [] + # XXX ci_config = ci_data.config['space_details']['kernel']['ci'] + + ######################################## + # Test List + ######################################## + + i = 0 + for sha in ci_data.shas: + tests = [] + + tests.append(ci.ShellTest(ci_data, ci_data.patches[i], + "build-rv32-defconfig", + "Builds riscv32 defconfig", + "build_rv32_defconfig.sh")) + + tests.append(ci.ShellTest(ci_data, ci_data.patches[i], + "build-rv64-clang-allmodconfig", + "Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings", + "build_rv64_clang_allmodconfig.sh")) + + tests.append(ci.ShellTest(ci_data, ci_data.patches[i], + "build-rv64-gcc-allmodconfig", + "Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings", + "build_rv64_gcc_allmodconfig.sh")) + + tests.append(ci.ShellTest(ci_data, ci_data.patches[i], + "build-rv64-nommu-k210-defconfig", + "Builds riscv64 defconfig with NOMMU for K210", + "build_rv64_nommu_k210_defconfig.sh")) + + tests.append(ci.ShellTest(ci_data, ci_data.patches[i], + "build-rv64-nommu-k210-virt", + "Builds riscv64 defconfig with NOMMU for the virt platform", + "build_rv64_nommu_virt_defconfig.sh")) + + tests.append(ci.ShellTest(ci_data, ci_data.patches[i], + "checkpatch", + "Runs checkpatch.pl on the patch", + "checkpatch.sh")) + + tests.append(ci.ShellTest(ci_data, ci_data.patches[i], + "dtb-warn-rv64", + "Checks for Device Tree warnings/errors", + "dtb_warn_rv64.sh")) + + tests.append(ci.ShellTest(ci_data, ci_data.patches[i], + "header-inline", + "Detects static functions without inline keyword in header files", + "header_inline.sh")) + + tests.append(ci.ShellTest(ci_data, ci_data.patches[i], + "kdoc", + "Detects for kdoc errors", + "kdoc.sh")) + + tests.append(ci.ShellTest(ci_data, ci_data.patches[i], + "module-param", + "Detect module_param changes", + "module_param.sh")) + + tests.append(ci.ShellTest(ci_data, ci_data.patches[i], + "verify-fixes", + "Verifies that the Fixes: tags exist", + "verify_fixes.sh")) + + tests.append(ci.ShellTest(ci_data, ci_data.patches[i], + "verify-signedoff", + "Verifies that Signed-off-by: tags are correct", + "verify_signedoff.sh")) + t = (sha, tests) + test_list.append(t) + i += 1 + + return test_list + +def run_ci(ci_data): + num_fails = 0 + + test_list = create_test_list(ci_data) + + log_info(f"Test list is created: {len(test_list)}") + log_debug("+--------------------------+") + log_debug("| Run CI |") + log_debug("+--------------------------+") + + for i in range(len(test_list)): + sha, tests = test_list[i] + patch = ci_data.patches[i] # 'name' + with tempfile.TemporaryDirectory(dir="/build") as worktree: + cmd = ['worktree', 'add', worktree, sha] + if ci_data.src_repo.git(cmd): + log_error(f"Failed to create worktree") + continue + + for test in tests: + log_info("##############################") + log_info(f'## CI: Patch {i+1}: "{patch['name']}"') + log_info(f"## CI: {test.name}") + log_info("##############################") + + try: + test.run(worktree=worktree) + except ci.EndTest as e: + log_error(f"Test Ended(Failure): {test.name}:{test.verdict.name}") + except Exception as e: + log_error(f"Test Ended(Exception): {test.name}: {e.__class__}") + finally: + test.post_run() + + if test.verdict != ci.Verdict.PASS: + num_fails += 1 + + if ci_data.config['dry_run']: + log_info("Skip submitting result to Github: dry_run=True") + continue + + log_debug("Submit the result to github") + if not github_pr_post_result(ci_data, i, patch, test): + log_error("Failed to submit the result to Github") + + log_info(f"Total number of failed test: {num_fails}") + log_debug("+--------------------------+") + log_debug("| ReportCI |") + log_debug("+--------------------------+") + report_ci(ci_data, test_list) + + return num_fails + +def main(): + global config, pw, gh, src_repo, email + + init_logger("PW_CI", verbose=True) + + if 'GITHUB_REF' not in os.environ: + log_error("GITHUB_REF environment not set") + sys.exit(1) + + pr_num = int(os.environ['GITHUB_REF'].removeprefix("refs/pull/").removesuffix("/merge")) + + args = parse_args() + if not check_args(args): + sys.exit(1) + + ci_data = Context(config_file=os.path.abspath(args.config), + github_repo=args.repo, + src_dir=args.src_dir, + dry_run=args.dry_run, + pr_num=pr_num, + space='kernel') + + pr = ci_data.gh.get_pr(pr_num, force=True) + sid = pr_get_sid(pr.title) + + # If PR is not created for Patchwork (no key string), ignore this PR and + # stop running the CI + if not sid: + log_error("Not a valid PR. No need to run") + sys.exit(1) + + cmd = ['log', '-1', '--pretty=%H', '.github/scripts/sync_patchwork.py'] + if ci_data.src_repo.git(cmd): + log_error("Failed to get base commit") + sys.exit(1) + + base_sha = ci_data.src_repo.stdout.strip() + + if len(base_sha) == 0: + log_error("Failed to get base commit") + sys.exit(1) + + cmd = ['rev-list', '--reverse', f'{base_sha}..HEAD'] + if ci_data.src_repo.git(cmd): + log_error("Failed to list of commits") + sys.exit(1) + + shas = ci_data.src_repo.stdout.split() + if len(shas) == 0: + log_error("Failed to get list of commits") + sys.exit(1) + + ci_data.update_series(ci_data.pw.get_series(sid), shas) + + if len(ci_data.shas) != len(ci_data.patches): + log_error("Git and patchwork mismatch") + sys.exit(1) + + num_fails = run_ci(ci_data) + + log_debug("----- DONE -----") + + sys.exit(num_fails) + +if __name__ == "__main__": + main() diff --git a/.github/scripts/pw_tests/build_rv32_defconfig.sh b/.github/scripts/pw_tests/build_rv32_defconfig.sh new file mode 100644 index 00000000000000..45e2891b9722ff --- /dev/null +++ b/.github/scripts/pw_tests/build_rv32_defconfig.sh @@ -0,0 +1,26 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (c) 2022 by Rivos Inc. + +tmpdir=$(mktemp -d -p /build) +tmpfile=$(mktemp -p /build) +rc=0 + +tuxmake --wrapper ccache --target-arch riscv --directory . \ + --environment=KBUILD_BUILD_TIMESTAMP=@1621270510 \ + --environment=KBUILD_BUILD_USER=tuxmake --environment=KBUILD_BUILD_HOST=tuxmake \ + -o $tmpdir --toolchain llvm -z none -k rv32_defconfig \ + CROSS_COMPILE=riscv64-linux- \ + >$tmpfile 2>&1 || rc=1 + +if [ $rc -ne 0 ]; then + echo "Full log:" + cat $tmpfile + echo "warnings/errors:" + grep "\(warning\|error\):" $tmpfile +fi + +rm -rf $tmpdir $tmpfile + +exit $rc diff --git a/.github/scripts/pw_tests/build_rv64_clang_allmodconfig.sh b/.github/scripts/pw_tests/build_rv64_clang_allmodconfig.sh new file mode 100644 index 00000000000000..0a27666da8328b --- /dev/null +++ b/.github/scripts/pw_tests/build_rv64_clang_allmodconfig.sh @@ -0,0 +1,88 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (C) 2019 Netronome Systems, Inc. + +# Modified tests/patch/build_defconfig_warn.sh for RISC-V builds + +tmpfile_e=$(mktemp -p /build) +tmpfile_o=$(mktemp -p /build) +tmpfile_n=$(mktemp -p /build) +tmpdir_b=$(mktemp -d -p /build) +tmpdir_o=$(mktemp -d -p /build) + +rc=0 + +build() { + tuxmake --wrapper ccache --target-arch riscv -e PATH=$PATH --directory . \ + --environment=KBUILD_BUILD_TIMESTAMP=@1621270510 \ + --environment=KBUILD_BUILD_USER=tuxmake --environment=KBUILD_BUILD_HOST=tuxmake \ + -o $tmpdir_o -b $tmpdir_b --toolchain llvm -z none --kconfig allmodconfig \ + -K CONFIG_WERROR=n -K CONFIG_RANDSTRUCT_NONE=y -K CONFIG_SAMPLES=n \ + -K CONFIG_DRM_WERROR=n \ + W=1 CROSS_COMPILE=riscv64-linux- \ + config default \ + >$1 2>&1 +} + +echo "Redirect to $tmpfile_o and $tmpfile_n" +echo "Tree base:" +HEAD=$(git rev-parse HEAD) +git log -1 --pretty='%h ("%s")' HEAD~ + +echo "Building the whole tree with the patch" +time build $tmpfile_e || rc=1 +if [ $rc -eq 1 ]; then + echo "error:" + grep "\(error\):" $tmpfile_e + rm -rf $tmpdir_o $tmpfile_o $tmpfile_n $tmpdir_b $tmpfile_e + exit $rc +fi + +git checkout -q HEAD~ +echo "Building the tree before the patch" +time build $tmpfile_o +incumbent=$(grep -c "\(warning\|error\):" $tmpfile_o) + +git checkout -q $HEAD +echo "Building the tree with the patch" +time build $tmpfile_n || rc=1 +if [ $rc -eq 1 ]; then + echo "error/warning:" + grep "\(warning\|error\):" $tmpfile_n + rm -rf $tmpdir_o $tmpfile_o $tmpfile_n $tmpdir_b + exit $rc +fi + +current=$(grep -c "\(warning\|error\):" $tmpfile_n) +if [ $current -gt $incumbent ]; then + echo "New errors added:" + + tmpfile_errors_before=$(mktemp -p /build) + tmpfile_errors_now=$(mktemp -p /build) + grep "\(warning\|error\):" $tmpfile_o | sort | uniq -c > $tmpfile_errors_before + grep "\(warning\|error\):" $tmpfile_n | sort | uniq -c > $tmpfile_errors_now + + diff -U 0 $tmpfile_errors_before $tmpfile_errors_now + + rm $tmpfile_errors_before $tmpfile_errors_now + + echo "Per-file breakdown" + tmpfile_fo=$(mktemp -p /build) + tmpfile_fn=$(mktemp -p /build) + + echo "error/warning file pre:" + grep "\(warning\|error\):" $tmpfile_o | sed -n 's@\(^\.\./[/a-zA-Z0-9_.-]*.[ch]\):.*@\1@p' | sort | uniq -c \ + > $tmpfile_fo + echo "error/warning file post:" + grep "\(warning\|error\):" $tmpfile_n | sed -n 's@\(^\.\./[/a-zA-Z0-9_.-]*.[ch]\):.*@\1@p' | sort | uniq -c \ + > $tmpfile_fn + + diff -U 0 $tmpfile_fo $tmpfile_fn + rm $tmpfile_fo $tmpfile_fn + echo "pre: $incumbent post: $current" + rc=1 +fi + +rm -rf $tmpdir_o $tmpfile_o $tmpfile_n $tmpdir_b $tmpfile_e +exit $rc diff --git a/.github/scripts/pw_tests/build_rv64_gcc_allmodconfig.sh b/.github/scripts/pw_tests/build_rv64_gcc_allmodconfig.sh new file mode 100644 index 00000000000000..36c2b8334fb416 --- /dev/null +++ b/.github/scripts/pw_tests/build_rv64_gcc_allmodconfig.sh @@ -0,0 +1,88 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (C) 2019 Netronome Systems, Inc. + +# Modified tests/patch/build_defconfig_warn.sh for RISC-V builds + +tmpfile_e=$(mktemp -p /build) +tmpfile_o=$(mktemp -p /build) +tmpfile_n=$(mktemp -p /build) +tmpdir_b=$(mktemp -d -p /build) +tmpdir_o=$(mktemp -d -p /build) + +rc=0 + +build() { + tuxmake --wrapper ccache --target-arch riscv -e PATH=$PATH --directory . \ + --environment=KBUILD_BUILD_TIMESTAMP=@1621270510 \ + --environment=KBUILD_BUILD_USER=tuxmake --environment=KBUILD_BUILD_HOST=tuxmake \ + -o $tmpdir_o -b $tmpdir_b --toolchain gcc -z none --kconfig allmodconfig \ + -K CONFIG_WERROR=n -K CONFIG_GCC_PLUGINS=n \ + -K CONFIG_DRM_WERROR=n \ + W=1 CROSS_COMPILE=riscv64-linux- \ + config default \ + >$1 2>&1 +} + +echo "Redirect to $tmpfile_o and $tmpfile_n" +echo "Tree base:" +HEAD=$(git rev-parse HEAD) +git log -1 --pretty='%h ("%s")' HEAD~ + +echo "Building the whole tree with the patch" +time build $tmpfile_e || rc=1 +if [ $rc -eq 1 ]; then + echo "error:" + grep "\(error\):" $tmpfile_e + rm -rf $tmpdir_o $tmpfile_o $tmpfile_n $tmpdir_b $tmpfile_e + exit $rc +fi + +git checkout -q HEAD~ +echo "Building the tree before the patch" +time build $tmpfile_o +incumbent=$(grep -c "\(warning\|error\):" $tmpfile_o) + +git checkout -q $HEAD +echo "Building the tree with the patch" +time build $tmpfile_n || rc=1 +if [ $rc -eq 1 ]; then + echo "error/warning:" + grep "\(warning\|error\):" $tmpfile_n + rm -rf $tmpdir_o $tmpfile_o $tmpfile_n $tmpdir_b + exit $rc +fi + +current=$(grep -c "\(warning\|error\):" $tmpfile_n) +if [ $current -gt $incumbent ]; then + echo "New errors added:" + + tmpfile_errors_before=$(mktemp -p /build) + tmpfile_errors_now=$(mktemp -p /build) + grep "\(warning\|error\):" $tmpfile_o | sort | uniq -c > $tmpfile_errors_before + grep "\(warning\|error\):" $tmpfile_n | sort | uniq -c > $tmpfile_errors_now + + diff -U 0 $tmpfile_errors_before $tmpfile_errors_now + + rm $tmpfile_errors_before $tmpfile_errors_now + + echo "Per-file breakdown" + tmpfile_fo=$(mktemp -p /build) + tmpfile_fn=$(mktemp -p /build) + + echo "error/warning file pre:" + grep "\(warning\|error\):" $tmpfile_o | sed -n 's@\(^\.\./[/a-zA-Z0-9_.-]*.[ch]\):.*@\1@p' | sort | uniq -c \ + > $tmpfile_fo + grep "\(warning\|error\):" $tmpfile_n | sed -n 's@\(^\.\./[/a-zA-Z0-9_.-]*.[ch]\):.*@\1@p' | sort | uniq -c \ + > $tmpfile_fn + + diff -U 0 $tmpfile_fo $tmpfile_fn + rm $tmpfile_fo $tmpfile_fn + echo "pre: $incumbent post: $current" + + rc=1 +fi + +rm -rf $tmpdir_o $tmpfile_o $tmpfile_n $tmpdir_b $tmpfile_e +exit $rc diff --git a/.github/scripts/pw_tests/build_rv64_nommu_k210_defconfig.sh b/.github/scripts/pw_tests/build_rv64_nommu_k210_defconfig.sh new file mode 100644 index 00000000000000..18a610bae2df63 --- /dev/null +++ b/.github/scripts/pw_tests/build_rv64_nommu_k210_defconfig.sh @@ -0,0 +1,26 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (c) 2022 by Rivos Inc. + +tmpdir=$(mktemp -d -p /build) +tmpfile=$(mktemp -p /build) +rc=0 + +tuxmake --wrapper ccache --target-arch riscv --directory . \ + --environment=KBUILD_BUILD_TIMESTAMP=@1621270510 \ + --environment=KBUILD_BUILD_USER=tuxmake --environment=KBUILD_BUILD_HOST=tuxmake \ + -o $tmpdir --toolchain gcc -z none -k nommu_k210_defconfig \ + CROSS_COMPILE=riscv64-linux- \ + >$tmpfile 2>&1 || rc=1 + +if [ $rc -ne 0 ]; then + echo "Full log:" + cat $tmpfile + echo "warnings/errors:" + grep "\(warning\|error\):" $tmpfile +fi + +rm -rf $tmpdir $tmpfile + +exit $rc diff --git a/.github/scripts/pw_tests/build_rv64_nommu_virt_defconfig.sh b/.github/scripts/pw_tests/build_rv64_nommu_virt_defconfig.sh new file mode 100644 index 00000000000000..7e919812342c41 --- /dev/null +++ b/.github/scripts/pw_tests/build_rv64_nommu_virt_defconfig.sh @@ -0,0 +1,26 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (c) 2022 by Rivos Inc. + +tmpdir=$(mktemp -d -p /build) +tmpfile=$(mktemp -p /build) +rc=0 + +tuxmake --wrapper ccache --target-arch riscv --directory . \ + --environment=KBUILD_BUILD_TIMESTAMP=@1621270510 \ + --environment=KBUILD_BUILD_USER=tuxmake --environment=KBUILD_BUILD_HOST=tuxmake \ + -o $tmpdir --toolchain gcc -z none -k nommu_virt_defconfig \ + CROSS_COMPILE=riscv64-linux- \ + >$tmpfile 2>&1 || rc=1 + +if [ $rc -ne 0 ]; then + echo "Full log:" + cat $tmpfile + echo "warnings/errors:" + grep "\(warning\|error\):" $tmpfile +fi + +rm -rf $tmpdir $tmpfile + +exit $rc diff --git a/.github/scripts/pw_tests/checkpatch.sh b/.github/scripts/pw_tests/checkpatch.sh new file mode 100644 index 00000000000000..ca3946efbf6038 --- /dev/null +++ b/.github/scripts/pw_tests/checkpatch.sh @@ -0,0 +1,34 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (C) 2019 Netronome Systems, Inc. + +IGNORED=\ +COMMIT_LOG_LONG_LINE,\ +MACRO_ARG_REUSE,\ +ALLOC_SIZEOF_STRUCT,\ +NO_AUTHOR_SIGN_OFF,\ +GIT_COMMIT_ID,\ +CAMELCASE + +tmpfile=$(mktemp -p /build) + +./scripts/checkpatch.pl --strict --ignore=$IGNORED -g HEAD | tee $tmpfile + +grep 'total: 0 errors, 0 warnings, 0 checks' $tmpfile +ret=$? + +# return 250 (warning) if there are not errors +[ $ret -ne 0 ] && grep -P 'total: 0 errors, \d+ warnings, \d+ checks' $tmpfile && ret=250 + +if [ $ret -ne 0 ]; then + grep '\(WARNING\|ERROR\|CHECK\): ' $tmpfile | LC_COLLATE=C sort -u +else + grep 'total: ' $tmpfile | LC_COLLATE=C sort -u +fi + +rm $tmpfile + +exit $ret + +# ./scripts/checkpatch.pl --ignore=SPACING_CAST,LONG_LINE,LONG_LINE_COMMENT,LONG_LINE_STRING,LINE_SPACING_STRUCT,FILE_PATH_CHANGES,CAMELCASE,OPEN_ENDED_LINE,AVOID_EXTERNS_HEADER,UNCOMMENTED_DEFINITION diff --git a/.github/scripts/pw_tests/dtb_warn_rv64.sh b/.github/scripts/pw_tests/dtb_warn_rv64.sh new file mode 100644 index 00000000000000..1ab4cfcb8c4fa3 --- /dev/null +++ b/.github/scripts/pw_tests/dtb_warn_rv64.sh @@ -0,0 +1,61 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (C) 2019 Netronome Systems, Inc. + +# Modified tests/patch/build_defconfig_warn.sh for RISC-V builds + +tmpfile_o=$(mktemp -p /build) +tmpfile_n=$(mktemp -p /build) + +tmpdir_o=$(mktemp -d -p /build) +tmpdir_n=$(mktemp -d -p /build) + +rc=0 + +echo "Redirect to $tmpfile_o and $tmpfile_n" + +HEAD=$(git rev-parse HEAD) + +echo "Tree base:" +git log -1 --pretty='%h ("%s")' HEAD~ + +git checkout -q HEAD~ + +echo "Building the tree before the patch" + +make -C . O=$tmpdir_o ARCH=riscv CROSS_COMPILE=riscv64-linux- \ + defconfig + +make -C . O=$tmpdir_o ARCH=riscv CROSS_COMPILE=riscv64-linux- \ + dtbs_check W=1 -j$(nproc) \ + 2> >(tee $tmpfile_o) + +incumbent=$(cat $tmpfile_o | grep -v "From schema" | wc -l) + +echo "Building the tree with the patch" + +git checkout -q $HEAD + +make -C . O=$tmpdir_n ARCH=riscv CROSS_COMPILE=riscv64-linux- \ + defconfig + +make -C . O=$tmpdir_n ARCH=riscv CROSS_COMPILE=riscv64-linux- \ + dtbs_check W=1 -j$(nproc) \ + 2> >(tee $tmpfile_n) || rc=1 + +current=$(cat $tmpfile_n | grep -v "From schema" | wc -l) + +if [ $current -gt $incumbent ]; then + echo "Errors and warnings before: $incumbent this patch: $current" + echo "New errors added" + sed -i 's|^.*arch|arch|g' $tmpfile_o + sed -i 's|^.*arch|arch|g' $tmpfile_n + diff -U 0 $tmpfile_o $tmpfile_n + + rc=1 +fi + +rm -rf $tmpdir_o $tmpdir_n $tmpfile_o $tmpfile_n + +exit $rc diff --git a/.github/scripts/pw_tests/header_inline.sh b/.github/scripts/pw_tests/header_inline.sh new file mode 100644 index 00000000000000..3b33d5ebd91ab0 --- /dev/null +++ b/.github/scripts/pw_tests/header_inline.sh @@ -0,0 +1,19 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (c) 2020 Facebook + +inlines=$( + git show -- '*.h' | grep -C1 -P '^\+static (?!(__always_)?inline).*\('; + git show -- '*.h' | grep -C1 -P '^\+(static )?(?!(__always_)?inline )((unsigned|long|short) )*(char|bool|void|int|u[0-9]*) [0-9A-Za-z_]*\(.*\) *{' + ) + +if [ -z "$inlines" ]; then + exit 0 +fi + +msg="Detected static functions without inline keyword in header files:" +echo -e "$msg\n$inlines" +count=$( (echo "---"; echo "$inlines") | grep '^---$' | wc -l) +echo "$msg $count" +exit 1 diff --git a/.github/scripts/pw_tests/kdoc.sh b/.github/scripts/pw_tests/kdoc.sh new file mode 100644 index 00000000000000..2fc8141e84790d --- /dev/null +++ b/.github/scripts/pw_tests/kdoc.sh @@ -0,0 +1,50 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (C) 2019 Netronome Systems, Inc. +# Copyright (c) 2020 Facebook + +tmpfile_o=$(mktemp -p /build) +tmpfile_n=$(mktemp -p /build) +rc=0 + +files=$(git show --pretty="" --name-only HEAD) + +HEAD=$(git rev-parse HEAD) + +echo "Checking the tree before the patch" +git checkout -q HEAD~ +./scripts/kernel-doc -none $files 2> >(tee $tmpfile_o) + +incumbent=$(grep -v 'Error: Cannot open file ' $tmpfile_o | wc -l) + +echo "Checking the tree with the patch" + +git checkout -q $HEAD +./scripts/kernel-doc -none $files 2> >(tee $tmpfile_n) + +current=$(grep -v 'Error: Cannot open file ' $tmpfile_n | wc -l) + + +if [ $current -gt $incumbent ]; then + echo "Errors and warnings before: $incumbent this patch: $current" + echo "New warnings added" + diff $tmpfile_o $tmpfile_n + + echo "Per-file breakdown" + tmpfile_fo=$(mktemp -p /build) + tmpfile_fn=$(mktemp -p /build) + + grep -i "\(warn\|error\)" $tmpfile_o | sed -n 's@\(^\.\./[/a-zA-Z0-9_.-]*.[ch]\):.*@\1@p' | sort | uniq -c \ + >$tmpfile_fo + grep -i "\(warn\|error\)" $tmpfile_n | sed -n 's@\(^\.\./[/a-zA-Z0-9_.-]*.[ch]\):.*@\1@p' | sort | uniq -c \ + >$tmpfile_fn + + diff $tmpfile_fo $tmpfile_fn + rm $tmpfile_fo $tmpfile_fn + rc=1 +fi + +rm $tmpfile_o $tmpfile_n + +exit $rc diff --git a/.github/scripts/pw_tests/module_param.sh b/.github/scripts/pw_tests/module_param.sh new file mode 100644 index 00000000000000..3af83b63699b14 --- /dev/null +++ b/.github/scripts/pw_tests/module_param.sh @@ -0,0 +1,21 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (c) 2020 Facebook + +params=$(git show | grep -i '^\+.*module_param') +new_params=$(git show | grep -ic '^\+.*module_param') +old_params=$(git show | grep -ic '^\-.*module_param') + +echo "Was $old_params now: $new_params" + +if [ -z "$params" ]; then + exit 0 +fi + +echo -e "Detected module_param\n$params" +if [ $new_params -eq $old_params ]; then + exit 250 +fi + +exit 1 diff --git a/.github/scripts/pw_tests/verify_fixes.sh b/.github/scripts/pw_tests/verify_fixes.sh new file mode 100644 index 00000000000000..23795485e4ffab --- /dev/null +++ b/.github/scripts/pw_tests/verify_fixes.sh @@ -0,0 +1,212 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (C) 2019 Stephen Rothwell +# Copyright (C) 2019 Greg Kroah-Hartman +# Copyright (c) 2020 Facebook +# +# Verify that the "Fixes:" tag is correct in a kernel commit +# +# usage: +# verify_fixes.sh GIT_RANGE +# +# To test just the HEAD commit do: +# verify_fixes.sh HEAD^..HEAD +# +# +# Thanks to Stephen Rothwell for the majority of this code +# + +# Only thing you might want to change here, the location of where Linus's git +# tree is on your system: + +########################################## +# No need to touch anything below here + +split_re='^([Cc][Oo][Mm][Mm][Ii][Tt])?[[:space:]]*([[:xdigit:]]{5,})([[:space:]]*)(.*)$' +nl=$'\n' +tab=$'\t' + +help() +{ + echo "error, git range not found" + echo "usage:" + echo " $0 GIT_RANGE" + exit 1 +} + +# Strip the leading and training spaces from a string +strip_spaces() +{ + [[ "$1" =~ ^[[:space:]]*(.*[^[:space:]])[[:space:]]*$ ]] + echo "${BASH_REMATCH[1]}" +} + +verify_fixes() +{ + git_range=$1 + error=0 + commits=$(git rev-list --no-merges -i --grep='^[[:space:]]*Fixes:' "${git_range}") + if [ -z "$commits" ]; then + echo "No Fixes tag" + return 0 + fi + + for c in $commits; do + + commit_log=$(git log -1 --format='%h ("%s")' "$c") +# commit_msg="In commit: +# $commit_log +#" + commit_msg="Commit: $commit_log +" + + fixes_lines=$(git log -1 --format='%B' "$c" | + grep -i '^[[:space:]]*Fixes:') + + while read -r fline; do + [[ "$fline" =~ ^[[:space:]]*[Ff][Ii][Xx][Ee][Ss]:[[:space:]]*(.*)$ ]] + f="${BASH_REMATCH[1]}" +# fixes_msg=" Fixes tag: +# $fline +# Has these problem(s): +#" + fixes_msg=" Fixes tag: $fline + Has these problem(s): +" + sha= + subject= + msg= + + if git log -1 --format='%B' "$c" | tr '\n' '#' | grep -qF "##$fline##"; then + msg="${msg:+${msg}${nl}}${tab}${tab}- empty lines surround the Fixes tag" + error=$(( error + 1 )) + fi + + if [[ "$f" =~ $split_re ]]; then + first="${BASH_REMATCH[1]}" + sha="${BASH_REMATCH[2]}" + spaces="${BASH_REMATCH[3]}" + subject="${BASH_REMATCH[4]}" + if [ "$first" ]; then + msg="${msg:+${msg}${nl}}${tab}${tab}- leading word '$first' unexpected" + error=$(( error + 1 )) + fi + if [ -z "$subject" ]; then + msg="${msg:+${msg}${nl}}${tab}${tab}- missing subject" + error=$(( error + 1 )) + elif [ -z "$spaces" ]; then + msg="${msg:+${msg}${nl}}${tab}${tab}- missing space between the SHA1 and the subject" + error=$(( error + 1 )) + fi + else + printf '%s%s\t\t- %s\n' "$commit_msg" "$fixes_msg" 'No SHA1 recognised' + error=$(( error + 1 )) + commit_msg='' + continue + fi + if ! git rev-parse -q --verify "$sha" >/dev/null; then + printf '%s%s\t\t- %s\n' "$commit_msg" "$fixes_msg" 'Target SHA1 does not exist' + error=$(( error + 1 )) + commit_msg='' + continue + fi + + if [ "${#sha}" -lt 12 ]; then + msg="${msg:+${msg}${nl}}${tab}${tab}- SHA1 should be at least 12 digits long${nl}${tab}${tab} Can be fixed by setting core.abbrev to 12 (or more) or (for git v2.11${nl}${tab}${tab} or later) just making sure it is not set (or set to \"auto\")." + error=$(( error + 1 )) + fi + # reduce the subject to the part between () if there + if [[ "$subject" =~ ^\((.*)\) ]]; then + subject="${BASH_REMATCH[1]}" + elif [[ "$subject" =~ ^\((.*) ]]; then + subject="${BASH_REMATCH[1]}" + msg="${msg:+${msg}${nl}}${tab}${tab}- Subject has leading but no trailing parentheses" + error=$(( error + 1 )) + fi + + # strip matching quotes at the start and end of the subject + # the unicode characters in the classes are + # U+201C LEFT DOUBLE QUOTATION MARK + # U+201D RIGHT DOUBLE QUOTATION MARK + # U+2018 LEFT SINGLE QUOTATION MARK + # U+2019 RIGHT SINGLE QUOTATION MARK + re1=$'^[\"\u201C](.*)[\"\u201D]$' + re2=$'^[\'\u2018](.*)[\'\u2019]$' + re3=$'^[\"\'\u201C\u2018](.*)$' + if [[ "$subject" =~ $re1 ]]; then + subject="${BASH_REMATCH[1]}" + elif [[ "$subject" =~ $re2 ]]; then + subject="${BASH_REMATCH[1]}" + elif [[ "$subject" =~ $re3 ]]; then + subject="${BASH_REMATCH[1]}" + msg="${msg:+${msg}${nl}}${tab}${tab}- Subject has leading but no trailing quotes" + error=$(( error + 1 )) + fi + + subject=$(strip_spaces "$subject") + + target_subject=$(git log -1 --format='%s' "$sha") + target_subject=$(strip_spaces "$target_subject") + + # match with ellipses + case "$subject" in + *...) subject="${subject%...}" + target_subject="${target_subject:0:${#subject}}" + ;; + ...*) subject="${subject#...}" + target_subject="${target_subject: -${#subject}}" + ;; + *\ ...\ *) + s1="${subject% ... *}" + s2="${subject#* ... }" + subject="$s1 $s2" + t1="${target_subject:0:${#s1}}" + t2="${target_subject: -${#s2}}" + target_subject="$t1 $t2" + ;; + esac + subject=$(strip_spaces "$subject") + target_subject=$(strip_spaces "$target_subject") + + if [ "$subject" != "${target_subject:0:${#subject}}" ]; then + msg="${msg:+${msg}${nl}}${tab}${tab}- Subject does not match target commit subject${nl}${tab}${tab} Just use${nl}${tab}${tab}${tab}git log -1 --format='Fixes: %h (\"%s\")'" + error=$(( error + 1 )) + fi + lsha=$(git rev-parse -q --verify "$sha") + if [ -z "$lsha" ]; then + count=$(git rev-list --count "$sha".."$c") + if [ "$count" -eq 0 ]; then + msg="${msg:+${msg}${nl}}${tab}${tab}- Target is not an ancestor of this commit" + error=$(( error + 1 )) + fi + fi + + if [ "$msg" ]; then + printf '%s%s%s\n' "$commit_msg" "$fixes_msg" "$msg" + commit_msg='' + # Make sure we don't accidentally miss anything. + if [ $error -eq 0 ]; then + echo 'Whoops! $error out of sync with $msg' + error=1 + fi + fi + done <<< "$fixes_lines" + done + +if [ ${error} -ne 0 ] ; then + echo "Problems with Fixes tag: $error" + exit 1 + fi + echo "Fixes tag looks correct" + return 0 +} + +git_range="HEAD~..HEAD" + +if [ "${git_range}" == "" ] ; then + help +fi + +verify_fixes "${git_range}" +exit 0 diff --git a/.github/scripts/pw_tests/verify_signedoff.sh b/.github/scripts/pw_tests/verify_signedoff.sh new file mode 100644 index 00000000000000..efd2366cb52195 --- /dev/null +++ b/.github/scripts/pw_tests/verify_signedoff.sh @@ -0,0 +1,81 @@ +#!/bin/bash +# SPDX-License-Identifier: GPL-2.0 +# +# Copyright (C) 2019 Stephen Rothwell +# Copyright (C) 2019 Greg Kroah-Hartman +# +# Verify that the signed-off-by chain looks correct for a range of git commits. +# +# usage: +# verify_signedoff.sh GIT_RANGE +# +# To test just the HEAD commit do: +# verify_signedoff.sh HEAD^..HEAD +# +# +# Thanks to Stephen Rothwell for the majority of this code +# + +help() +{ + echo "error, git range not found" + echo "usage:" + echo " $0 GIT_RANGE" + exit 1 +} + +verify_signedoff() +{ + git_range=$1 + error=false + for c in $(git rev-list --no-merges "${git_range}"); do + ae=$(git log -1 --format='%ae' "$c") + aE=$(git log -1 --format='%aE' "$c") + an=$(git log -1 --format='%an' "$c") + aN=$(git log -1 --format='%aN' "$c") + ce=$(git log -1 --format='%ce' "$c") + cE=$(git log -1 --format='%cE' "$c") + cn=$(git log -1 --format='%cn' "$c") + cN=$(git log -1 --format='%cN' "$c") + sob=$(git log -1 --format='%b' "$c" | grep -i '^[[:space:]]*Signed-off-by:') + + am=false + cm=false + grep -i -q "<$ae>" <<<"$sob" || + grep -i -q "<$aE>" <<<"$sob" || + grep -i -q ":[[:space:]]*${an}[[:space:]]*<" <<<"$sob" || + grep -i -q ":[[:space:]]*${aN}[[:space:]]*<" <<<"$sob" || + am=true + grep -i -q "<$ce>" <<<"$sob" || + grep -i -q "<$cE>" <<<"$sob" || + grep -i -q ":[[:space:]]*${cn}[[:space:]]*<" <<<"$sob" || + grep -i -q ":[[:space:]]*${cN}[[:space:]]*<" <<<"$sob" || + cm=true + + if "$am" || "$cm"; then + printf "Commit %s\n" "$(git show -s --abbrev-commit --abbrev=12 --pretty=format:"%h (\"%s\")%n" "${c}")" + "$am" && printf "\tauthor Signed-off-by missing\n" + "$cm" && printf "\tcommitter Signed-off-by missing\n" + printf "\tauthor email: %s\n" "$ae" + printf "\tcommitter email: %s\n" "$ce" + readarray -t s <<< "${sob}" + printf "\t%s\n" "${s[@]}" + printf "\n" + error=true + fi + done + if "$error"; then + echo "Errors in tree with Signed-off-by, please fix!" + exit 1 + fi + echo "Signed-off-by tag matches author and committer" +} + +git_range="HEAD~..HEAD" + +if [ "${git_range}" == "" ] ; then + help +fi + +verify_signedoff "${git_range}" +exit 0 diff --git a/.github/scripts/requirements.txt b/.github/scripts/requirements.txt new file mode 100644 index 00000000000000..118fc389f3ad00 --- /dev/null +++ b/.github/scripts/requirements.txt @@ -0,0 +1,5 @@ +PyGithub +python-lsp-server +requests +ply +GitPython diff --git a/.github/scripts/series.sh b/.github/scripts/series.sh new file mode 100755 index 00000000000000..c7d28d7f3240cb --- /dev/null +++ b/.github/scripts/series.sh @@ -0,0 +1,40 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2023 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -euo pipefail +d=$(dirname "${BASH_SOURCE[0]}") +. $d/series/utils.sh + + +logs=$(get_logs_dir) +f=${logs}/series.log + +date -Iseconds | tee -a ${f} +echo "Build, and boot various kernels" | tee -a ${f} +echo "Top 16 commits" | tee -a ${f} +git log -16 --abbrev=12 --pretty="commit %h (\"%s\")" | tee -a ${f} + +kernel_base_sha=$(git log -1 --pretty=%H $(git log -1 --reverse --pretty=%H .github)^) +echo "build_name $(git describe --tags ${kernel_base_sha})" | tee -a ${f} +build_name=$(git describe --tags ${kernel_base_sha}) + +${d}/series/build_all.sh | tee -a ${f} +${d}/series/test_all.sh | tee -a ${f} + +# Some logs contain invalid bytes (not utf-8) and then makes the following +# script fail so convert them all. +for f in `ls ${logs}`; do + iconv -c -t utf-8 ${logs}/${f} > ${logs}/${f}_tmp || true + mv ${logs}/${f}_tmp ${logs}/${f} || true +done + +python3 ${d}/series/github_ci_squad_results.py --logs-path ${logs} +python3 ${d}/series/generate_metadata.py --logs-path ${logs} \ + --job-url ${GITHUB_JOB_URL} --branch ${GITHUB_BRANCH_NAME} + +curl --header "Authorization: token ${SQUAD_TOKEN}" \ + --form tests=@${logs}/squad.json \ + --form metadata=@${logs}/metadata.json \ + https://squad.di.riseproject.dev/api/submit/riscv-linux/linux-all/${build_name}/qemu diff --git a/.github/scripts/series/build_all.sh b/.github/scripts/series/build_all.sh new file mode 100755 index 00000000000000..44082e2861ef8e --- /dev/null +++ b/.github/scripts/series/build_all.sh @@ -0,0 +1,18 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2023 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -euo pipefail + +d=$(dirname "${BASH_SOURCE[0]}") +. $d/utils.sh + +rc=0 +while read xlen config fragment toolchain; do + ${d}/kernel_builder.sh $xlen $config $fragment $toolchain || rc=1 + if [[ $config == "kselftest" ]]; then + ${d}/selftest_builder.sh $xlen $config $fragment $toolchain || rc=1 + fi +done < <($d/generate_build_configs.sh) +exit 0 diff --git a/.github/scripts/series/build_kernel.sh b/.github/scripts/series/build_kernel.sh new file mode 100755 index 00000000000000..1d43196c68db47 --- /dev/null +++ b/.github/scripts/series/build_kernel.sh @@ -0,0 +1,94 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2023 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -x +set -euo pipefail + +d=$(dirname "${BASH_SOURCE[0]}") +. $d/utils.sh + +lnxroot=$(pwd) + +# E.g. build_kernel.sh rv32 defconfig /path/to/fragment llvm +# build_kernel.sh rv64 defconfig plain gcc + +xlen=$1 +config=$2 +fragment=$3 +toolchain=$4 + +install=${ci_root}/$(gen_kernel_name $xlen $config $fragment $toolchain) +output=${install}_build +triple=${ci_triple} + +keep_build=0 # enable for kselftest + +make_gcc() { + make O=$output ARCH=riscv CROSS_COMPILE=${triple}- \ + "CC=ccache ${triple}-gcc" 'HOSTCC=ccache gcc' $* +} + +make_llvm() { + make O=$output ARCH=riscv CROSS_COMPILE=${triple}- \ + LLVM=1 LLVM_IAS=1 'CC=ccache clang' 'HOSTCC=ccache clang' $* +} + +make_wrap() { + if [[ $toolchain == "llvm" ]]; then + make_llvm $* + elif [[ $toolchain == "gcc-old" ]]; then + oldpath=${PATH} + export PATH=/opt/gcc-old/riscv64-linux/bin:${oldpath} + make_gcc $* + export PATH=${oldpath} + else + make_gcc $* + fi +} + +rm -rf ${output} +rm -rf ${install} +mkdir -p ${output} +mkdir -p ${install} + +if [[ $config == "allmodconfig" || $config == "randconfig" ]]; then + make_wrap KCONFIG_ALLCONFIG=$lnxroot/arch/riscv/configs/${xlen//rv/}-bit.config $config + $lnxroot/scripts/kconfig/merge_config.sh -m -O $output $output/.config \ + <(echo "CONFIG_WERROR=n") \ + <(echo "CONFIG_DRM_WERROR=n") \ + <(echo "CONFIG_GCC_PLUGINS=n") +elif [[ $config == "kselftest" ]]; then + apply_patches + trap unapply_patches EXIT + make_wrap defconfig + make_wrap kselftest-merge + $lnxroot/scripts/kconfig/merge_config.sh -y -m -O $output $output/.config \ + <(echo "CONFIG_KERNEL_UNCOMPRESSED=y") + make_wrap olddefconfig + keep_build=1 +elif [[ $config == "testsuites" ]]; then + make_wrap ubuntu_defconfig +else + if [[ $fragment == "plain" ]]; then + $lnxroot/scripts/kconfig/merge_config.sh -y -m -O $output $lnxroot/arch/riscv/configs/$config \ + $lnxroot/arch/riscv/configs/${xlen//rv/}-bit.config \ + <(echo "CONFIG_KERNEL_UNCOMPRESSED=y") + else + $lnxroot/scripts/kconfig/merge_config.sh -y -m -O $output $lnxroot/arch/riscv/configs/$config \ + $fragment \ + $lnxroot/arch/riscv/configs/${xlen//rv/}-bit.config \ + <(echo "CONFIG_KERNEL_UNCOMPRESSED=y") + fi + make_wrap olddefconfig +fi + +make_wrap -j $(nproc) -Oline + +make_wrap INSTALL_PATH=${install} install +make_wrap INSTALL_MOD_STRIP=1 INSTALL_MOD_PATH=${install} modules_install || true + +if ! (( ${keep_build} )); then + rm -rf ${output} +fi diff --git a/.github/scripts/series/build_only_defconfig.sh b/.github/scripts/series/build_only_defconfig.sh new file mode 100755 index 00000000000000..23aad429a41c2d --- /dev/null +++ b/.github/scripts/series/build_only_defconfig.sh @@ -0,0 +1,13 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2024 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -euo pipefail + +d=$(dirname "${BASH_SOURCE[0]}") +. $d/utils.sh + +rc=0 +${d}/kernel_builder.sh rv64 defconfig plain gcc || rc=1 +exit $rc diff --git a/.github/scripts/series/build_only_kselftest.sh b/.github/scripts/series/build_only_kselftest.sh new file mode 100755 index 00000000000000..b935e6d814a34c --- /dev/null +++ b/.github/scripts/series/build_only_kselftest.sh @@ -0,0 +1,15 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2023 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -euo pipefail + +d=$(dirname "${BASH_SOURCE[0]}") +. $d/utils.sh +. $d/kselftest_prep.sh + +rc=0 +${d}/kernel_builder.sh rv64 kselftest plain gcc || rc=1 +${d}/selftest_builder.sh rv64 kselftest plain gcc || rc=1 +exit $rc diff --git a/.github/scripts/series/build_selftest.sh b/.github/scripts/series/build_selftest.sh new file mode 100755 index 00000000000000..7e3434b7185516 --- /dev/null +++ b/.github/scripts/series/build_selftest.sh @@ -0,0 +1,69 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2024 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -x +set -euo pipefail + +d=$(dirname "${BASH_SOURCE[0]}") +. $d/utils.sh + +lnxroot=$(pwd) + +# E.g. build_selftest.sh rv64 kselftest-bpf plain gcc + +xlen=$1 +config=$2 +fragment=$3 +toolchain=$4 + +if ! [[ "$config" =~ ^kselftest ]]; then + echo "Not a selftest config: please try kselftest kselftest-bpf kselftest-net" + exit 1 +fi + +install=${ci_root}/$(gen_kernel_name $xlen $config $fragment $toolchain) +output=${install}_build +triple=${ci_triple} + +if ! [[ -d $output ]]; then + echo "Cannot find kernel build" + exit 1 +fi + +make_gcc() { + make O=$output ARCH=riscv CROSS_COMPILE=${triple}- \ + "CC=${triple}-gcc" 'HOSTCC=gcc' $* +} + +make_llvm() { + make O=$output ARCH=riscv CROSS_COMPILE=${triple}- \ + LLVM=1 LLVM_IAS=1 'CC=clang' 'HOSTCC=clang' $* +} + +make_wrap() { + if [ $toolchain == "llvm" ]; then + make_llvm $* + else + make_gcc $* + fi +} + +apply_patches +trap unapply_patches EXIT + +make_wrap -j $(($(nproc)-1)) headers + +make_wrap SKIP_TARGETS="bpf livepatch" -j $(($(nproc)-1)) -C tools/testing/selftests install +make_wrap TARGETS="bpf" SKIP_TARGETS="" -j $(($(nproc)-1)) -C tools/testing/selftests +make_wrap TARGETS="bpf" SKIP_TARGETS="" COLLECTION="bpf" -j $(($(nproc)-1)) \ + -C tools/testing/selftests/bpf emit_tests | grep -e '^bpf:' \ + >> $output/kselftest/kselftest_install/kselftest-list.txt +cp -R $output/kselftest/bpf $output/kselftest/kselftest_install + +logs=$(get_logs_dir) + +cat $output/kselftest/kselftest_install/kselftest-list.txt \ + | awk -F : '{print "kselftest-"$1}' \ + | uniq | grep -v 'amd\|intel\|livepatch\|lkdtm\|breakpoints\|tdx\|x86' > $logs/kselftest-collections.txt diff --git a/.github/scripts/series/generate_build_configs.sh b/.github/scripts/series/generate_build_configs.sh new file mode 100755 index 00000000000000..2e657bbbb70863 --- /dev/null +++ b/.github/scripts/series/generate_build_configs.sh @@ -0,0 +1,36 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2023 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -euo pipefail + +d=$(dirname "${BASH_SOURCE[0]}") + +toolchains="gcc llvm" + +# SKIP_BUILD_CONFIG_TOOLCHAIN= + +do_generate_toolchain () { + local toolchain=$1 + + if [ ! -z "${SKIP_BUILD_CONFIG_TOOLCHAIN:-}" ] && echo $toolchain | egrep -wq "$SKIP_BUILD_CONFIG_TOOLCHAIN"; then + return 1 + fi + return 0 +} + +while read xlen config fragment; do + if [ $xlen == "rv32" ] && [[ "$config" =~ "k210" ]]; then + continue + fi + + if do_generate_toolchain "gcc"; then + echo $xlen $config $fragment gcc + fi + if do_generate_toolchain "llvm"; then + echo $xlen $config $fragment llvm + fi +done < <($d/generate_kconfigs.sh) + +echo rv64 allmodconfig plain gcc-old diff --git a/.github/scripts/series/generate_kconfigs.sh b/.github/scripts/series/generate_kconfigs.sh new file mode 100755 index 00000000000000..27b0f664b31ff6 --- /dev/null +++ b/.github/scripts/series/generate_kconfigs.sh @@ -0,0 +1,65 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2023 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -euo pipefail + +d=$(dirname "${BASH_SOURCE[0]}") +lnxroot=$(pwd) +kconfigs=$d/kconfigs + +builtin_skip="rv32_defconfig" +builtin_allow="" + +# Too much? Override by uncommenting below: +# echo rv64 defconfig "" && exit 0 + +print() { + if [ ! -z "${SKIP_KCONFIG:-}" ]; then + if echo $* | egrep -q "$SKIP_KCONFIG"; then + return + fi + fi + if [ ! -z "$builtin_skip" ]; then + if echo $* | egrep -q "$builtin_skip"; then + return + fi + fi + if [ ! -z "${ALLOW_KCONFIG:-}" ]; then + if echo $* | egrep -q "$ALLOW_KCONFIG"; then + echo $* + fi + return + fi + if [ ! -z "$builtin_allow" ]; then + if echo $* | egrep -q "$builtin_allow"; then + echo $* + fi + return + fi + + echo $* +} + +defconfigs=$(find $lnxroot/arch/riscv/configs/ -type f -name '*defconfig' -printf '%f\n') +for i in $defconfigs; do + for xlen in 32 64; do + frags=$(echo $i && find $kconfigs/$i -type f -printf '%f\n' 2>/dev/null || :) + for frag in $frags; do + if [ $frag == $i ]; then + fn=${xlen}__${i} + fr="plain" + else + fn=${xlen}_${frag}__$i + fr=$(readlink -f $kconfigs/$i/$frag) + fi + + print rv$xlen $i $fr + done + done +done + +#special case set KCONFIG_ALLCONFIG +print rv32 allmodconfig "plain" +print rv64 allmodconfig "plain" diff --git a/.github/scripts/series/generate_metadata.py b/.github/scripts/series/generate_metadata.py new file mode 100644 index 00000000000000..8249df2387bbf9 --- /dev/null +++ b/.github/scripts/series/generate_metadata.py @@ -0,0 +1,29 @@ +#!/usr/bin/env python3 + +import argparse +import json + +def parse_args(): + parser = argparse.ArgumentParser(description = 'Output Squad metadata') + parser.add_argument("--logs-path", default = "", + help = 'Path to the logs directory') + parser.add_argument("--job-url", default = "", + help = 'URL to the current Github job') + parser.add_argument("--branch", default = "", + help = 'Branch name of the current Github job') + + return parser.parse_args() + +def generate_squad_json(logs_path, job_url, branch): + dict_results = {} + + dict_results["job_url"] = job_url + dict_results["branch"] = branch + + with open(logs_path + "/" + "metadata.json", "w") as f: + json.dump(dict_results, f) + +if __name__ == "__main__": + args = parse_args() + generate_squad_json(args.logs_path, args.job_url, args.branch) + diff --git a/.github/scripts/series/generate_qemu_test_configs.sh b/.github/scripts/series/generate_qemu_test_configs.sh new file mode 100644 index 00000000000000..e62ea9fb06c916 --- /dev/null +++ b/.github/scripts/series/generate_qemu_test_configs.sh @@ -0,0 +1,24 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2024 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -euo pipefail + +xlen=$1 +config=$2 +fragment=$3 +toolchain=$4 +rootfs=$5 + +rv64_cpus=( + "rv64" + "rv64,v=true,vlen=256,elen=64,h=true,zbkb=on,zbkc=on,zbkx=on,zkr=on,zkt=on,svinval=on,svnapot=on,svpbmt=on" +) + +list_cpus+=( "sifive-u54" ) + + +rv32_cpus=( + "rv32" +) diff --git a/.github/scripts/series/generate_test_runs.sh b/.github/scripts/series/generate_test_runs.sh new file mode 100755 index 00000000000000..4d987e7e7abf92 --- /dev/null +++ b/.github/scripts/series/generate_test_runs.sh @@ -0,0 +1,47 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2023 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -euo pipefail + +d=$(dirname "${BASH_SOURCE[0]}") + +rv64_rootfs="alpine ubuntu" +rv32_rootfs="buildroot_glibc" + +# SKIP_TEST_RUN_ROOTFS= + +print() { + if [ ! -z "${SKIP_TEST_RUN_ROOTFS:-}" ]; then + if echo $* | egrep -wq "$SKIP_TEST_RUN_ROOTFS"; then + return + fi + fi + + echo $* +} + +while read xlen config fragment image toolchain; do + if [[ "$config" =~ "nommu" ]]; then + continue + fi + if [[ "$config" =~ "allmodconfig" ]]; then + continue + fi + if [[ "$config" =~ "randconfig" ]]; then + continue + fi + if [[ "$config" =~ "kselftest" ]]; then + print $xlen $config $fragment $image $toolchain ubuntu + continue + fi + + if [[ $xlen == "rv64" ]]; then + print $xlen $config $fragment $image $toolchain alpine + print $xlen $config $fragment $image $toolchain ubuntu + else + print $xlen $config $fragment $image $toolchain buildroot_glibc + print $xlen $config $fragment $image $toolchain buildroot_musl + fi +done < <($d/generate_build_configs.sh) diff --git a/.github/scripts/series/github_ci_squad_results.py b/.github/scripts/series/github_ci_squad_results.py new file mode 100644 index 00000000000000..4da6e7607de169 --- /dev/null +++ b/.github/scripts/series/github_ci_squad_results.py @@ -0,0 +1,78 @@ +#!/usr/bin/env python3 + +import argparse +import json + +def parse_args(): + parser = argparse.ArgumentParser(description = 'Output Squad tests results for the Github CI') + parser.add_argument("--logs-path", default = "", + help = 'Path to the log files') + + return parser.parse_args() + +def generate_squad_json(logs_path): + dict_results = {} + + with open(logs_path + "/series.log", "r") as f: + logs_content = f.readlines() + + for line in logs_content: + # ::notice::OK Build kernel rv64__nommu_k210_sdcard_defconfig__plain__gcc took 15.74s + if not line.startswith("::notice::") and not line.startswith("::error::"): + continue + + # We parse only the Builds to get the build name and then + # we add all the corresponding tests + + # Either "Build" or "Test" + type_result = line.split(" ")[1] + if type_result == "Test": + break + + build_name = line.split(" ")[3] + time = line.split(" ")[-1] + + with open(logs_path + "/build_kernel___" + build_name + ".log", "r") as f: + build_content = f.read() + + if line.split(" ")[0] == "::error::FAIL": + dict_results[build_name + "/build"] = { "result": "fail", "time": time, "log": build_content } + continue + + dict_results[build_name + "/build"] = { "result": "pass", "time": time, "log": build_content } + + # The build succeeded, so look for the associated tests + for test_line in logs_content: + if not test_line.startswith("::notice::") and not test_line.startswith("::error::"): + continue + + type_result = test_line.split(" ")[1] + if type_result == "Build": + continue + + test_build_name = test_line.split(" ")[3] + if test_build_name != build_name: + continue + + rootfs = test_line.split(" ")[4] + test_type = test_line.split(" ")[5] + "__" + test_line.split(" ")[6] + "__" + test_line.split(" ")[7] + "__" + test_line.split(" ")[8] + + log_name = "test_kernel" + "___" + test_build_name + "___" + rootfs + "___" + test_type + ".log" + with open(logs_path + "/" + log_name, "r") as f: + log_content = f.read() + + if test_line.split(" ")[0] == "::error::FAIL": + result = "fail" + else: + result = "pass" + + dict_results[build_name + "/" + rootfs + "___" + test_type] = { "result": result, "log": log_content } + + + with open(logs_path + "/squad.json", "w") as f: + json.dump(dict_results, f) + +if __name__ == "__main__": + args = parse_args() + generate_squad_json(args.logs_path) + diff --git a/.github/scripts/series/kconfigs/defconfig/early_boot_alternative b/.github/scripts/series/kconfigs/defconfig/early_boot_alternative new file mode 100644 index 00000000000000..e0876280809bfd --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/early_boot_alternative @@ -0,0 +1,2 @@ +CONFIG_RISCV_ALTERNATIVE=y +CONFIG_RISCV_ALTERNATIVE_EARLY=y diff --git a/.github/scripts/series/kconfigs/defconfig/early_boot_alternative_reloc b/.github/scripts/series/kconfigs/defconfig/early_boot_alternative_reloc new file mode 100644 index 00000000000000..55bd04829bdc15 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/early_boot_alternative_reloc @@ -0,0 +1,3 @@ +CONFIG_RELOCATABLE=y +CONFIG_RISCV_ALTERNATIVE=y +CONFIG_RISCV_ALTERNATIVE_EARLY=y diff --git a/.github/scripts/series/kconfigs/defconfig/flatmem b/.github/scripts/series/kconfigs/defconfig/flatmem new file mode 100644 index 00000000000000..a0e1ed12d66f58 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/flatmem @@ -0,0 +1,3 @@ +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM_MANUAL=y +CONFIG_FLATMEM=y diff --git a/.github/scripts/series/kconfigs/defconfig/hardened_usercopy_slub b/.github/scripts/series/kconfigs/defconfig/hardened_usercopy_slub new file mode 100644 index 00000000000000..d1a8be99f2f7c4 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/hardened_usercopy_slub @@ -0,0 +1,2 @@ +CONFIG_SLUB=y +CONFIG_HARDENED_USERCOPY=y diff --git a/.github/scripts/series/kconfigs/defconfig/kasan b/.github/scripts/series/kconfigs/defconfig/kasan new file mode 100644 index 00000000000000..642c037c8e96d6 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/kasan @@ -0,0 +1,2 @@ +CONFIG_KASAN=y +# CONFIG_KASAN_VMALLOC is not set diff --git a/.github/scripts/series/kconfigs/defconfig/kasan_inline b/.github/scripts/series/kconfigs/defconfig/kasan_inline new file mode 100644 index 00000000000000..d18d056f78f1fc --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/kasan_inline @@ -0,0 +1,2 @@ +CONFIG_KASAN=y +CONFIG_KASAN_INLINE=y diff --git a/.github/scripts/series/kconfigs/defconfig/kasan_sparsemem_novmemmmap b/.github/scripts/series/kconfigs/defconfig/kasan_sparsemem_novmemmmap new file mode 100644 index 00000000000000..c9b4f0c2efec94 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/kasan_sparsemem_novmemmmap @@ -0,0 +1,5 @@ +CONFIG_KASAN=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +# CONFIG_SPARSEMEM_VMEMMAP is not set diff --git a/.github/scripts/series/kconfigs/defconfig/kasan_sparsemem_vmemmmap b/.github/scripts/series/kconfigs/defconfig/kasan_sparsemem_vmemmmap new file mode 100644 index 00000000000000..669064147997bb --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/kasan_sparsemem_vmemmmap @@ -0,0 +1,5 @@ +CONFIG_KASAN=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_VMEMMAP=y diff --git a/.github/scripts/series/kconfigs/defconfig/kasan_vmalloc b/.github/scripts/series/kconfigs/defconfig/kasan_vmalloc new file mode 100644 index 00000000000000..183e7b2d2ce285 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/kasan_vmalloc @@ -0,0 +1,2 @@ +CONFIG_KASAN=y +CONFIG_KASAN_VMALLOC=y diff --git a/.github/scripts/series/kconfigs/defconfig/kfence b/.github/scripts/series/kconfigs/defconfig/kfence new file mode 100644 index 00000000000000..9037f9b6ad4402 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/kfence @@ -0,0 +1,3 @@ +CONFIG_KFENCE=y +CONFIG_KFENCE_SAMPLE_INTERVAL=100 +CONFIG_KFENCE_NUM_OBJECTS=255 diff --git a/.github/scripts/series/kconfigs/defconfig/legacy_sbi b/.github/scripts/series/kconfigs/defconfig/legacy_sbi new file mode 100644 index 00000000000000..02ed0014719dc7 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/legacy_sbi @@ -0,0 +1,4 @@ +CONFIG_NONPORTABLE=y +CONFIG_RISCV_SBI_V01=y +CONFIG_HVC_RISCV_SBI=y +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y diff --git a/.github/scripts/series/kconfigs/defconfig/lockdep b/.github/scripts/series/kconfigs/defconfig/lockdep new file mode 100644 index 00000000000000..608538fff563ab --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/lockdep @@ -0,0 +1,3 @@ +CONFIG_PROVE_LOCKING=y +CONFIG_DEBUG_LOCK_ALLOC=y +CONFIG_DEBUG_LOCKING_API_SELFTESTS=y diff --git a/.github/scripts/series/kconfigs/defconfig/medany b/.github/scripts/series/kconfigs/defconfig/medany new file mode 100644 index 00000000000000..20d4f94c1cbe25 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/medany @@ -0,0 +1,2 @@ +# CONFIG_CMODEL_MEDLOW is not set +CONFIG_CMODEL_MEDANY=y diff --git a/.github/scripts/series/kconfigs/defconfig/medlow b/.github/scripts/series/kconfigs/defconfig/medlow new file mode 100644 index 00000000000000..79cac7912772f9 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/medlow @@ -0,0 +1,2 @@ +# CONFIG_CMODEL_MEDANY is not set +CONFIG_CMODEL_MEDLOW=y diff --git a/.github/scripts/series/kconfigs/defconfig/noc b/.github/scripts/series/kconfigs/defconfig/noc new file mode 100644 index 00000000000000..9a4a7a1d838922 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/noc @@ -0,0 +1,3 @@ +# CONFIG_RISCV_ISA_C is not set +CONFIG_NONPORTABLE=y +# CONFIG_EFI is not set diff --git a/.github/scripts/series/kconfigs/defconfig/nosmp b/.github/scripts/series/kconfigs/defconfig/nosmp new file mode 100644 index 00000000000000..0c26a8626295e3 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/nosmp @@ -0,0 +1 @@ +# CONFIG_SMP is not set diff --git a/.github/scripts/series/kconfigs/defconfig/pmu b/.github/scripts/series/kconfigs/defconfig/pmu new file mode 100644 index 00000000000000..c57cb3510168fb --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/pmu @@ -0,0 +1,4 @@ +CONFIG_PERF_EVENTS=y +CONFIG_RISCV_SBI=y +CONFIG_RISCV_PMU=y +CONFIG_RISCV_PMU_SBI=y diff --git a/.github/scripts/series/kconfigs/defconfig/preempt b/.github/scripts/series/kconfigs/defconfig/preempt new file mode 100644 index 00000000000000..2b346554f869ec --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/preempt @@ -0,0 +1,2 @@ +CONFIG_PREEMPT=y +CONFIG_DEBUG_PREEMPT=y diff --git a/.github/scripts/series/kconfigs/defconfig/preempt_rt b/.github/scripts/series/kconfigs/defconfig/preempt_rt new file mode 100644 index 00000000000000..ffab30de80e489 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/preempt_rt @@ -0,0 +1 @@ +CONFIG_PREEMPT_RT=y diff --git a/.github/scripts/series/kconfigs/defconfig/qspinlock b/.github/scripts/series/kconfigs/defconfig/qspinlock new file mode 100644 index 00000000000000..7791363d351038 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/qspinlock @@ -0,0 +1 @@ +CONFIG_RISCV_QUEUED_SPINLOCKS=y diff --git a/.github/scripts/series/kconfigs/defconfig/randomize_base b/.github/scripts/series/kconfigs/defconfig/randomize_base new file mode 100644 index 00000000000000..7f9170d16348aa --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/randomize_base @@ -0,0 +1,2 @@ +CONFIG_RELOCATABLE=y +CONFIG_RANDOMIZE_BASE=y diff --git a/.github/scripts/series/kconfigs/defconfig/rseq b/.github/scripts/series/kconfigs/defconfig/rseq new file mode 100644 index 00000000000000..adc7767df654e6 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/rseq @@ -0,0 +1 @@ +CONFIG_RSEQ=y diff --git a/.github/scripts/series/kconfigs/defconfig/rseq_debug b/.github/scripts/series/kconfigs/defconfig/rseq_debug new file mode 100644 index 00000000000000..72a197a93f3465 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/rseq_debug @@ -0,0 +1,3 @@ +CONFIG_RSEQ=y +CONFIG_DEBUG_KERNEL=y +CONFIG_DEBUG_RSEQ=y diff --git a/.github/scripts/series/kconfigs/defconfig/size b/.github/scripts/series/kconfigs/defconfig/size new file mode 100644 index 00000000000000..7a224853ad00a7 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/size @@ -0,0 +1 @@ +CONFIG_CC_OPTIMIZE_FOR_SIZE=y diff --git a/.github/scripts/series/kconfigs/defconfig/sparsemem b/.github/scripts/series/kconfigs/defconfig/sparsemem new file mode 100644 index 00000000000000..cc1d59050946d7 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/sparsemem @@ -0,0 +1,3 @@ +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM=y diff --git a/.github/scripts/series/kconfigs/defconfig/spinwait b/.github/scripts/series/kconfigs/defconfig/spinwait new file mode 100644 index 00000000000000..270b49711e2898 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/spinwait @@ -0,0 +1 @@ +CONFIG_RISCV_BOOT_SPINWAIT=y diff --git a/.github/scripts/series/kconfigs/defconfig/strict_rwx b/.github/scripts/series/kconfigs/defconfig/strict_rwx new file mode 100644 index 00000000000000..8c57b454ad2611 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/strict_rwx @@ -0,0 +1 @@ +CONFIG_STRICT_KERNEL_RWX=y diff --git a/.github/scripts/series/kconfigs/defconfig/svnapot b/.github/scripts/series/kconfigs/defconfig/svnapot new file mode 100644 index 00000000000000..102afb0cff137a --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/svnapot @@ -0,0 +1 @@ +CONFIG_RISCV_ISA_SVNAPOT=y diff --git a/.github/scripts/series/kconfigs/defconfig/ticket_spinlock b/.github/scripts/series/kconfigs/defconfig/ticket_spinlock new file mode 100644 index 00000000000000..05b5fa71b09a80 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/ticket_spinlock @@ -0,0 +1 @@ +CONFIG_RISCV_TICKET_SPINLOCKS=y diff --git a/.github/scripts/series/kconfigs/defconfig/vmap_stack b/.github/scripts/series/kconfigs/defconfig/vmap_stack new file mode 100644 index 00000000000000..8bd986875fc752 --- /dev/null +++ b/.github/scripts/series/kconfigs/defconfig/vmap_stack @@ -0,0 +1 @@ +CONFIG_VMAP_STACK=y diff --git a/.github/scripts/series/kconfigs/ubuntu_defconfig b/.github/scripts/series/kconfigs/ubuntu_defconfig new file mode 100644 index 00000000000000..7a70f4194f0566 --- /dev/null +++ b/.github/scripts/series/kconfigs/ubuntu_defconfig @@ -0,0 +1,5503 @@ +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_WATCH_QUEUE=y +CONFIG_USELIB=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BPF_JIT=y +CONFIG_BPF_JIT_ALWAYS_ON=y +CONFIG_BPF_LSM=y +CONFIG_PREEMPT_VOLUNTARY=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_XACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_PSI=y +CONFIG_IKHEADERS=m +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_NUMA_BALANCING=y +CONFIG_MEMCG=y +CONFIG_BLK_CGROUP=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_CGROUP_PIDS=y +CONFIG_CGROUP_RDMA=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_HUGETLB=y +CONFIG_CPUSETS=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +CONFIG_CGROUP_BPF=y +CONFIG_CGROUP_MISC=y +CONFIG_NAMESPACES=y +CONFIG_USER_NS=y +CONFIG_CHECKPOINT_RESTORE=y +CONFIG_SCHED_AUTOGROUP=y +CONFIG_EXPERT=y +CONFIG_SGETMASK_SYSCALL=y +CONFIG_KALLSYMS_ALL=y +CONFIG_PC104=y +CONFIG_PROFILING=y +CONFIG_SOC_MICROCHIP_POLARFIRE=y +CONFIG_SOC_SIFIVE=y +CONFIG_SOC_STARFIVE=y +CONFIG_SOC_VIRT=y +CONFIG_SMP=y +CONFIG_NR_CPUS=32 +CONFIG_NUMA=y +# CONFIG_RISCV_ISA_SVPBMT is not set +CONFIG_KEXEC=y +CONFIG_KEXEC_FILE=y +CONFIG_CRASH_DUMP=y +# CONFIG_COMPAT is not set +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_CPU_IDLE_GOV_TEO=y +CONFIG_VIRTUALIZATION=y +CONFIG_KVM=y +CONFIG_JUMP_LABEL=y +CONFIG_COMPAT_32BIT_TIME=y +# CONFIG_VMAP_STACK is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_MODULE_SIG_SHA512=y +CONFIG_BLK_DEV_ZONED=y +CONFIG_BLK_DEV_THROTTLING=y +CONFIG_BLK_WBT=y +CONFIG_BLK_CGROUP_FC_APPID=y +CONFIG_BLK_CGROUP_IOCOST=y +CONFIG_BLK_CGROUP_IOPRIO=y +CONFIG_BLK_SED_OPAL=y +CONFIG_BLK_INLINE_ENCRYPTION=y +CONFIG_BLK_INLINE_ENCRYPTION_FALLBACK=y +CONFIG_PARTITION_ADVANCED=y +CONFIG_AIX_PARTITION=y +CONFIG_OSF_PARTITION=y +CONFIG_AMIGA_PARTITION=y +CONFIG_ATARI_PARTITION=y +CONFIG_MAC_PARTITION=y +CONFIG_BSD_DISKLABEL=y +CONFIG_MINIX_SUBPARTITION=y +CONFIG_SOLARIS_X86_PARTITION=y +CONFIG_UNIXWARE_DISKLABEL=y +CONFIG_LDM_PARTITION=y +CONFIG_SGI_PARTITION=y +CONFIG_ULTRIX_PARTITION=y +CONFIG_SUN_PARTITION=y +CONFIG_KARMA_PARTITION=y +CONFIG_SYSV68_PARTITION=y +CONFIG_CMDLINE_PARTITION=y +CONFIG_MQ_IOSCHED_KYBER=m +CONFIG_IOSCHED_BFQ=m +CONFIG_BINFMT_FLAT=y +CONFIG_BINFMT_FLAT_OLD=y +CONFIG_BINFMT_ZFLAT=y +CONFIG_BINFMT_MISC=m +CONFIG_ZSWAP=y +CONFIG_Z3FOLD=m +CONFIG_ZSMALLOC=y +CONFIG_SLAB_FREELIST_RANDOM=y +CONFIG_SLAB_FREELIST_HARDENED=y +CONFIG_SHUFFLE_PAGE_ALLOCATOR=y +# CONFIG_COMPAT_BRK is not set +CONFIG_KSM=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=65536 +CONFIG_TRANSPARENT_HUGEPAGE=y +CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y +CONFIG_CMA=y +CONFIG_CMA_SYSFS=y +CONFIG_CMA_AREAS=7 +CONFIG_IDLE_PAGE_TRACKING=y +CONFIG_ANON_VMA_NAME=y +CONFIG_USERFAULTFD=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_PACKET_DIAG=m +CONFIG_UNIX=y +CONFIG_UNIX_DIAG=m +CONFIG_TLS=m +CONFIG_TLS_DEVICE=y +CONFIG_XFRM_USER=m +CONFIG_XFRM_INTERFACE=m +CONFIG_XFRM_STATISTICS=y +CONFIG_NET_KEY=m +CONFIG_SMC=m +CONFIG_SMC_DIAG=m +CONFIG_XDP_SOCKETS=y +CONFIG_XDP_SOCKETS_DIAG=m +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_FIB_TRIE_STATS=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_IP_ROUTE_MULTIPATH=y +CONFIG_IP_ROUTE_VERBOSE=y +CONFIG_NET_IPIP=m +CONFIG_NET_IPGRE_DEMUX=m +CONFIG_NET_IPGRE=m +CONFIG_NET_IPGRE_BROADCAST=y +CONFIG_IP_MROUTE=y +CONFIG_IP_MROUTE_MULTIPLE_TABLES=y +CONFIG_IP_PIMSM_V1=y +CONFIG_IP_PIMSM_V2=y +CONFIG_NET_IPVTI=m +CONFIG_NET_FOU_IP_TUNNELS=y +CONFIG_INET_AH=m +CONFIG_INET_ESP=m +CONFIG_INET_ESP_OFFLOAD=m +CONFIG_INET_ESPINTCP=y +CONFIG_INET_IPCOMP=m +CONFIG_INET_DIAG=m +CONFIG_INET_UDP_DIAG=m +CONFIG_INET_RAW_DIAG=m +CONFIG_INET_DIAG_DESTROY=y +CONFIG_TCP_CONG_ADVANCED=y +CONFIG_TCP_CONG_HSTCP=m +CONFIG_TCP_CONG_HYBLA=m +CONFIG_TCP_CONG_NV=m +CONFIG_TCP_CONG_SCALABLE=m +CONFIG_TCP_CONG_LP=m +CONFIG_TCP_CONG_VENO=m +CONFIG_TCP_CONG_YEAH=m +CONFIG_TCP_CONG_ILLINOIS=m +CONFIG_TCP_CONG_DCTCP=m +CONFIG_TCP_CONG_CDG=m +CONFIG_TCP_CONG_BBR=m +CONFIG_TCP_MD5SIG=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_ROUTE_INFO=y +CONFIG_INET6_AH=m +CONFIG_INET6_ESP=m +CONFIG_INET6_ESP_OFFLOAD=m +CONFIG_INET6_ESPINTCP=y +CONFIG_INET6_IPCOMP=m +CONFIG_IPV6_MIP6=m +CONFIG_IPV6_ILA=m +CONFIG_IPV6_VTI=m +CONFIG_IPV6_SIT=m +CONFIG_IPV6_SIT_6RD=y +CONFIG_IPV6_GRE=m +CONFIG_IPV6_SUBTREES=y +CONFIG_IPV6_MROUTE=y +CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y +CONFIG_IPV6_PIMSM_V2=y +CONFIG_IPV6_SEG6_LWTUNNEL=y +CONFIG_IPV6_SEG6_HMAC=y +CONFIG_IPV6_IOAM6_LWTUNNEL=y +CONFIG_MPTCP=y +CONFIG_NETWORK_PHY_TIMESTAMPING=y +CONFIG_NETFILTER=y +CONFIG_BRIDGE_NETFILTER=m +CONFIG_NETFILTER_NETLINK_HOOK=m +CONFIG_NF_CONNTRACK=m +CONFIG_NF_CONNTRACK_SECMARK=y +CONFIG_NF_CONNTRACK_ZONES=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CONNTRACK_TIMEOUT=y +CONFIG_NF_CONNTRACK_TIMESTAMP=y +CONFIG_NF_CONNTRACK_AMANDA=m +CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_H323=m +CONFIG_NF_CONNTRACK_IRC=m +CONFIG_NF_CONNTRACK_NETBIOS_NS=m +CONFIG_NF_CONNTRACK_SNMP=m +CONFIG_NF_CONNTRACK_PPTP=m +CONFIG_NF_CONNTRACK_SANE=m +CONFIG_NF_CONNTRACK_SIP=m +CONFIG_NF_CONNTRACK_TFTP=m +CONFIG_NF_CT_NETLINK=m +CONFIG_NF_CT_NETLINK_TIMEOUT=m +CONFIG_NF_CT_NETLINK_HELPER=m +CONFIG_NETFILTER_NETLINK_GLUE_CT=y +CONFIG_NF_TABLES=m +CONFIG_NF_TABLES_INET=y +CONFIG_NF_TABLES_NETDEV=y +CONFIG_NFT_NUMGEN=m +CONFIG_NFT_CT=m +CONFIG_NFT_FLOW_OFFLOAD=m +CONFIG_NFT_CONNLIMIT=m +CONFIG_NFT_LOG=m +CONFIG_NFT_LIMIT=m +CONFIG_NFT_MASQ=m +CONFIG_NFT_REDIR=m +CONFIG_NFT_NAT=m +CONFIG_NFT_TUNNEL=m +CONFIG_NFT_QUEUE=m +CONFIG_NFT_QUOTA=m +CONFIG_NFT_REJECT=m +CONFIG_NFT_COMPAT=m +CONFIG_NFT_HASH=m +CONFIG_NFT_FIB_INET=m +CONFIG_NFT_XFRM=m +CONFIG_NFT_SOCKET=m +CONFIG_NFT_OSF=m +CONFIG_NFT_TPROXY=m +CONFIG_NFT_SYNPROXY=m +CONFIG_NFT_DUP_NETDEV=m +CONFIG_NFT_FWD_NETDEV=m +CONFIG_NFT_FIB_NETDEV=m +CONFIG_NFT_REJECT_NETDEV=m +CONFIG_NF_FLOW_TABLE_INET=m +CONFIG_NF_FLOW_TABLE=m +CONFIG_NETFILTER_XT_SET=m +CONFIG_NETFILTER_XT_TARGET_AUDIT=m +CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m +CONFIG_NETFILTER_XT_TARGET_CONNSECMARK=m +CONFIG_NETFILTER_XT_TARGET_CT=m +CONFIG_NETFILTER_XT_TARGET_DSCP=m +CONFIG_NETFILTER_XT_TARGET_HMARK=m +CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m +CONFIG_NETFILTER_XT_TARGET_LED=m +CONFIG_NETFILTER_XT_TARGET_LOG=m +CONFIG_NETFILTER_XT_TARGET_MARK=m +CONFIG_NETFILTER_XT_TARGET_NFLOG=m +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m +CONFIG_NETFILTER_XT_TARGET_TEE=m +CONFIG_NETFILTER_XT_TARGET_TPROXY=m +CONFIG_NETFILTER_XT_TARGET_TRACE=m +CONFIG_NETFILTER_XT_TARGET_SECMARK=m +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m +CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +CONFIG_NETFILTER_XT_MATCH_BPF=m +CONFIG_NETFILTER_XT_MATCH_CGROUP=m +CONFIG_NETFILTER_XT_MATCH_CLUSTER=m +CONFIG_NETFILTER_XT_MATCH_COMMENT=m +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m +CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_CPU=m +CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m +CONFIG_NETFILTER_XT_MATCH_DSCP=m +CONFIG_NETFILTER_XT_MATCH_ESP=m +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m +CONFIG_NETFILTER_XT_MATCH_HELPER=m +CONFIG_NETFILTER_XT_MATCH_IPCOMP=m +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m +CONFIG_NETFILTER_XT_MATCH_IPVS=m +CONFIG_NETFILTER_XT_MATCH_LENGTH=m +CONFIG_NETFILTER_XT_MATCH_LIMIT=m +CONFIG_NETFILTER_XT_MATCH_MAC=m +CONFIG_NETFILTER_XT_MATCH_MARK=m +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m +CONFIG_NETFILTER_XT_MATCH_NFACCT=m +CONFIG_NETFILTER_XT_MATCH_OSF=m +CONFIG_NETFILTER_XT_MATCH_OWNER=m +CONFIG_NETFILTER_XT_MATCH_POLICY=m +CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m +CONFIG_NETFILTER_XT_MATCH_QUOTA=m +CONFIG_NETFILTER_XT_MATCH_RATEEST=m +CONFIG_NETFILTER_XT_MATCH_REALM=m +CONFIG_NETFILTER_XT_MATCH_RECENT=m +CONFIG_NETFILTER_XT_MATCH_SOCKET=m +CONFIG_NETFILTER_XT_MATCH_STATE=m +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m +CONFIG_NETFILTER_XT_MATCH_STRING=m +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m +CONFIG_NETFILTER_XT_MATCH_TIME=m +CONFIG_NETFILTER_XT_MATCH_U32=m +CONFIG_IP_SET=m +CONFIG_IP_SET_BITMAP_IP=m +CONFIG_IP_SET_BITMAP_IPMAC=m +CONFIG_IP_SET_BITMAP_PORT=m +CONFIG_IP_SET_HASH_IP=m +CONFIG_IP_SET_HASH_IPMARK=m +CONFIG_IP_SET_HASH_IPPORT=m +CONFIG_IP_SET_HASH_IPPORTIP=m +CONFIG_IP_SET_HASH_IPPORTNET=m +CONFIG_IP_SET_HASH_IPMAC=m +CONFIG_IP_SET_HASH_MAC=m +CONFIG_IP_SET_HASH_NETPORTNET=m +CONFIG_IP_SET_HASH_NET=m +CONFIG_IP_SET_HASH_NETNET=m +CONFIG_IP_SET_HASH_NETPORT=m +CONFIG_IP_SET_HASH_NETIFACE=m +CONFIG_IP_SET_LIST_SET=m +CONFIG_IP_VS=m +CONFIG_IP_VS_IPV6=y +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +CONFIG_IP_VS_PROTO_ESP=y +CONFIG_IP_VS_PROTO_AH=y +CONFIG_IP_VS_PROTO_SCTP=y +CONFIG_IP_VS_RR=m +CONFIG_IP_VS_WRR=m +CONFIG_IP_VS_LC=m +CONFIG_IP_VS_WLC=m +CONFIG_IP_VS_FO=m +CONFIG_IP_VS_OVF=m +CONFIG_IP_VS_LBLC=m +CONFIG_IP_VS_LBLCR=m +CONFIG_IP_VS_DH=m +CONFIG_IP_VS_SH=m +CONFIG_IP_VS_MH=m +CONFIG_IP_VS_SED=m +CONFIG_IP_VS_NQ=m +CONFIG_IP_VS_FTP=m +CONFIG_IP_VS_PE_SIP=m +CONFIG_NFT_DUP_IPV4=m +CONFIG_NFT_FIB_IPV4=m +CONFIG_NF_TABLES_ARP=y +CONFIG_NF_LOG_ARP=m +CONFIG_NF_LOG_IPV4=m +CONFIG_IP_NF_IPTABLES=m +CONFIG_IP_NF_MATCH_AH=m +CONFIG_IP_NF_MATCH_ECN=m +CONFIG_IP_NF_MATCH_RPFILTER=m +CONFIG_IP_NF_MATCH_TTL=m +CONFIG_IP_NF_FILTER=m +CONFIG_IP_NF_TARGET_REJECT=m +CONFIG_IP_NF_TARGET_SYNPROXY=m +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_NETMAP=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_NF_MANGLE=m +CONFIG_IP_NF_TARGET_ECN=m +CONFIG_IP_NF_TARGET_TTL=m +CONFIG_IP_NF_RAW=m +CONFIG_IP_NF_SECURITY=m +CONFIG_IP_NF_ARPTABLES=m +CONFIG_IP_NF_ARPFILTER=m +CONFIG_IP_NF_ARP_MANGLE=m +CONFIG_NFT_DUP_IPV6=m +CONFIG_NFT_FIB_IPV6=m +CONFIG_IP6_NF_IPTABLES=m +CONFIG_IP6_NF_MATCH_AH=m +CONFIG_IP6_NF_MATCH_EUI64=m +CONFIG_IP6_NF_MATCH_FRAG=m +CONFIG_IP6_NF_MATCH_OPTS=m +CONFIG_IP6_NF_MATCH_HL=m +CONFIG_IP6_NF_MATCH_IPV6HEADER=m +CONFIG_IP6_NF_MATCH_MH=m +CONFIG_IP6_NF_MATCH_RPFILTER=m +CONFIG_IP6_NF_MATCH_RT=m +CONFIG_IP6_NF_MATCH_SRH=m +CONFIG_IP6_NF_TARGET_HL=m +CONFIG_IP6_NF_FILTER=m +CONFIG_IP6_NF_TARGET_REJECT=m +CONFIG_IP6_NF_TARGET_SYNPROXY=m +CONFIG_IP6_NF_MANGLE=m +CONFIG_IP6_NF_RAW=m +CONFIG_IP6_NF_SECURITY=m +CONFIG_IP6_NF_NAT=m +CONFIG_IP6_NF_TARGET_MASQUERADE=m +CONFIG_IP6_NF_TARGET_NPT=m +CONFIG_NF_TABLES_BRIDGE=m +CONFIG_NFT_BRIDGE_META=m +CONFIG_NFT_BRIDGE_REJECT=m +CONFIG_NF_CONNTRACK_BRIDGE=m +CONFIG_BRIDGE_NF_EBTABLES=m +CONFIG_BRIDGE_EBT_BROUTE=m +CONFIG_BRIDGE_EBT_T_FILTER=m +CONFIG_BRIDGE_EBT_T_NAT=m +CONFIG_BRIDGE_EBT_802_3=m +CONFIG_BRIDGE_EBT_AMONG=m +CONFIG_BRIDGE_EBT_ARP=m +CONFIG_BRIDGE_EBT_IP=m +CONFIG_BRIDGE_EBT_IP6=m +CONFIG_BRIDGE_EBT_LIMIT=m +CONFIG_BRIDGE_EBT_MARK=m +CONFIG_BRIDGE_EBT_PKTTYPE=m +CONFIG_BRIDGE_EBT_STP=m +CONFIG_BRIDGE_EBT_VLAN=m +CONFIG_BRIDGE_EBT_ARPREPLY=m +CONFIG_BRIDGE_EBT_DNAT=m +CONFIG_BRIDGE_EBT_MARK_T=m +CONFIG_BRIDGE_EBT_REDIRECT=m +CONFIG_BRIDGE_EBT_SNAT=m +CONFIG_BRIDGE_EBT_LOG=m +CONFIG_BRIDGE_EBT_NFLOG=m +CONFIG_BPFILTER=y +CONFIG_IP_DCCP=m +# CONFIG_IP_DCCP_CCID3 is not set +CONFIG_SCTP_DEFAULT_COOKIE_HMAC_SHA1=y +CONFIG_SCTP_COOKIE_HMAC_MD5=y +CONFIG_RDS=m +CONFIG_RDS_RDMA=m +CONFIG_RDS_TCP=m +CONFIG_TIPC=m +CONFIG_TIPC_MEDIA_IB=y +CONFIG_ATM=m +CONFIG_ATM_CLIP=m +CONFIG_ATM_LANE=m +CONFIG_ATM_MPOA=m +CONFIG_ATM_BR2684=m +CONFIG_L2TP=m +CONFIG_L2TP_DEBUGFS=m +CONFIG_L2TP_V3=y +CONFIG_L2TP_IP=m +CONFIG_L2TP_ETH=m +CONFIG_BRIDGE=m +CONFIG_BRIDGE_VLAN_FILTERING=y +CONFIG_BRIDGE_MRP=y +CONFIG_BRIDGE_CFM=y +CONFIG_NET_DSA=m +CONFIG_VLAN_8021Q=m +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_VLAN_8021Q_MVRP=y +CONFIG_LLC2=m +CONFIG_ATALK=m +CONFIG_DEV_APPLETALK=m +CONFIG_X25=m +CONFIG_LAPB=m +CONFIG_PHONET=m +CONFIG_6LOWPAN=m +CONFIG_IEEE802154=m +CONFIG_IEEE802154_6LOWPAN=m +CONFIG_MAC802154=m +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_HTB=m +CONFIG_NET_SCH_HFSC=m +CONFIG_NET_SCH_PRIO=m +CONFIG_NET_SCH_MULTIQ=m +CONFIG_NET_SCH_RED=m +CONFIG_NET_SCH_SFB=m +CONFIG_NET_SCH_SFQ=m +CONFIG_NET_SCH_TEQL=m +CONFIG_NET_SCH_TBF=m +CONFIG_NET_SCH_CBS=m +CONFIG_NET_SCH_ETF=m +CONFIG_NET_SCH_TAPRIO=m +CONFIG_NET_SCH_GRED=m +CONFIG_NET_SCH_NETEM=m +CONFIG_NET_SCH_DRR=m +CONFIG_NET_SCH_MQPRIO=m +CONFIG_NET_SCH_SKBPRIO=m +CONFIG_NET_SCH_CHOKE=m +CONFIG_NET_SCH_QFQ=m +CONFIG_NET_SCH_CODEL=m +CONFIG_NET_SCH_FQ_CODEL=m +CONFIG_NET_SCH_CAKE=m +CONFIG_NET_SCH_FQ=m +CONFIG_NET_SCH_HHF=m +CONFIG_NET_SCH_PIE=m +CONFIG_NET_SCH_FQ_PIE=m +CONFIG_NET_SCH_INGRESS=m +CONFIG_NET_SCH_PLUG=m +CONFIG_NET_SCH_ETS=m +CONFIG_NET_CLS_BASIC=m +CONFIG_NET_CLS_ROUTE4=m +CONFIG_NET_CLS_FW=m +CONFIG_NET_CLS_U32=m +CONFIG_CLS_U32_MARK=y +CONFIG_NET_CLS_FLOW=m +CONFIG_NET_CLS_CGROUP=m +CONFIG_NET_CLS_BPF=m +CONFIG_NET_CLS_FLOWER=m +CONFIG_NET_CLS_MATCHALL=m +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_CMP=m +CONFIG_NET_EMATCH_NBYTE=m +CONFIG_NET_EMATCH_U32=m +CONFIG_NET_EMATCH_META=m +CONFIG_NET_EMATCH_TEXT=m +CONFIG_NET_EMATCH_CANID=m +CONFIG_NET_EMATCH_IPSET=m +CONFIG_NET_EMATCH_IPT=m +CONFIG_NET_CLS_ACT=y +CONFIG_NET_ACT_POLICE=m +CONFIG_NET_ACT_GACT=m +CONFIG_GACT_PROB=y +CONFIG_NET_ACT_MIRRED=m +CONFIG_NET_ACT_SAMPLE=m +CONFIG_NET_ACT_IPT=m +CONFIG_NET_ACT_NAT=m +CONFIG_NET_ACT_PEDIT=m +CONFIG_NET_ACT_SIMP=m +CONFIG_NET_ACT_SKBEDIT=m +CONFIG_NET_ACT_CSUM=m +CONFIG_NET_ACT_MPLS=m +CONFIG_NET_ACT_VLAN=m +CONFIG_NET_ACT_BPF=m +CONFIG_NET_ACT_CONNMARK=m +CONFIG_NET_ACT_CTINFO=m +CONFIG_NET_ACT_SKBMOD=m +CONFIG_NET_ACT_TUNNEL_KEY=m +CONFIG_NET_ACT_CT=m +CONFIG_NET_ACT_GATE=m +CONFIG_NET_TC_SKB_EXT=y +CONFIG_DCB=y +CONFIG_DNS_RESOLVER=y +CONFIG_BATMAN_ADV=m +# CONFIG_BATMAN_ADV_BATMAN_V is not set +CONFIG_BATMAN_ADV_NC=y +CONFIG_OPENVSWITCH=m +CONFIG_VSOCKETS=m +CONFIG_VIRTIO_VSOCKETS=m +CONFIG_NETLINK_DIAG=m +CONFIG_MPLS_ROUTING=m +CONFIG_MPLS_IPTUNNEL=m +CONFIG_HSR=m +CONFIG_QRTR_SMD=m +CONFIG_QRTR_TUN=m +CONFIG_NET_NCSI=y +CONFIG_NCSI_OEM_CMD_GET_MAC=y +CONFIG_CGROUP_NET_PRIO=y +CONFIG_BPF_STREAM_PARSER=y +CONFIG_NET_PKTGEN=m +CONFIG_NET_DROP_MONITOR=y +CONFIG_HAMRADIO=y +CONFIG_AX25=m +CONFIG_NETROM=m +CONFIG_ROSE=m +CONFIG_MKISS=m +CONFIG_6PACK=m +CONFIG_BPQETHER=m +CONFIG_BAYCOM_SER_FDX=m +CONFIG_BAYCOM_SER_HDX=m +CONFIG_BAYCOM_PAR=m +CONFIG_YAM=m +CONFIG_CAN=m +CONFIG_CAN_J1939=m +CONFIG_CAN_ISOTP=m +CONFIG_BT=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=m +CONFIG_BT_BNEP_MC_FILTER=y +CONFIG_BT_BNEP_PROTO_FILTER=y +CONFIG_BT_CMTP=m +CONFIG_BT_HIDP=m +CONFIG_BT_HS=y +CONFIG_BT_6LOWPAN=m +CONFIG_BT_LEDS=y +CONFIG_BT_MSFTEXT=y +CONFIG_BT_AOSPEXT=y +CONFIG_BT_HCIBTUSB=m +CONFIG_BT_HCIBTUSB_AUTOSUSPEND=y +CONFIG_BT_HCIBTUSB_MTK=y +CONFIG_BT_HCIBTSDIO=m +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_BCSP=y +CONFIG_BT_HCIUART_ATH3K=y +CONFIG_BT_HCIUART_LL=y +CONFIG_BT_HCIUART_INTEL=y +CONFIG_BT_HCIUART_BCM=y +CONFIG_BT_HCIUART_RTL=y +CONFIG_BT_HCIUART_QCA=y +CONFIG_BT_HCIUART_AG6XX=y +CONFIG_BT_HCIUART_MRVL=y +CONFIG_BT_HCIBCM203X=m +CONFIG_BT_HCIBPA10X=m +CONFIG_BT_HCIBFUSB=m +CONFIG_BT_HCIVHCI=m +CONFIG_BT_MRVL=m +CONFIG_BT_MRVL_SDIO=m +CONFIG_BT_ATH3K=m +CONFIG_BT_MTKSDIO=m +CONFIG_BT_MTKUART=m +CONFIG_BT_VIRTIO=m +CONFIG_AF_RXRPC_IPV6=y +CONFIG_RXKAD=y +CONFIG_AF_KCM=m +CONFIG_MCTP=y +CONFIG_CFG80211=m +CONFIG_CFG80211_DEBUGFS=y +CONFIG_MAC80211=m +CONFIG_MAC80211_MESH=y +CONFIG_MAC80211_MESSAGE_TRACING=y +CONFIG_RFKILL=y +CONFIG_RFKILL_INPUT=y +CONFIG_RFKILL_GPIO=m +CONFIG_NET_9P=y +CONFIG_NET_9P_VIRTIO=y +CONFIG_NET_9P_RDMA=m +CONFIG_CAIF=m +CONFIG_CAIF_USB=m +CONFIG_CEPH_LIB_USE_DNS_RESOLVER=y +CONFIG_NFC=m +CONFIG_NFC_DIGITAL=m +CONFIG_NFC_NCI=m +CONFIG_NFC_NCI_SPI=m +CONFIG_NFC_NCI_UART=m +CONFIG_NFC_HCI=m +CONFIG_NFC_SHDLC=y +CONFIG_NFC_TRF7970A=m +CONFIG_NFC_SIM=m +CONFIG_NFC_PORT100=m +CONFIG_NFC_VIRTUAL_NCI=m +CONFIG_NFC_FDP=m +CONFIG_NFC_FDP_I2C=m +CONFIG_NFC_PN544_I2C=m +CONFIG_NFC_PN533_USB=m +CONFIG_NFC_PN533_I2C=m +CONFIG_NFC_PN532_UART=m +CONFIG_NFC_MICROREAD_I2C=m +CONFIG_NFC_MRVL_USB=m +CONFIG_NFC_MRVL_UART=m +CONFIG_NFC_MRVL_I2C=m +CONFIG_NFC_MRVL_SPI=m +CONFIG_NFC_ST21NFCA_I2C=m +CONFIG_NFC_ST_NCI_I2C=m +CONFIG_NFC_ST_NCI_SPI=m +CONFIG_NFC_NXP_NCI=m +CONFIG_NFC_NXP_NCI_I2C=m +CONFIG_NFC_S3FWRN5_I2C=m +CONFIG_NFC_S3FWRN82_UART=m +CONFIG_NFC_ST95HF=m +CONFIG_NET_IFE=m +CONFIG_PCI=y +CONFIG_PCIEAER=y +CONFIG_PCIE_DPC=y +CONFIG_PCIE_PTM=y +CONFIG_PCI_REALLOC_ENABLE_AUTO=y +CONFIG_PCI_STUB=m +CONFIG_PCI_PF_STUB=m +CONFIG_PCI_IOV=y +CONFIG_PCI_PRI=y +CONFIG_PCI_PASID=y +CONFIG_HOTPLUG_PCI_CPCI=y +CONFIG_HOTPLUG_PCI_SHPC=y +CONFIG_PCI_FTPCI100=y +CONFIG_PCI_HOST_GENERIC=y +CONFIG_PCIE_XILINX=y +CONFIG_PCIE_MICROCHIP_HOST=y +CONFIG_PCIE_DW_PLAT_HOST=y +CONFIG_PCIE_DW_PLAT_EP=y +CONFIG_PCIE_FU740=y +CONFIG_PCIE_CADENCE_PLAT_HOST=y +CONFIG_PCIE_CADENCE_PLAT_EP=y +CONFIG_PCI_J721E_HOST=y +CONFIG_PCI_J721E_EP=y +CONFIG_PCI_ENDPOINT=y +CONFIG_PCI_ENDPOINT_CONFIGFS=y +CONFIG_PCI_EPF_NTB=m +CONFIG_CXL_BUS=m +CONFIG_RAPIDIO=y +CONFIG_RAPIDIO_TSI721=m +CONFIG_RAPIDIO_DMA_ENGINE=y +CONFIG_RAPIDIO_ENUM_BASIC=m +CONFIG_RAPIDIO_CHMAN=m +CONFIG_RAPIDIO_MPORT_CDEV=m +CONFIG_RAPIDIO_CPS_XX=m +CONFIG_RAPIDIO_CPS_GEN2=m +CONFIG_RAPIDIO_RXS_GEN3=m +CONFIG_UEVENT_HELPER=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_DEVTMPFS_SAFE=y +CONFIG_FW_LOADER_COMPRESS=y +CONFIG_FW_LOADER_COMPRESS_ZSTD=y +CONFIG_MOXTET=m +CONFIG_MHI_BUS_PCI_GENERIC=m +CONFIG_MHI_BUS_EP=m +CONFIG_CONNECTOR=y +CONFIG_FIRMWARE_MEMMAP=y +CONFIG_EFI_VARS_PSTORE=m +CONFIG_EFI_BOOTLOADER_CONTROL=m +CONFIG_EFI_CAPSULE_LOADER=m +CONFIG_EFI_TEST=m +CONFIG_RESET_ATTACK_MITIGATION=y +CONFIG_EFI_COCO_SECRET=y +CONFIG_GNSS=m +CONFIG_GNSS_MTK_SERIAL=m +CONFIG_GNSS_SIRF_SERIAL=m +CONFIG_GNSS_UBX_SERIAL=m +CONFIG_GNSS_USB=m +CONFIG_MTD=m +CONFIG_MTD_AR7_PARTS=m +CONFIG_MTD_CMDLINE_PARTS=m +CONFIG_MTD_REDBOOT_PARTS=m +CONFIG_MTD_BLOCK=m +CONFIG_MTD_BLOCK_RO=m +CONFIG_FTL=m +CONFIG_NFTL=m +CONFIG_NFTL_RW=y +CONFIG_INFTL=m +CONFIG_RFD_FTL=m +CONFIG_SSFDC=m +CONFIG_SM_FTL=m +CONFIG_MTD_OOPS=m +CONFIG_MTD_PSTORE=m +CONFIG_MTD_SWAP=m +CONFIG_MTD_JEDECPROBE=m +CONFIG_MTD_CFI_INTELEXT=m +CONFIG_MTD_CFI_STAA=m +CONFIG_MTD_ROM=m +CONFIG_MTD_ABSENT=m +CONFIG_MTD_PHYSMAP=m +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_PHYSMAP_GPIO_ADDR=y +CONFIG_MTD_PCI=m +CONFIG_MTD_INTEL_VR_NOR=m +CONFIG_MTD_PLATRAM=m +CONFIG_MTD_PMC551=m +CONFIG_MTD_DATAFLASH=m +CONFIG_MTD_DATAFLASH_OTP=y +CONFIG_MTD_MCHP23K256=m +CONFIG_MTD_MCHP48L640=m +CONFIG_MTD_SST25L=m +CONFIG_MTD_SLRAM=m +CONFIG_MTD_PHRAM=m +CONFIG_MTD_MTDRAM=m +CONFIG_MTD_BLOCK2MTD=m +CONFIG_MTD_ONENAND=m +CONFIG_MTD_ONENAND_VERIFY_WRITE=y +CONFIG_MTD_ONENAND_GENERIC=m +CONFIG_MTD_ONENAND_2X_PROGRAM=y +CONFIG_MTD_RAW_NAND=m +CONFIG_MTD_NAND_DENALI_PCI=m +CONFIG_MTD_NAND_DENALI_DT=m +CONFIG_MTD_NAND_CAFE=m +CONFIG_MTD_NAND_MXIC=m +CONFIG_MTD_NAND_GPIO=m +CONFIG_MTD_NAND_PLATFORM=m +CONFIG_MTD_NAND_CADENCE=m +CONFIG_MTD_NAND_ARASAN=m +CONFIG_MTD_NAND_INTEL_LGM=m +CONFIG_MTD_NAND_NANDSIM=m +CONFIG_MTD_NAND_RICOH=m +CONFIG_MTD_NAND_DISKONCHIP=m +CONFIG_MTD_SPI_NAND=m +CONFIG_MTD_NAND_ECC_SW_BCH=y +CONFIG_MTD_LPDDR=m +CONFIG_MTD_SPI_NOR=m +CONFIG_MTD_UBI=m +CONFIG_MTD_UBI_FASTMAP=y +CONFIG_MTD_UBI_GLUEBI=m +CONFIG_MTD_UBI_BLOCK=y +CONFIG_MTD_HYPERBUS=m +CONFIG_OF_OVERLAY=y +CONFIG_PARPORT=m +CONFIG_PARPORT_PC=m +CONFIG_PARPORT_SERIAL=m +CONFIG_PARPORT_PC_FIFO=y +CONFIG_PARPORT_1284=y +CONFIG_BLK_DEV_NULL_BLK=m +CONFIG_BLK_DEV_PCIESSD_MTIP32XX=m +CONFIG_ZRAM=m +CONFIG_ZRAM_WRITEBACK=y +CONFIG_ZRAM_MEMORY_TRACKING=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_DRBD=m +CONFIG_BLK_DEV_NBD=m +CONFIG_BLK_DEV_RAM=m +CONFIG_BLK_DEV_RAM_SIZE=65536 +CONFIG_CDROM_PKTCDVD=m +CONFIG_ATA_OVER_ETH=m +CONFIG_VIRTIO_BLK=y +CONFIG_BLK_DEV_RBD=m +CONFIG_BLK_DEV_RNBD_CLIENT=m +CONFIG_BLK_DEV_RNBD_SERVER=m +CONFIG_BLK_DEV_NVME=m +CONFIG_NVME_MULTIPATH=y +CONFIG_NVME_HWMON=y +CONFIG_NVME_RDMA=m +CONFIG_NVME_FC=m +CONFIG_NVME_TCP=m +CONFIG_NVME_TARGET=m +CONFIG_NVME_TARGET_PASSTHRU=y +CONFIG_NVME_TARGET_LOOP=m +CONFIG_NVME_TARGET_RDMA=m +CONFIG_NVME_TARGET_FC=m +CONFIG_NVME_TARGET_TCP=m +CONFIG_AD525X_DPOT=m +CONFIG_AD525X_DPOT_I2C=m +CONFIG_AD525X_DPOT_SPI=m +CONFIG_DUMMY_IRQ=m +CONFIG_PHANTOM=m +CONFIG_ICS932S401=m +CONFIG_ENCLOSURE_SERVICES=m +CONFIG_HI6421V600_IRQ=m +CONFIG_HP_ILO=m +CONFIG_APDS9802ALS=m +CONFIG_ISL29003=m +CONFIG_ISL29020=m +CONFIG_SENSORS_TSL2550=m +CONFIG_SENSORS_BH1770=m +CONFIG_SENSORS_APDS990X=m +CONFIG_HMC6352=m +CONFIG_DS1682=m +CONFIG_LATTICE_ECP3_CONFIG=m +CONFIG_SRAM=y +CONFIG_DW_XDATA_PCIE=m +CONFIG_OPEN_DICE=m +CONFIG_C2PORT=m +CONFIG_EEPROM_AT24=m +CONFIG_EEPROM_AT25=m +CONFIG_EEPROM_LEGACY=m +CONFIG_EEPROM_MAX6875=m +CONFIG_EEPROM_93XX46=m +CONFIG_EEPROM_IDT_89HPESX=m +CONFIG_EEPROM_EE1004=m +CONFIG_TI_ST=m +CONFIG_SENSORS_LIS3_SPI=m +CONFIG_SENSORS_LIS3_I2C=m +CONFIG_GENWQE=m +CONFIG_ECHO=m +CONFIG_BCM_VK=m +CONFIG_BCM_VK_TTY=y +CONFIG_MISC_ALCOR_PCI=m +CONFIG_MISC_RTSX_PCI=m +CONFIG_MISC_RTSX_USB=m +CONFIG_UACCE=m +CONFIG_PVPANIC=y +CONFIG_PVPANIC_MMIO=m +CONFIG_PVPANIC_PCI=m +CONFIG_BLK_DEV_SD=y +CONFIG_CHR_DEV_ST=m +CONFIG_BLK_DEV_SR=y +CONFIG_CHR_DEV_SG=y +CONFIG_CHR_DEV_SCH=m +CONFIG_SCSI_ENCLOSURE=m +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_SCSI_FC_ATTRS=m +CONFIG_SCSI_SAS_ATA=y +CONFIG_ISCSI_TCP=m +CONFIG_SCSI_CXGB3_ISCSI=m +CONFIG_SCSI_CXGB4_ISCSI=m +CONFIG_SCSI_BNX2_ISCSI=m +CONFIG_SCSI_BNX2X_FCOE=m +CONFIG_BE2ISCSI=m +CONFIG_BLK_DEV_3W_XXXX_RAID=m +CONFIG_SCSI_HPSA=m +CONFIG_SCSI_3W_9XXX=m +CONFIG_SCSI_3W_SAS=m +CONFIG_SCSI_ACARD=m +CONFIG_SCSI_AACRAID=m +CONFIG_SCSI_AIC7XXX=m +CONFIG_AIC7XXX_CMDS_PER_DEVICE=8 +# CONFIG_AIC7XXX_DEBUG_ENABLE is not set +CONFIG_SCSI_AIC79XX=m +# CONFIG_AIC79XX_DEBUG_ENABLE is not set +CONFIG_SCSI_AIC94XX=m +# CONFIG_AIC94XX_DEBUG is not set +CONFIG_SCSI_MVSAS=m +# CONFIG_SCSI_MVSAS_DEBUG is not set +CONFIG_SCSI_MVUMI=m +CONFIG_SCSI_ADVANSYS=m +CONFIG_SCSI_ARCMSR=m +CONFIG_SCSI_ESAS2R=m +CONFIG_MEGARAID_NEWGEN=y +CONFIG_MEGARAID_MM=m +CONFIG_MEGARAID_MAILBOX=m +CONFIG_MEGARAID_LEGACY=m +CONFIG_MEGARAID_SAS=m +CONFIG_SCSI_MPT2SAS=m +CONFIG_SCSI_MPI3MR=m +CONFIG_SCSI_SMARTPQI=m +CONFIG_SCSI_HPTIOP=m +CONFIG_SCSI_MYRB=m +CONFIG_SCSI_MYRS=m +CONFIG_LIBFC=m +CONFIG_LIBFCOE=m +CONFIG_FCOE=m +CONFIG_SCSI_SNIC=m +CONFIG_SCSI_DMX3191D=m +CONFIG_SCSI_IPS=m +CONFIG_SCSI_INITIO=m +CONFIG_SCSI_INIA100=m +CONFIG_SCSI_PPA=m +CONFIG_SCSI_IMM=m +CONFIG_SCSI_STEX=m +CONFIG_SCSI_SYM53C8XX_2=m +CONFIG_SCSI_IPR=m +CONFIG_SCSI_QLOGIC_1280=m +CONFIG_SCSI_QLA_FC=m +CONFIG_TCM_QLA2XXX=m +CONFIG_SCSI_QLA_ISCSI=m +CONFIG_QEDI=m +CONFIG_QEDF=m +CONFIG_SCSI_EFCT=m +CONFIG_SCSI_DC395x=m +CONFIG_SCSI_AM53C974=m +CONFIG_SCSI_WD719X=m +CONFIG_SCSI_DEBUG=m +CONFIG_SCSI_PMCRAID=m +CONFIG_SCSI_PM8001=m +CONFIG_SCSI_BFA_FC=m +CONFIG_SCSI_VIRTIO=m +CONFIG_SCSI_CHELSIO_FCOE=m +CONFIG_SCSI_DH=y +CONFIG_SCSI_DH_RDAC=m +CONFIG_SCSI_DH_HP_SW=m +CONFIG_SCSI_DH_EMC=m +CONFIG_SCSI_DH_ALUA=m +CONFIG_ATA=y +CONFIG_SATA_AHCI=m +CONFIG_SATA_MOBILE_LPM_POLICY=3 +CONFIG_SATA_AHCI_PLATFORM=m +CONFIG_AHCI_CEVA=m +CONFIG_AHCI_QORIQ=m +CONFIG_SATA_INIC162X=m +CONFIG_SATA_ACARD_AHCI=m +CONFIG_SATA_SIL24=m +CONFIG_PDC_ADMA=m +CONFIG_SATA_QSTOR=m +CONFIG_SATA_SX4=m +CONFIG_ATA_PIIX=m +CONFIG_SATA_DWC=m +CONFIG_SATA_DWC_OLD_DMA=y +CONFIG_SATA_MV=m +CONFIG_SATA_NV=m +CONFIG_SATA_PROMISE=m +CONFIG_SATA_SIL=m +CONFIG_SATA_SIS=m +CONFIG_SATA_SVW=m +CONFIG_SATA_ULI=m +CONFIG_SATA_VIA=m +CONFIG_SATA_VITESSE=m +CONFIG_PATA_ALI=m +CONFIG_PATA_AMD=m +CONFIG_PATA_ARTOP=m +CONFIG_PATA_ATIIXP=m +CONFIG_PATA_ATP867X=m +CONFIG_PATA_CMD64X=m +CONFIG_PATA_CYPRESS=m +CONFIG_PATA_EFAR=m +CONFIG_PATA_HPT366=m +CONFIG_PATA_HPT37X=m +CONFIG_PATA_HPT3X2N=m +CONFIG_PATA_HPT3X3=m +CONFIG_PATA_IT8213=m +CONFIG_PATA_IT821X=m +CONFIG_PATA_JMICRON=m +CONFIG_PATA_MARVELL=m +CONFIG_PATA_NETCELL=m +CONFIG_PATA_NINJA32=m +CONFIG_PATA_NS87415=m +CONFIG_PATA_OLDPIIX=m +CONFIG_PATA_OPTIDMA=m +CONFIG_PATA_PDC2027X=m +CONFIG_PATA_PDC_OLD=m +CONFIG_PATA_RADISYS=m +CONFIG_PATA_RDC=m +CONFIG_PATA_SCH=m +CONFIG_PATA_SERVERWORKS=m +CONFIG_PATA_SIL680=m +CONFIG_PATA_TOSHIBA=m +CONFIG_PATA_TRIFLEX=m +CONFIG_PATA_VIA=m +CONFIG_PATA_WINBOND=m +CONFIG_PATA_CMD640_PCI=m +CONFIG_PATA_MPIIX=m +CONFIG_PATA_NS87410=m +CONFIG_PATA_OPTI=m +CONFIG_PATA_OF_PLATFORM=m +CONFIG_PATA_RZ1000=m +CONFIG_ATA_GENERIC=m +CONFIG_PATA_LEGACY=m +CONFIG_MD=y +CONFIG_BLK_DEV_MD=y +CONFIG_MD_LINEAR=m +CONFIG_MD_MULTIPATH=m +CONFIG_MD_FAULTY=m +CONFIG_MD_CLUSTER=m +CONFIG_BCACHE=m +CONFIG_BCACHE_ASYNC_REGISTRATION=y +CONFIG_BLK_DEV_DM=y +CONFIG_DM_UNSTRIPED=m +CONFIG_DM_CRYPT=m +CONFIG_DM_SNAPSHOT=m +CONFIG_DM_THIN_PROVISIONING=m +CONFIG_DM_CACHE=m +CONFIG_DM_WRITECACHE=m +CONFIG_DM_EBS=m +CONFIG_DM_ERA=m +CONFIG_DM_CLONE=m +CONFIG_DM_MIRROR=m +CONFIG_DM_LOG_USERSPACE=m +CONFIG_DM_RAID=m +CONFIG_DM_ZERO=m +CONFIG_DM_MULTIPATH=m +CONFIG_DM_MULTIPATH_QL=m +CONFIG_DM_MULTIPATH_ST=m +CONFIG_DM_MULTIPATH_HST=m +CONFIG_DM_MULTIPATH_IOA=m +CONFIG_DM_DELAY=m +CONFIG_DM_INIT=y +CONFIG_DM_UEVENT=y +CONFIG_DM_FLAKEY=m +CONFIG_DM_VERITY=m +CONFIG_DM_VERITY_VERIFY_ROOTHASH_SIG=y +CONFIG_DM_SWITCH=m +CONFIG_DM_LOG_WRITES=m +CONFIG_DM_INTEGRITY=m +CONFIG_DM_ZONED=m +CONFIG_TARGET_CORE=m +CONFIG_TCM_IBLOCK=m +CONFIG_TCM_FILEIO=m +CONFIG_TCM_PSCSI=m +CONFIG_TCM_USER2=m +CONFIG_LOOPBACK_TARGET=m +CONFIG_TCM_FC=m +CONFIG_ISCSI_TARGET=m +CONFIG_ISCSI_TARGET_CXGB4=m +CONFIG_SBP_TARGET=m +CONFIG_FUSION=y +CONFIG_FUSION_SPI=m +CONFIG_FUSION_FC=m +CONFIG_FUSION_SAS=m +CONFIG_FUSION_CTL=m +CONFIG_FUSION_LAN=m +CONFIG_FUSION_LOGGING=y +CONFIG_FIREWIRE=m +CONFIG_FIREWIRE_OHCI=m +CONFIG_FIREWIRE_SBP2=m +CONFIG_FIREWIRE_NET=m +CONFIG_FIREWIRE_NOSY=m +CONFIG_BONDING=m +CONFIG_DUMMY=m +CONFIG_WIREGUARD=m +CONFIG_EQUALIZER=m +CONFIG_NET_FC=y +CONFIG_IFB=m +CONFIG_NET_TEAM=m +CONFIG_NET_TEAM_MODE_BROADCAST=m +CONFIG_NET_TEAM_MODE_ROUNDROBIN=m +CONFIG_NET_TEAM_MODE_RANDOM=m +CONFIG_NET_TEAM_MODE_ACTIVEBACKUP=m +CONFIG_NET_TEAM_MODE_LOADBALANCE=m +CONFIG_MACVLAN=m +CONFIG_MACVTAP=m +CONFIG_IPVLAN=m +CONFIG_IPVTAP=m +CONFIG_VXLAN=m +CONFIG_GENEVE=m +CONFIG_BAREUDP=m +CONFIG_GTP=m +CONFIG_AMT=m +CONFIG_MACSEC=m +CONFIG_NETCONSOLE=m +CONFIG_NETCONSOLE_DYNAMIC=y +CONFIG_NTB_NETDEV=m +CONFIG_RIONET=m +CONFIG_TUN=y +CONFIG_VETH=m +CONFIG_VIRTIO_NET=m +CONFIG_NLMON=m +CONFIG_NET_VRF=m +CONFIG_VSOCKMON=m +CONFIG_MHI_NET=m +CONFIG_ARCNET=m +CONFIG_ARCNET_1201=m +CONFIG_ARCNET_1051=m +CONFIG_ARCNET_RAW=m +CONFIG_ARCNET_CAP=m +CONFIG_ARCNET_COM90xx=m +CONFIG_ARCNET_COM90xxIO=m +CONFIG_ARCNET_RIM_I=m +CONFIG_ARCNET_COM20020=m +CONFIG_ARCNET_COM20020_PCI=m +CONFIG_ATM_DUMMY=m +CONFIG_ATM_TCP=m +CONFIG_ATM_LANAI=m +CONFIG_ATM_ENI=m +CONFIG_ATM_NICSTAR=m +CONFIG_ATM_IDT77252=m +CONFIG_ATM_IA=m +CONFIG_ATM_FORE200E=m +CONFIG_ATM_HE=m +CONFIG_ATM_HE_USE_SUNI=y +CONFIG_ATM_SOLOS=m +CONFIG_CAIF_DRIVERS=y +CONFIG_CAIF_TTY=m +CONFIG_CAIF_VIRTIO=m +CONFIG_B53_SPI_DRIVER=m +CONFIG_B53_MDIO_DRIVER=m +CONFIG_B53_MMAP_DRIVER=m +CONFIG_B53_SRAB_DRIVER=m +CONFIG_B53_SERDES=m +CONFIG_NET_DSA_BCM_SF2=m +CONFIG_NET_DSA_HIRSCHMANN_HELLCREEK=m +CONFIG_NET_DSA_LANTIQ_GSWIP=m +CONFIG_NET_DSA_MT7530=m +CONFIG_NET_DSA_MV88E6060=m +CONFIG_NET_DSA_MICROCHIP_KSZ_COMMON=m +CONFIG_NET_DSA_MICROCHIP_KSZ9477_I2C=m +CONFIG_NET_DSA_MICROCHIP_KSZ8863_SMI=m +CONFIG_NET_DSA_MV88E6XXX=m +CONFIG_NET_DSA_MV88E6XXX_PTP=y +CONFIG_NET_DSA_MSCC_SEVILLE=m +CONFIG_NET_DSA_AR9331=m +CONFIG_NET_DSA_QCA8K=m +CONFIG_NET_DSA_SJA1105=m +CONFIG_NET_DSA_SJA1105_PTP=y +CONFIG_NET_DSA_SJA1105_TAS=y +CONFIG_NET_DSA_SJA1105_VL=y +CONFIG_NET_DSA_XRS700X_I2C=m +CONFIG_NET_DSA_XRS700X_MDIO=m +CONFIG_NET_DSA_REALTEK=m +CONFIG_NET_DSA_REALTEK_RTL8365MB=m +CONFIG_NET_DSA_REALTEK_RTL8366RB=m +CONFIG_NET_DSA_SMSC_LAN9303_I2C=m +CONFIG_NET_DSA_SMSC_LAN9303_MDIO=m +CONFIG_NET_DSA_VITESSE_VSC73XX_SPI=m +CONFIG_NET_DSA_VITESSE_VSC73XX_PLATFORM=m +CONFIG_VORTEX=m +CONFIG_TYPHOON=m +CONFIG_ADAPTEC_STARFIRE=m +CONFIG_ET131X=m +CONFIG_SLICOSS=m +CONFIG_ACENIC=m +CONFIG_ALTERA_TSE=m +CONFIG_ENA_ETHERNET=m +CONFIG_AMD8111_ETH=m +CONFIG_PCNET32=m +CONFIG_AQTION=m +CONFIG_SPI_AX88796C=m +CONFIG_ATL2=m +CONFIG_ATL1=m +CONFIG_ATL1E=m +CONFIG_ATL1C=m +CONFIG_ALX=m +CONFIG_B44=m +CONFIG_BCMGENET=m +CONFIG_TIGON3=m +CONFIG_BNX2X=m +CONFIG_SYSTEMPORT=m +CONFIG_BNXT=m +CONFIG_BNXT_DCB=y +CONFIG_MACB=m +CONFIG_MACB_PCI=m +CONFIG_THUNDER_NIC_PF=m +CONFIG_THUNDER_NIC_VF=m +CONFIG_LIQUIDIO=m +CONFIG_LIQUIDIO_VF=m +CONFIG_CHELSIO_T1=m +CONFIG_CHELSIO_T1_1G=y +CONFIG_CHELSIO_T4_DCB=y +CONFIG_CHELSIO_T4_FCOE=y +CONFIG_CHELSIO_T4VF=m +CONFIG_CHELSIO_IPSEC_INLINE=m +CONFIG_CHELSIO_TLS_DEVICE=m +CONFIG_ENIC=m +CONFIG_GEMINI_ETHERNET=m +CONFIG_DM9051=m +CONFIG_DNET=m +CONFIG_NET_TULIP=y +CONFIG_DE2104X=m +CONFIG_TULIP=m +CONFIG_WINBOND_840=m +CONFIG_DM9102=m +CONFIG_ULI526X=m +CONFIG_DL2K=m +CONFIG_SUNDANCE=m +CONFIG_TSNEP=m +CONFIG_EZCHIP_NPS_MANAGEMENT_ENET=m +CONFIG_FUN_ETH=m +CONFIG_E100=m +CONFIG_E1000=m +CONFIG_E1000E=m +CONFIG_IGB=m +CONFIG_IGBVF=m +CONFIG_IXGB=m +CONFIG_IXGBE=m +CONFIG_IXGBE_DCB=y +CONFIG_IXGBEVF=m +CONFIG_I40E=m +CONFIG_I40E_DCB=y +CONFIG_I40EVF=m +CONFIG_ICE=m +CONFIG_FM10K=m +CONFIG_IGC=m +CONFIG_JME=m +CONFIG_LITEX_LITEETH=m +CONFIG_MVMDIO=m +CONFIG_SKGE=m +CONFIG_SKGE_GENESIS=y +CONFIG_SKY2=m +CONFIG_OCTEON_EP=m +CONFIG_PRESTERA=m +CONFIG_MLX4_EN=m +CONFIG_MLX5_CORE=m +CONFIG_MLX5_FPGA=y +CONFIG_MLX5_CORE_EN=y +CONFIG_MLX5_CORE_IPOIB=y +CONFIG_MLX5_EN_IPSEC=y +CONFIG_MLX5_EN_TLS=y +CONFIG_MLX5_SF=y +CONFIG_MLXSW_CORE=m +CONFIG_KS8842=m +CONFIG_KS8851=m +CONFIG_KS8851_MLL=m +CONFIG_KSZ884X_PCI=m +CONFIG_ENC28J60=m +CONFIG_ENCX24J600=m +CONFIG_LAN743X=m +CONFIG_LAN966X_SWITCH=m +CONFIG_MSCC_OCELOT_SWITCH=m +CONFIG_MYRI10GE=m +CONFIG_NI_XGE_MANAGEMENT_ENET=m +CONFIG_NATSEMI=m +CONFIG_NS83820=m +CONFIG_S2IO=m +CONFIG_NFP=m +CONFIG_NE2K_PCI=m +CONFIG_FORCEDETH=m +CONFIG_ETHOC=m +CONFIG_HAMACHI=m +CONFIG_YELLOWFIN=m +CONFIG_IONIC=m +CONFIG_QLA3XXX=m +CONFIG_QLCNIC=m +CONFIG_NETXEN_NIC=m +CONFIG_QED=m +CONFIG_QEDE=m +CONFIG_BNA=m +CONFIG_QCA7000_SPI=m +CONFIG_QCA7000_UART=m +CONFIG_QCOM_EMAC=m +CONFIG_RMNET=m +CONFIG_R6040=m +CONFIG_8139CP=m +CONFIG_8139TOO=m +CONFIG_8139TOO_8129=y +CONFIG_R8169=m +CONFIG_ROCKER=m +CONFIG_SXGBE_ETH=m +CONFIG_SC92031=m +CONFIG_SIS900=m +CONFIG_SIS190=m +CONFIG_SFC=m +CONFIG_SFC_FALCON=m +CONFIG_SFC_SIENA=m +CONFIG_SFC_SIENA_SRIOV=y +CONFIG_EPIC100=m +CONFIG_SMSC911X=m +CONFIG_SMSC9420=m +CONFIG_STMMAC_ETH=m +CONFIG_DWMAC_DWC_QOS_ETH=m +CONFIG_DWMAC_LOONGSON=m +CONFIG_STMMAC_PCI=m +CONFIG_HAPPYMEAL=m +CONFIG_SUNGEM=m +CONFIG_CASSINI=m +CONFIG_NIU=m +CONFIG_DWC_XLGMAC=m +CONFIG_DWC_XLGMAC_PCI=m +CONFIG_TEHUTI=m +CONFIG_TLAN=m +CONFIG_MSE102X=m +CONFIG_VIA_RHINE=m +CONFIG_VIA_RHINE_MMIO=y +CONFIG_VIA_VELOCITY=m +CONFIG_WIZNET_W5100=m +CONFIG_WIZNET_W5300=m +CONFIG_WIZNET_W5100_SPI=m +CONFIG_XILINX_EMACLITE=m +CONFIG_XILINX_AXI_EMAC=m +CONFIG_XILINX_LL_TEMAC=m +CONFIG_FDDI=y +CONFIG_DEFXX=m +CONFIG_SKFP=m +CONFIG_PHYLIB=y +CONFIG_LED_TRIGGER_PHY=y +CONFIG_SFP=m +CONFIG_AMD_PHY=m +CONFIG_ADIN_PHY=m +CONFIG_ADIN1100_PHY=m +CONFIG_AQUANTIA_PHY=m +CONFIG_BROADCOM_PHY=m +CONFIG_BCM54140_PHY=m +CONFIG_BCM84881_PHY=m +CONFIG_BCM87XX_PHY=m +CONFIG_CICADA_PHY=m +CONFIG_CORTINA_PHY=m +CONFIG_DAVICOM_PHY=m +CONFIG_ICPLUS_PHY=m +CONFIG_LXT_PHY=m +CONFIG_INTEL_XWAY_PHY=m +CONFIG_LSI_ET1011C_PHY=m +CONFIG_MARVELL_PHY=m +CONFIG_MARVELL_10G_PHY=m +CONFIG_MARVELL_88X2222_PHY=m +CONFIG_MAXLINEAR_GPHY=m +CONFIG_MICROCHIP_T1_PHY=m +CONFIG_MICROSEMI_PHY=m +CONFIG_MOTORCOMM_PHY=m +CONFIG_NATIONAL_PHY=m +CONFIG_NXP_C45_TJA11XX_PHY=m +CONFIG_NXP_TJA11XX_PHY=m +CONFIG_AT803X_PHY=m +CONFIG_QSEMI_PHY=m +CONFIG_RENESAS_PHY=m +CONFIG_ROCKCHIP_PHY=m +CONFIG_STE10XP=m +CONFIG_TERANETICS_PHY=m +CONFIG_DP83822_PHY=m +CONFIG_DP83TC811_PHY=m +CONFIG_DP83848_PHY=m +CONFIG_DP83867_PHY=m +CONFIG_DP83869_PHY=m +CONFIG_DP83TD510_PHY=m +CONFIG_XILINX_GMII2RGMII=m +CONFIG_MICREL_KS8995MA=m +CONFIG_CAN_VCAN=m +CONFIG_CAN_VXCAN=m +CONFIG_CAN_FLEXCAN=m +CONFIG_CAN_GRCAN=m +CONFIG_CAN_JANZ_ICAN3=m +CONFIG_CAN_KVASER_PCIEFD=m +CONFIG_CAN_SLCAN=m +CONFIG_CAN_C_CAN=m +CONFIG_CAN_C_CAN_PLATFORM=m +CONFIG_CAN_C_CAN_PCI=m +CONFIG_CAN_CC770=m +CONFIG_CAN_CC770_ISA=m +CONFIG_CAN_CC770_PLATFORM=m +CONFIG_CAN_CTUCANFD_PCI=m +CONFIG_CAN_CTUCANFD_PLATFORM=m +CONFIG_CAN_IFI_CANFD=m +CONFIG_CAN_M_CAN=m +CONFIG_CAN_M_CAN_PCI=m +CONFIG_CAN_M_CAN_PLATFORM=m +CONFIG_CAN_M_CAN_TCAN4X5X=m +CONFIG_CAN_PEAK_PCIEFD=m +CONFIG_CAN_SJA1000=m +CONFIG_CAN_EMS_PCI=m +CONFIG_CAN_F81601=m +CONFIG_CAN_KVASER_PCI=m +CONFIG_CAN_PEAK_PCI=m +CONFIG_CAN_PLX_PCI=m +CONFIG_CAN_SJA1000_ISA=m +CONFIG_CAN_SJA1000_PLATFORM=m +CONFIG_CAN_SOFTING=m +CONFIG_CAN_HI311X=m +CONFIG_CAN_MCP251X=m +CONFIG_CAN_MCP251XFD=m +CONFIG_CAN_8DEV_USB=m +CONFIG_CAN_EMS_USB=m +CONFIG_CAN_ETAS_ES58X=m +CONFIG_CAN_GS_USB=m +CONFIG_CAN_KVASER_USB=m +CONFIG_CAN_MCBA_USB=m +CONFIG_CAN_PEAK_USB=m +CONFIG_CAN_UCAN=m +CONFIG_MCTP_SERIAL=m +CONFIG_MDIO_GPIO=m +CONFIG_MDIO_HISI_FEMAC=m +CONFIG_MDIO_MVUSB=m +CONFIG_MDIO_OCTEON=m +CONFIG_MDIO_IPQ4019=m +CONFIG_MDIO_IPQ8064=m +CONFIG_MDIO_BUS_MUX_GPIO=m +CONFIG_MDIO_BUS_MUX_MULTIPLEXER=m +CONFIG_MDIO_BUS_MUX_MMIOREG=m +CONFIG_PLIP=m +CONFIG_PPP=y +CONFIG_PPP_BSDCOMP=m +CONFIG_PPP_DEFLATE=m +CONFIG_PPP_FILTER=y +CONFIG_PPP_MPPE=m +CONFIG_PPP_MULTILINK=y +CONFIG_PPPOATM=m +CONFIG_PPPOE=m +CONFIG_PPTP=m +CONFIG_PPPOL2TP=m +CONFIG_PPP_ASYNC=m +CONFIG_PPP_SYNC_TTY=m +CONFIG_SLIP=m +CONFIG_SLIP_COMPRESSED=y +CONFIG_SLIP_SMART=y +CONFIG_SLIP_MODE_SLIP6=y +CONFIG_USB_NET_DRIVERS=m +CONFIG_USB_CATC=m +CONFIG_USB_KAWETH=m +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_RTL8152=m +CONFIG_USB_LAN78XX=m +CONFIG_USB_NET_CDC_EEM=m +CONFIG_USB_NET_HUAWEI_CDC_NCM=m +CONFIG_USB_NET_CDC_MBIM=m +CONFIG_USB_NET_DM9601=m +CONFIG_USB_NET_SR9700=m +CONFIG_USB_NET_SR9800=m +CONFIG_USB_NET_SMSC75XX=m +CONFIG_USB_NET_SMSC95XX=m +CONFIG_USB_NET_GL620A=m +CONFIG_USB_NET_PLUSB=m +CONFIG_USB_NET_MCS7830=m +CONFIG_USB_ALI_M5632=y +CONFIG_USB_AN2720=y +CONFIG_USB_EPSON2888=y +CONFIG_USB_KC2190=y +CONFIG_USB_NET_CX82310_ETH=m +CONFIG_USB_NET_KALMIA=m +CONFIG_USB_NET_QMI_WWAN=m +CONFIG_USB_HSO=m +CONFIG_USB_NET_INT51X1=m +CONFIG_USB_CDC_PHONET=m +CONFIG_USB_IPHETH=m +CONFIG_USB_SIERRA_NET=m +CONFIG_USB_VL600=m +CONFIG_USB_NET_CH9200=m +CONFIG_USB_NET_AQC111=m +CONFIG_ADM8211=m +CONFIG_ATH5K=m +CONFIG_ATH9K=m +CONFIG_ATH9K_AHB=y +CONFIG_ATH9K_DEBUGFS=y +CONFIG_ATH9K_STATION_STATISTICS=y +CONFIG_ATH9K_CHANNEL_CONTEXT=y +CONFIG_ATH9K_PCI_NO_EEPROM=m +CONFIG_ATH9K_HTC=m +CONFIG_ATH9K_HTC_DEBUGFS=y +CONFIG_ATH9K_HWRNG=y +CONFIG_ATH9K_COMMON_SPECTRAL=y +CONFIG_CARL9170=m +CONFIG_CARL9170_HWRNG=y +CONFIG_ATH6KL=m +CONFIG_ATH6KL_SDIO=m +CONFIG_ATH6KL_USB=m +CONFIG_AR5523=m +CONFIG_WIL6210=m +CONFIG_WIL6210_TRACING=y +CONFIG_ATH10K=m +CONFIG_ATH10K_PCI=m +CONFIG_ATH10K_AHB=y +CONFIG_ATH10K_SDIO=m +CONFIG_ATH10K_USB=m +CONFIG_ATH10K_DEBUGFS=y +CONFIG_ATH10K_SPECTRAL=y +CONFIG_ATH10K_TRACING=y +CONFIG_WCN36XX=m +CONFIG_ATH11K=m +CONFIG_ATH11K_PCI=m +CONFIG_ATH11K_DEBUGFS=y +CONFIG_ATH11K_TRACING=y +CONFIG_ATH11K_SPECTRAL=y +CONFIG_ATMEL=m +CONFIG_PCI_ATMEL=m +CONFIG_AT76C50X_USB=m +CONFIG_B43=m +CONFIG_B43LEGACY=m +# CONFIG_B43LEGACY_DEBUG is not set +CONFIG_BRCMSMAC=m +CONFIG_BRCMFMAC=m +CONFIG_BRCMFMAC_USB=y +CONFIG_BRCMFMAC_PCIE=y +CONFIG_BRCM_TRACING=y +CONFIG_IPW2100=m +CONFIG_IPW2100_MONITOR=y +CONFIG_IPW2200=m +CONFIG_IPW2200_MONITOR=y +CONFIG_IPW2200_PROMISCUOUS=y +CONFIG_IPW2200_QOS=y +CONFIG_IWL4965=m +CONFIG_IWL3945=m +CONFIG_IWLEGACY_DEBUGFS=y +CONFIG_IWLWIFI=m +CONFIG_IWLDVM=m +CONFIG_IWLMVM=m +CONFIG_IWLWIFI_DEBUGFS=y +CONFIG_HOSTAP=m +CONFIG_HOSTAP_FIRMWARE=y +CONFIG_HOSTAP_FIRMWARE_NVRAM=y +CONFIG_HOSTAP_PLX=m +CONFIG_HOSTAP_PCI=m +CONFIG_HERMES=m +CONFIG_PLX_HERMES=m +CONFIG_TMD_HERMES=m +CONFIG_NORTEL_HERMES=m +CONFIG_ORINOCO_USB=m +CONFIG_P54_COMMON=m +CONFIG_P54_USB=m +CONFIG_P54_PCI=m +CONFIG_P54_SPI=m +CONFIG_LIBERTAS=m +CONFIG_LIBERTAS_USB=m +CONFIG_LIBERTAS_SDIO=m +CONFIG_LIBERTAS_SPI=m +CONFIG_LIBERTAS_MESH=y +CONFIG_LIBERTAS_THINFIRM=m +CONFIG_LIBERTAS_THINFIRM_USB=m +CONFIG_MWIFIEX=m +CONFIG_MWIFIEX_SDIO=m +CONFIG_MWIFIEX_PCIE=m +CONFIG_MWIFIEX_USB=m +CONFIG_MWL8K=m +CONFIG_MT7601U=m +CONFIG_MT76x0U=m +CONFIG_MT76x0E=m +CONFIG_MT76x2E=m +CONFIG_MT76x2U=m +CONFIG_MT7603E=m +CONFIG_MT7615E=m +CONFIG_MT7663U=m +CONFIG_MT7663S=m +CONFIG_MT7915E=m +CONFIG_MT7921E=m +CONFIG_MT7921S=m +CONFIG_MT7921U=m +CONFIG_WILC1000_SDIO=m +CONFIG_WILC1000_SPI=m +CONFIG_WILC1000_HW_OOB_INTR=y +CONFIG_PLFXLC=m +CONFIG_RT2X00=m +CONFIG_RT2400PCI=m +CONFIG_RT2500PCI=m +CONFIG_RT61PCI=m +CONFIG_RT2800PCI=m +CONFIG_RT2500USB=m +CONFIG_RT73USB=m +CONFIG_RT2800USB=m +CONFIG_RT2800USB_RT3573=y +CONFIG_RT2800USB_RT53XX=y +CONFIG_RT2800USB_RT55XX=y +CONFIG_RT2800USB_UNKNOWN=y +CONFIG_RTL8180=m +CONFIG_RTL8187=m +CONFIG_RTL8192CE=m +CONFIG_RTL8192SE=m +CONFIG_RTL8192DE=m +CONFIG_RTL8723AE=m +CONFIG_RTL8723BE=m +CONFIG_RTL8188EE=m +CONFIG_RTL8192EE=m +CONFIG_RTL8821AE=m +CONFIG_RTL8192CU=m +# CONFIG_RTLWIFI_DEBUG is not set +CONFIG_RTL8XXXU=m +CONFIG_RTL8XXXU_UNTESTED=y +CONFIG_RTW88=m +CONFIG_RTW88_8822BE=m +CONFIG_RTW88_8822CE=m +CONFIG_RTW88_8723DE=m +CONFIG_RTW88_8821CE=m +CONFIG_RTW88_DEBUG=y +CONFIG_RTW88_DEBUGFS=y +CONFIG_RTW89=m +CONFIG_RTW89_8852AE=m +CONFIG_RTW89_8852CE=m +CONFIG_RTW89_DEBUGMSG=y +CONFIG_RTW89_DEBUGFS=y +CONFIG_RSI_91X=m +# CONFIG_RSI_DEBUGFS is not set +CONFIG_WFX=m +CONFIG_CW1200=m +CONFIG_CW1200_WLAN_SDIO=m +CONFIG_CW1200_WLAN_SPI=m +CONFIG_WL1251=m +CONFIG_WL1251_SPI=m +CONFIG_WL1251_SDIO=m +CONFIG_WL12XX=m +CONFIG_WL18XX=m +CONFIG_WLCORE_SPI=m +CONFIG_WLCORE_SDIO=m +CONFIG_USB_ZD1201=m +CONFIG_ZD1211RW=m +CONFIG_QTNFMAC_PCIE=m +CONFIG_MAC80211_HWSIM=m +CONFIG_USB_NET_RNDIS_WLAN=m +CONFIG_VIRT_WIFI=m +CONFIG_WAN=y +CONFIG_HDLC=m +CONFIG_HDLC_RAW=m +CONFIG_HDLC_RAW_ETH=m +CONFIG_HDLC_CISCO=m +CONFIG_HDLC_FR=m +CONFIG_HDLC_PPP=m +CONFIG_HDLC_X25=m +CONFIG_PCI200SYN=m +CONFIG_WANXL=m +CONFIG_PC300TOO=m +CONFIG_FARSYNC=m +CONFIG_LAPBETHER=m +CONFIG_IEEE802154_FAKELB=m +CONFIG_IEEE802154_AT86RF230=m +CONFIG_IEEE802154_MRF24J40=m +CONFIG_IEEE802154_CC2520=m +CONFIG_IEEE802154_ATUSB=m +CONFIG_IEEE802154_ADF7242=m +CONFIG_IEEE802154_CA8210=m +CONFIG_IEEE802154_CA8210_DEBUGFS=y +CONFIG_IEEE802154_MCR20A=m +CONFIG_IEEE802154_HWSIM=m +CONFIG_WWAN=m +CONFIG_WWAN_HWSIM=m +CONFIG_MHI_WWAN_CTRL=m +CONFIG_MHI_WWAN_MBIM=m +CONFIG_RPMSG_WWAN_CTRL=m +CONFIG_MTK_T7XX=m +CONFIG_VMXNET3=m +CONFIG_USB4_NET=m +CONFIG_NETDEVSIM=m +CONFIG_ISDN=y +CONFIG_MISDN=m +CONFIG_MISDN_DSP=m +CONFIG_MISDN_L1OIP=m +CONFIG_MISDN_HFCPCI=m +CONFIG_MISDN_HFCMULTI=m +CONFIG_MISDN_HFCUSB=m +CONFIG_MISDN_AVMFRITZ=m +CONFIG_MISDN_SPEEDFAX=m +CONFIG_MISDN_INFINEON=m +CONFIG_MISDN_W6692=m +CONFIG_MISDN_NETJET=m +CONFIG_INPUT_LEDS=m +CONFIG_INPUT_SPARSEKMAP=m +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_JOYDEV=m +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_EVBUG=m +CONFIG_KEYBOARD_ADC=m +CONFIG_KEYBOARD_ADP5520=m +CONFIG_KEYBOARD_ADP5588=m +CONFIG_KEYBOARD_ADP5589=m +CONFIG_KEYBOARD_QT1050=m +CONFIG_KEYBOARD_QT1070=m +CONFIG_KEYBOARD_QT2160=m +CONFIG_KEYBOARD_DLINK_DIR685=m +CONFIG_KEYBOARD_LKKBD=m +CONFIG_KEYBOARD_GPIO=m +CONFIG_KEYBOARD_GPIO_POLLED=m +CONFIG_KEYBOARD_TCA6416=m +CONFIG_KEYBOARD_TCA8418=m +CONFIG_KEYBOARD_MATRIX=m +CONFIG_KEYBOARD_LM8323=m +CONFIG_KEYBOARD_LM8333=m +CONFIG_KEYBOARD_MAX7359=m +CONFIG_KEYBOARD_MCS=m +CONFIG_KEYBOARD_MPR121=m +CONFIG_KEYBOARD_NEWTON=m +CONFIG_KEYBOARD_OPENCORES=m +CONFIG_KEYBOARD_SAMSUNG=m +CONFIG_KEYBOARD_GOLDFISH_EVENTS=m +CONFIG_KEYBOARD_STOWAWAY=m +CONFIG_KEYBOARD_SUNKBD=m +CONFIG_KEYBOARD_STMPE=m +CONFIG_KEYBOARD_IQS62X=m +CONFIG_KEYBOARD_OMAP4=m +CONFIG_KEYBOARD_TC3589X=m +CONFIG_KEYBOARD_TM2_TOUCHKEY=m +CONFIG_KEYBOARD_TWL4030=m +CONFIG_KEYBOARD_XTKBD=m +CONFIG_KEYBOARD_CAP11XX=m +CONFIG_KEYBOARD_BCM=m +CONFIG_KEYBOARD_MTK_PMIC=m +CONFIG_KEYBOARD_CYPRESS_SF=m +CONFIG_MOUSE_PS2=m +CONFIG_MOUSE_PS2_ELANTECH=y +CONFIG_MOUSE_PS2_SENTELIC=y +CONFIG_MOUSE_PS2_TOUCHKIT=y +CONFIG_MOUSE_SERIAL=m +CONFIG_MOUSE_APPLETOUCH=m +CONFIG_MOUSE_BCM5974=m +CONFIG_MOUSE_CYAPA=m +CONFIG_MOUSE_ELAN_I2C=m +CONFIG_MOUSE_ELAN_I2C_SMBUS=y +CONFIG_MOUSE_VSXXXAA=m +CONFIG_MOUSE_GPIO=m +CONFIG_MOUSE_SYNAPTICS_I2C=m +CONFIG_MOUSE_SYNAPTICS_USB=m +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_ANALOG=m +CONFIG_JOYSTICK_A3D=m +CONFIG_JOYSTICK_ADC=m +CONFIG_JOYSTICK_ADI=m +CONFIG_JOYSTICK_COBRA=m +CONFIG_JOYSTICK_GF2K=m +CONFIG_JOYSTICK_GRIP=m +CONFIG_JOYSTICK_GRIP_MP=m +CONFIG_JOYSTICK_GUILLEMOT=m +CONFIG_JOYSTICK_INTERACT=m +CONFIG_JOYSTICK_SIDEWINDER=m +CONFIG_JOYSTICK_TMDC=m +CONFIG_JOYSTICK_IFORCE=m +CONFIG_JOYSTICK_IFORCE_USB=m +CONFIG_JOYSTICK_IFORCE_232=m +CONFIG_JOYSTICK_WARRIOR=m +CONFIG_JOYSTICK_MAGELLAN=m +CONFIG_JOYSTICK_SPACEORB=m +CONFIG_JOYSTICK_SPACEBALL=m +CONFIG_JOYSTICK_STINGER=m +CONFIG_JOYSTICK_TWIDJOY=m +CONFIG_JOYSTICK_ZHENHUA=m +CONFIG_JOYSTICK_DB9=m +CONFIG_JOYSTICK_GAMECON=m +CONFIG_JOYSTICK_TURBOGRAFX=m +CONFIG_JOYSTICK_AS5011=m +CONFIG_JOYSTICK_JOYDUMP=m +CONFIG_JOYSTICK_XPAD=m +CONFIG_JOYSTICK_XPAD_FF=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_JOYSTICK_WALKERA0701=m +CONFIG_JOYSTICK_PSXPAD_SPI=m +CONFIG_JOYSTICK_PSXPAD_SPI_FF=y +CONFIG_JOYSTICK_PXRC=m +CONFIG_JOYSTICK_QWIIC=m +CONFIG_JOYSTICK_FSIA6B=m +CONFIG_JOYSTICK_SENSEHAT=m +CONFIG_INPUT_TABLET=y +CONFIG_TABLET_USB_ACECAD=m +CONFIG_TABLET_USB_AIPTEK=m +CONFIG_TABLET_USB_HANWANG=m +CONFIG_TABLET_USB_KBTAB=m +CONFIG_TABLET_USB_PEGASUS=m +CONFIG_TABLET_SERIAL_WACOM4=m +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_88PM860X=m +CONFIG_TOUCHSCREEN_ADS7846=m +CONFIG_TOUCHSCREEN_AD7877=m +CONFIG_TOUCHSCREEN_AD7879=m +CONFIG_TOUCHSCREEN_AD7879_I2C=m +CONFIG_TOUCHSCREEN_AD7879_SPI=m +CONFIG_TOUCHSCREEN_ADC=m +CONFIG_TOUCHSCREEN_AR1021_I2C=m +CONFIG_TOUCHSCREEN_ATMEL_MXT=m +CONFIG_TOUCHSCREEN_ATMEL_MXT_T37=y +CONFIG_TOUCHSCREEN_AUO_PIXCIR=m +CONFIG_TOUCHSCREEN_BU21013=m +CONFIG_TOUCHSCREEN_BU21029=m +CONFIG_TOUCHSCREEN_CHIPONE_ICN8318=m +CONFIG_TOUCHSCREEN_CY8CTMA140=m +CONFIG_TOUCHSCREEN_CY8CTMG110=m +CONFIG_TOUCHSCREEN_CYTTSP_CORE=m +CONFIG_TOUCHSCREEN_CYTTSP_I2C=m +CONFIG_TOUCHSCREEN_CYTTSP_SPI=m +CONFIG_TOUCHSCREEN_CYTTSP4_CORE=m +CONFIG_TOUCHSCREEN_CYTTSP4_I2C=m +CONFIG_TOUCHSCREEN_CYTTSP4_SPI=m +CONFIG_TOUCHSCREEN_DA9034=m +CONFIG_TOUCHSCREEN_DA9052=m +CONFIG_TOUCHSCREEN_DYNAPRO=m +CONFIG_TOUCHSCREEN_HAMPSHIRE=m +CONFIG_TOUCHSCREEN_EETI=m +CONFIG_TOUCHSCREEN_EGALAX=m +CONFIG_TOUCHSCREEN_EGALAX_SERIAL=m +CONFIG_TOUCHSCREEN_EXC3000=m +CONFIG_TOUCHSCREEN_FUJITSU=m +CONFIG_TOUCHSCREEN_GOODIX=m +CONFIG_TOUCHSCREEN_HIDEEP=m +CONFIG_TOUCHSCREEN_HYCON_HY46XX=m +CONFIG_TOUCHSCREEN_ILI210X=m +CONFIG_TOUCHSCREEN_ILITEK=m +CONFIG_TOUCHSCREEN_S6SY761=m +CONFIG_TOUCHSCREEN_GUNZE=m +CONFIG_TOUCHSCREEN_EKTF2127=m +CONFIG_TOUCHSCREEN_ELAN=m +CONFIG_TOUCHSCREEN_ELO=m +CONFIG_TOUCHSCREEN_WACOM_W8001=m +CONFIG_TOUCHSCREEN_WACOM_I2C=m +CONFIG_TOUCHSCREEN_MAX11801=m +CONFIG_TOUCHSCREEN_MCS5000=m +CONFIG_TOUCHSCREEN_MMS114=m +CONFIG_TOUCHSCREEN_MELFAS_MIP4=m +CONFIG_TOUCHSCREEN_MSG2638=m +CONFIG_TOUCHSCREEN_MTOUCH=m +CONFIG_TOUCHSCREEN_IMAGIS=m +CONFIG_TOUCHSCREEN_IMX6UL_TSC=m +CONFIG_TOUCHSCREEN_INEXIO=m +CONFIG_TOUCHSCREEN_MK712=m +CONFIG_TOUCHSCREEN_PENMOUNT=m +CONFIG_TOUCHSCREEN_EDT_FT5X06=m +CONFIG_TOUCHSCREEN_TOUCHRIGHT=m +CONFIG_TOUCHSCREEN_TOUCHWIN=m +CONFIG_TOUCHSCREEN_TI_AM335X_TSC=m +CONFIG_TOUCHSCREEN_PIXCIR=m +CONFIG_TOUCHSCREEN_WDT87XX_I2C=m +CONFIG_TOUCHSCREEN_WM831X=m +CONFIG_TOUCHSCREEN_WM97XX=m +CONFIG_TOUCHSCREEN_USB_COMPOSITE=m +CONFIG_TOUCHSCREEN_MC13783=m +CONFIG_TOUCHSCREEN_TOUCHIT213=m +CONFIG_TOUCHSCREEN_TSC_SERIO=m +CONFIG_TOUCHSCREEN_TSC2004=m +CONFIG_TOUCHSCREEN_TSC2005=m +CONFIG_TOUCHSCREEN_TSC2007=m +CONFIG_TOUCHSCREEN_TSC2007_IIO=y +CONFIG_TOUCHSCREEN_PCAP=m +CONFIG_TOUCHSCREEN_RM_TS=m +CONFIG_TOUCHSCREEN_SILEAD=m +CONFIG_TOUCHSCREEN_SIS_I2C=m +CONFIG_TOUCHSCREEN_ST1232=m +CONFIG_TOUCHSCREEN_STMFTS=m +CONFIG_TOUCHSCREEN_STMPE=m +CONFIG_TOUCHSCREEN_SUR40=m +CONFIG_TOUCHSCREEN_SURFACE3_SPI=m +CONFIG_TOUCHSCREEN_SX8654=m +CONFIG_TOUCHSCREEN_TPS6507X=m +CONFIG_TOUCHSCREEN_ZET6223=m +CONFIG_TOUCHSCREEN_ZFORCE=m +CONFIG_TOUCHSCREEN_COLIBRI_VF50=m +CONFIG_TOUCHSCREEN_ROHM_BU21023=m +CONFIG_TOUCHSCREEN_IQS5XX=m +CONFIG_TOUCHSCREEN_ZINITIX=m +CONFIG_INPUT_MISC=y +CONFIG_INPUT_88PM860X_ONKEY=m +CONFIG_INPUT_88PM80X_ONKEY=m +CONFIG_INPUT_AD714X=m +CONFIG_INPUT_ARIZONA_HAPTICS=m +CONFIG_INPUT_ATC260X_ONKEY=m +CONFIG_INPUT_ATMEL_CAPTOUCH=m +CONFIG_INPUT_BMA150=m +CONFIG_INPUT_E3X0_BUTTON=m +CONFIG_INPUT_MAX77650_ONKEY=m +CONFIG_INPUT_MAX77693_HAPTIC=m +CONFIG_INPUT_MAX8925_ONKEY=m +CONFIG_INPUT_MAX8997_HAPTIC=m +CONFIG_INPUT_MC13783_PWRBUTTON=m +CONFIG_INPUT_MMA8450=m +CONFIG_INPUT_GPIO_BEEPER=m +CONFIG_INPUT_GPIO_DECODER=m +CONFIG_INPUT_GPIO_VIBRA=m +CONFIG_INPUT_CPCAP_PWRBUTTON=m +CONFIG_INPUT_ATI_REMOTE2=m +CONFIG_INPUT_KEYSPAN_REMOTE=m +CONFIG_INPUT_KXTJ9=m +CONFIG_INPUT_POWERMATE=m +CONFIG_INPUT_YEALINK=m +CONFIG_INPUT_CM109=m +CONFIG_INPUT_REGULATOR_HAPTIC=m +CONFIG_INPUT_RETU_PWRBUTTON=m +CONFIG_INPUT_TPS65218_PWRBUTTON=m +CONFIG_INPUT_AXP20X_PEK=m +CONFIG_INPUT_TWL4030_PWRBUTTON=m +CONFIG_INPUT_TWL4030_VIBRA=m +CONFIG_INPUT_TWL6040_VIBRA=m +CONFIG_INPUT_UINPUT=y +CONFIG_INPUT_PALMAS_PWRBUTTON=m +CONFIG_INPUT_PCF50633_PMU=m +CONFIG_INPUT_PCF8574=m +CONFIG_INPUT_PWM_BEEPER=m +CONFIG_INPUT_PWM_VIBRA=m +CONFIG_INPUT_RK805_PWRKEY=m +CONFIG_INPUT_GPIO_ROTARY_ENCODER=m +CONFIG_INPUT_DA7280_HAPTICS=m +CONFIG_INPUT_DA9052_ONKEY=m +CONFIG_INPUT_DA9055_ONKEY=m +CONFIG_INPUT_DA9063_ONKEY=m +CONFIG_INPUT_WM831X_ON=m +CONFIG_INPUT_PCAP=m +CONFIG_INPUT_ADXL34X=m +CONFIG_INPUT_IMS_PCU=m +CONFIG_INPUT_IQS269A=m +CONFIG_INPUT_IQS626A=m +CONFIG_INPUT_IQS7222=m +CONFIG_INPUT_CMA3000=m +CONFIG_INPUT_CMA3000_I2C=m +CONFIG_INPUT_DRV260X_HAPTICS=m +CONFIG_INPUT_DRV2665_HAPTICS=m +CONFIG_INPUT_DRV2667_HAPTICS=m +CONFIG_INPUT_RAVE_SP_PWRBUTTON=m +CONFIG_INPUT_STPMIC1_ONKEY=m +CONFIG_RMI4_I2C=m +CONFIG_RMI4_SPI=m +CONFIG_RMI4_SMB=m +CONFIG_RMI4_F34=y +CONFIG_RMI4_F3A=y +CONFIG_RMI4_F54=y +CONFIG_SERIO_SERPORT=m +CONFIG_SERIO_PARKBD=m +CONFIG_SERIO_PCIPS2=m +CONFIG_SERIO_RAW=m +CONFIG_SERIO_ALTERA_PS2=m +CONFIG_SERIO_PS2MULT=m +CONFIG_SERIO_ARC_PS2=m +CONFIG_SERIO_APBPS2=m +CONFIG_SERIO_GPIO_PS2=m +CONFIG_USERIO=m +CONFIG_GAMEPORT_NS558=m +CONFIG_GAMEPORT_L4=m +CONFIG_GAMEPORT_EMU10K1=m +CONFIG_GAMEPORT_FM801=m +CONFIG_LEGACY_PTY_COUNT=0 +CONFIG_SERIAL_8250=y +# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set +CONFIG_SERIAL_8250_FINTEK=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_EXAR=m +CONFIG_SERIAL_8250_MEN_MCB=m +CONFIG_SERIAL_8250_NR_UARTS=48 +CONFIG_SERIAL_8250_RUNTIME_UARTS=32 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_8250_RSA=y +CONFIG_SERIAL_8250_DW=m +CONFIG_SERIAL_8250_RT288X=y +CONFIG_SERIAL_8250_PERICOM=m +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_KGDB_NMI=y +CONFIG_SERIAL_MAX3100=m +CONFIG_SERIAL_MAX310X=y +CONFIG_SERIAL_UARTLITE=m +CONFIG_SERIAL_JSM=m +CONFIG_SERIAL_SCCNXP=y +CONFIG_SERIAL_SCCNXP_CONSOLE=y +CONFIG_SERIAL_SC16IS7XX=m +CONFIG_SERIAL_SC16IS7XX_SPI=y +CONFIG_SERIAL_ALTERA_JTAGUART=m +CONFIG_SERIAL_ALTERA_UART=m +CONFIG_SERIAL_XILINX_PS_UART=m +CONFIG_SERIAL_ARC=m +CONFIG_SERIAL_RP2=m +CONFIG_SERIAL_FSL_LPUART=m +CONFIG_SERIAL_CONEXANT_DIGICOLOR=m +CONFIG_SERIAL_MEN_Z135=m +CONFIG_SERIAL_SPRD=m +CONFIG_SERIAL_LITEUART=m +CONFIG_SERIAL_NONSTANDARD=y +CONFIG_MOXA_INTELLIO=m +CONFIG_MOXA_SMARTIO=m +CONFIG_SYNCLINK_GT=m +CONFIG_N_HDLC=m +CONFIG_GOLDFISH_TTY=m +CONFIG_N_GSM=m +CONFIG_NOZOMI=m +CONFIG_NULL_TTY=m +CONFIG_RPMSG_TTY=m +CONFIG_SERIAL_DEV_BUS=y +CONFIG_TTY_PRINTK=y +CONFIG_PRINTER=m +CONFIG_PPDEV=m +CONFIG_VIRTIO_CONSOLE=y +CONFIG_IPMI_HANDLER=m +CONFIG_IPMI_DEVICE_INTERFACE=m +CONFIG_IPMI_SSIF=m +CONFIG_IPMI_WATCHDOG=m +CONFIG_IPMI_POWEROFF=m +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_TIMERIOMEM=m +CONFIG_HW_RANDOM_BA431=m +CONFIG_HW_RANDOM_VIRTIO=m +CONFIG_HW_RANDOM_POLARFIRE_SOC=m +CONFIG_HW_RANDOM_CCTRNG=m +CONFIG_HW_RANDOM_XIPHERA=m +CONFIG_APPLICOM=m +CONFIG_TCG_TIS=y +CONFIG_TCG_TIS_SPI=m +CONFIG_TCG_TIS_SPI_CR50=y +CONFIG_TCG_TIS_I2C_CR50=m +CONFIG_TCG_TIS_I2C_ATMEL=m +CONFIG_TCG_TIS_I2C_INFINEON=m +CONFIG_TCG_TIS_I2C_NUVOTON=m +CONFIG_TCG_ATMEL=m +CONFIG_TCG_VTPM_PROXY=m +CONFIG_TCG_TIS_ST33ZP24_I2C=m +CONFIG_TCG_TIS_ST33ZP24_SPI=m +CONFIG_XILLYBUS=m +CONFIG_XILLYBUS_PCIE=m +CONFIG_XILLYBUS_OF=m +CONFIG_XILLYUSB=m +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_ARB_GPIO_CHALLENGE=m +CONFIG_I2C_MUX_GPIO=m +CONFIG_I2C_MUX_GPMUX=m +CONFIG_I2C_MUX_LTC4306=m +CONFIG_I2C_MUX_PCA9541=m +CONFIG_I2C_MUX_PCA954x=m +CONFIG_I2C_MUX_PINCTRL=m +CONFIG_I2C_MUX_REG=m +CONFIG_I2C_DEMUX_PINCTRL=m +CONFIG_I2C_MUX_MLXCPLD=m +CONFIG_I2C_ALI1535=m +CONFIG_I2C_ALI1563=m +CONFIG_I2C_ALI15X3=m +CONFIG_I2C_AMD756=m +CONFIG_I2C_AMD8111=m +CONFIG_I2C_I801=m +CONFIG_I2C_ISCH=m +CONFIG_I2C_PIIX4=m +CONFIG_I2C_NFORCE2=m +CONFIG_I2C_NVIDIA_GPU=m +CONFIG_I2C_SIS5595=m +CONFIG_I2C_SIS630=m +CONFIG_I2C_SIS96X=m +CONFIG_I2C_VIA=m +CONFIG_I2C_VIAPRO=m +CONFIG_I2C_CBUS_GPIO=m +CONFIG_I2C_DESIGNWARE_PLATFORM=y +CONFIG_I2C_DESIGNWARE_PCI=m +CONFIG_I2C_GPIO=m +CONFIG_I2C_KEMPLD=m +CONFIG_I2C_OCORES=m +CONFIG_I2C_PCA_PLATFORM=m +CONFIG_I2C_RK3X=m +CONFIG_I2C_SIMTEC=m +CONFIG_I2C_XILINX=m +CONFIG_I2C_DIOLAN_U2C=m +CONFIG_I2C_DLN2=m +CONFIG_I2C_CP2615=m +CONFIG_I2C_PARPORT=m +CONFIG_I2C_ROBOTFUZZ_OSIF=m +CONFIG_I2C_TAOS_EVM=m +CONFIG_I2C_TINY_USB=m +CONFIG_I2C_VIPERBOARD=m +CONFIG_I2C_FSI=m +CONFIG_I2C_VIRTIO=m +CONFIG_I2C_STUB=m +CONFIG_I3C=m +CONFIG_CDNS_I3C_MASTER=m +CONFIG_DW_I3C_MASTER=m +CONFIG_SVC_I3C_MASTER=m +CONFIG_MIPI_I3C_HCI=m +CONFIG_SPI=y +CONFIG_SPI_ALTERA=m +CONFIG_SPI_ALTERA_DFL=m +CONFIG_SPI_AXI_SPI_ENGINE=m +CONFIG_SPI_BUTTERFLY=m +CONFIG_SPI_CADENCE=m +CONFIG_SPI_CADENCE_XSPI=m +CONFIG_SPI_DESIGNWARE=m +CONFIG_SPI_DW_DMA=y +CONFIG_SPI_DW_PCI=m +CONFIG_SPI_DW_MMIO=m +CONFIG_SPI_DLN2=m +CONFIG_SPI_FSI=m +CONFIG_SPI_NXP_FLEXSPI=m +CONFIG_SPI_GPIO=m +CONFIG_SPI_LM70_LLP=m +CONFIG_SPI_FSL_SPI=y +CONFIG_SPI_OC_TINY=m +CONFIG_SPI_PXA2XX=m +CONFIG_SPI_SC18IS602=m +CONFIG_SPI_SIFIVE=y +CONFIG_SPI_MXIC=m +CONFIG_SPI_XCOMM=m +CONFIG_SPI_ZYNQMP_GQSPI=m +CONFIG_SPI_AMD=m +CONFIG_SPI_MUX=m +CONFIG_SPI_SPIDEV=m +CONFIG_SPI_LOOPBACK_TEST=m +CONFIG_SPI_TLE62X0=m +CONFIG_SPI_SLAVE=y +CONFIG_SPI_SLAVE_TIME=m +CONFIG_SPI_SLAVE_SYSTEM_CONTROL=m +CONFIG_SPMI=m +CONFIG_SPMI_HISI3670=m +CONFIG_HSI=m +CONFIG_HSI_CHAR=m +CONFIG_PPS_CLIENT_LDISC=m +CONFIG_PPS_CLIENT_PARPORT=m +CONFIG_PPS_CLIENT_GPIO=m +CONFIG_DP83640_PHY=m +CONFIG_PTP_1588_CLOCK_INES=m +CONFIG_PTP_1588_CLOCK_IDT82P33=m +CONFIG_PTP_1588_CLOCK_IDTCM=m +CONFIG_PTP_1588_CLOCK_OCP=m +CONFIG_PINCTRL_AS3722=y +CONFIG_PINCTRL_AXP209=m +CONFIG_PINCTRL_DA9062=m +CONFIG_PINCTRL_MAX77620=m +CONFIG_PINCTRL_MCP23S08=m +CONFIG_PINCTRL_MICROCHIP_SGPIO=y +CONFIG_PINCTRL_OCELOT=y +CONFIG_PINCTRL_PALMAS=y +CONFIG_PINCTRL_RK805=m +CONFIG_PINCTRL_SINGLE=y +CONFIG_PINCTRL_STMFX=m +CONFIG_PINCTRL_SX150X=y +CONFIG_PINCTRL_LOCHNAGAR=m +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_74XX_MMIO=m +CONFIG_GPIO_ALTERA=m +CONFIG_GPIO_CADENCE=m +CONFIG_GPIO_DWAPB=m +CONFIG_GPIO_EXAR=m +CONFIG_GPIO_FTGPIO010=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_GPIO_GRGPIO=m +CONFIG_GPIO_HLWD=m +CONFIG_GPIO_LOGICVC=m +CONFIG_GPIO_MB86S7X=m +CONFIG_GPIO_MENZ127=m +CONFIG_GPIO_SIFIVE=y +CONFIG_GPIO_SIOX=m +CONFIG_GPIO_SYSCON=m +CONFIG_GPIO_WCD934X=m +CONFIG_GPIO_ADNP=m +CONFIG_GPIO_GW_PLD=m +CONFIG_GPIO_MAX7300=m +CONFIG_GPIO_MAX732X=m +CONFIG_GPIO_PCA953X=m +CONFIG_GPIO_PCA953X_IRQ=y +CONFIG_GPIO_PCA9570=m +CONFIG_GPIO_PCF857X=m +CONFIG_GPIO_TPIC2810=m +CONFIG_GPIO_ADP5520=m +CONFIG_GPIO_ARIZONA=m +CONFIG_GPIO_BD71815=m +CONFIG_GPIO_BD71828=m +CONFIG_GPIO_BD9571MWV=m +CONFIG_GPIO_DA9052=m +CONFIG_GPIO_DA9055=m +CONFIG_GPIO_DLN2=m +CONFIG_GPIO_JANZ_TTL=m +CONFIG_GPIO_KEMPLD=m +CONFIG_GPIO_LP3943=m +CONFIG_GPIO_LP873X=m +CONFIG_GPIO_LP87565=m +CONFIG_GPIO_MADERA=m +CONFIG_GPIO_MAX77620=m +CONFIG_GPIO_MAX77650=m +CONFIG_GPIO_PALMAS=y +CONFIG_GPIO_RC5T583=y +CONFIG_GPIO_STMPE=y +CONFIG_GPIO_TC3589X=y +CONFIG_GPIO_TPS65086=m +CONFIG_GPIO_TPS65218=m +CONFIG_GPIO_TPS6586X=y +CONFIG_GPIO_TPS65910=y +CONFIG_GPIO_TPS65912=m +CONFIG_GPIO_TWL4030=m +CONFIG_GPIO_TWL6040=m +CONFIG_GPIO_WM831X=m +CONFIG_GPIO_WM8350=m +CONFIG_GPIO_WM8994=m +CONFIG_GPIO_PCI_IDIO_16=m +CONFIG_GPIO_PCIE_IDIO_24=m +CONFIG_GPIO_RDC321X=m +CONFIG_GPIO_74X164=m +CONFIG_GPIO_MAX3191X=m +CONFIG_GPIO_MAX7301=m +CONFIG_GPIO_MC33880=m +CONFIG_GPIO_PISOSR=m +CONFIG_GPIO_XRA1403=m +CONFIG_GPIO_MOXTET=m +CONFIG_GPIO_VIPERBOARD=m +CONFIG_GPIO_AGGREGATOR=m +CONFIG_GPIO_VIRTIO=m +CONFIG_GPIO_SIM=m +CONFIG_W1_MASTER_MATROX=m +CONFIG_W1_MASTER_DS2490=m +CONFIG_W1_MASTER_DS2482=m +CONFIG_W1_MASTER_GPIO=m +CONFIG_W1_MASTER_SGI=m +CONFIG_W1_SLAVE_THERM=m +CONFIG_W1_SLAVE_SMEM=m +CONFIG_W1_SLAVE_DS2405=m +CONFIG_W1_SLAVE_DS2408=m +CONFIG_W1_SLAVE_DS2413=m +CONFIG_W1_SLAVE_DS2406=m +CONFIG_W1_SLAVE_DS2423=m +CONFIG_W1_SLAVE_DS2805=m +CONFIG_W1_SLAVE_DS2430=m +CONFIG_W1_SLAVE_DS2431=m +CONFIG_W1_SLAVE_DS2433=m +CONFIG_W1_SLAVE_DS2438=m +CONFIG_W1_SLAVE_DS250X=m +CONFIG_W1_SLAVE_DS28E04=m +CONFIG_W1_SLAVE_DS28E17=m +CONFIG_POWER_RESET_AS3722=y +CONFIG_POWER_RESET_ATC260X=m +CONFIG_POWER_RESET_GPIO=y +CONFIG_POWER_RESET_GPIO_RESTART=y +CONFIG_POWER_RESET_LTC2952=y +CONFIG_POWER_RESET_MT6323=y +CONFIG_POWER_RESET_REGULATOR=y +CONFIG_POWER_RESET_RESTART=y +CONFIG_POWER_RESET_TPS65086=y +CONFIG_SYSCON_REBOOT_MODE=m +CONFIG_NVMEM_REBOOT_MODE=m +CONFIG_GENERIC_ADC_BATTERY=m +CONFIG_IP5XXX_POWER=m +CONFIG_MAX8925_POWER=m +CONFIG_WM831X_BACKUP=m +CONFIG_WM831X_POWER=m +CONFIG_WM8350_POWER=m +CONFIG_TEST_POWER=m +CONFIG_BATTERY_88PM860X=m +CONFIG_CHARGER_ADP5061=m +CONFIG_BATTERY_ACT8945A=m +CONFIG_BATTERY_CW2015=m +CONFIG_BATTERY_DS2760=m +CONFIG_BATTERY_DS2780=m +CONFIG_BATTERY_DS2781=m +CONFIG_BATTERY_DS2782=m +CONFIG_BATTERY_SAMSUNG_SDI=y +CONFIG_BATTERY_SBS=m +CONFIG_CHARGER_SBS=m +CONFIG_MANAGER_SBS=m +CONFIG_BATTERY_BQ27XXX=m +CONFIG_BATTERY_DA9030=m +CONFIG_BATTERY_DA9052=m +CONFIG_CHARGER_DA9150=m +CONFIG_BATTERY_DA9150=m +CONFIG_CHARGER_AXP20X=m +CONFIG_BATTERY_AXP20X=m +CONFIG_AXP20X_POWER=m +CONFIG_BATTERY_MAX17040=m +CONFIG_BATTERY_MAX17042=m +CONFIG_BATTERY_MAX1721X=m +CONFIG_BATTERY_TWL4030_MADC=m +CONFIG_CHARGER_88PM860X=m +CONFIG_CHARGER_PCF50633=m +CONFIG_BATTERY_RX51=m +CONFIG_CHARGER_ISP1704=m +CONFIG_CHARGER_MAX8903=m +CONFIG_CHARGER_TWL4030=m +CONFIG_CHARGER_LP8727=m +CONFIG_CHARGER_LP8788=m +CONFIG_CHARGER_GPIO=m +CONFIG_CHARGER_MANAGER=y +CONFIG_CHARGER_LT3651=m +CONFIG_CHARGER_LTC4162L=m +CONFIG_CHARGER_MAX14577=m +CONFIG_CHARGER_DETECTOR_MAX14656=m +CONFIG_CHARGER_MAX77650=m +CONFIG_CHARGER_MAX77693=m +CONFIG_CHARGER_MAX77976=m +CONFIG_CHARGER_MAX8997=m +CONFIG_CHARGER_MAX8998=m +CONFIG_CHARGER_MP2629=m +CONFIG_CHARGER_MT6360=m +CONFIG_CHARGER_BQ2415X=m +CONFIG_CHARGER_BQ24190=m +CONFIG_CHARGER_BQ24257=m +CONFIG_CHARGER_BQ24735=m +CONFIG_CHARGER_BQ2515X=m +CONFIG_CHARGER_BQ25890=m +CONFIG_CHARGER_BQ25980=m +CONFIG_CHARGER_BQ256XX=m +CONFIG_CHARGER_SMB347=m +CONFIG_CHARGER_TPS65090=m +CONFIG_BATTERY_GAUGE_LTC2941=m +CONFIG_BATTERY_GOLDFISH=m +CONFIG_BATTERY_RT5033=m +CONFIG_CHARGER_RT9455=m +CONFIG_CHARGER_UCS1002=m +CONFIG_CHARGER_BD99954=m +CONFIG_RN5T618_POWER=m +CONFIG_BATTERY_UG3105=m +CONFIG_SENSORS_AD7314=m +CONFIG_SENSORS_AD7414=m +CONFIG_SENSORS_AD7418=m +CONFIG_SENSORS_ADM1025=m +CONFIG_SENSORS_ADM1026=m +CONFIG_SENSORS_ADM1029=m +CONFIG_SENSORS_ADM1031=m +CONFIG_SENSORS_ADM1177=m +CONFIG_SENSORS_ADM9240=m +CONFIG_SENSORS_ADT7310=m +CONFIG_SENSORS_ADT7410=m +CONFIG_SENSORS_ADT7411=m +CONFIG_SENSORS_ADT7462=m +CONFIG_SENSORS_ADT7470=m +CONFIG_SENSORS_ADT7475=m +CONFIG_SENSORS_AHT10=m +CONFIG_SENSORS_AQUACOMPUTER_D5NEXT=m +CONFIG_SENSORS_AS370=m +CONFIG_SENSORS_ASC7621=m +CONFIG_SENSORS_AXI_FAN_CONTROL=m +CONFIG_SENSORS_ATXP1=m +CONFIG_SENSORS_CORSAIR_CPRO=m +CONFIG_SENSORS_CORSAIR_PSU=m +CONFIG_SENSORS_DRIVETEMP=m +CONFIG_SENSORS_DS620=m +CONFIG_SENSORS_DS1621=m +CONFIG_SENSORS_DA9052_ADC=m +CONFIG_SENSORS_DA9055=m +CONFIG_SENSORS_I5K_AMB=m +CONFIG_SENSORS_F71805F=m +CONFIG_SENSORS_F71882FG=m +CONFIG_SENSORS_F75375S=m +CONFIG_SENSORS_GSC=m +CONFIG_SENSORS_MC13783_ADC=m +CONFIG_SENSORS_FTSTEUTATES=m +CONFIG_SENSORS_GL518SM=m +CONFIG_SENSORS_GL520SM=m +CONFIG_SENSORS_G760A=m +CONFIG_SENSORS_G762=m +CONFIG_SENSORS_GPIO_FAN=m +CONFIG_SENSORS_HIH6130=m +CONFIG_SENSORS_IBMAEM=m +CONFIG_SENSORS_IBMPEX=m +CONFIG_SENSORS_IIO_HWMON=m +CONFIG_SENSORS_IT87=m +CONFIG_SENSORS_JC42=m +CONFIG_SENSORS_POWR1220=m +CONFIG_SENSORS_LINEAGE=m +CONFIG_SENSORS_LOCHNAGAR=m +CONFIG_SENSORS_LTC2945=m +CONFIG_SENSORS_LTC2947_I2C=m +CONFIG_SENSORS_LTC2947_SPI=m +CONFIG_SENSORS_LTC2990=m +CONFIG_SENSORS_LTC2992=m +CONFIG_SENSORS_LTC4151=m +CONFIG_SENSORS_LTC4215=m +CONFIG_SENSORS_LTC4222=m +CONFIG_SENSORS_LTC4245=m +CONFIG_SENSORS_LTC4260=m +CONFIG_SENSORS_LTC4261=m +CONFIG_SENSORS_MAX1111=m +CONFIG_SENSORS_MAX127=m +CONFIG_SENSORS_MAX16065=m +CONFIG_SENSORS_MAX1619=m +CONFIG_SENSORS_MAX1668=m +CONFIG_SENSORS_MAX197=m +CONFIG_SENSORS_MAX31722=m +CONFIG_SENSORS_MAX31730=m +CONFIG_SENSORS_MAX6620=m +CONFIG_SENSORS_MAX6621=m +CONFIG_SENSORS_MAX6639=m +CONFIG_SENSORS_MAX6650=m +CONFIG_SENSORS_MAX6697=m +CONFIG_SENSORS_MAX31790=m +CONFIG_SENSORS_MCP3021=m +CONFIG_SENSORS_TC654=m +CONFIG_SENSORS_TPS23861=m +CONFIG_SENSORS_MENF21BMC_HWMON=m +CONFIG_SENSORS_MR75203=m +CONFIG_SENSORS_ADCXX=m +CONFIG_SENSORS_LM63=m +CONFIG_SENSORS_LM70=m +CONFIG_SENSORS_LM73=m +CONFIG_SENSORS_LM75=m +CONFIG_SENSORS_LM77=m +CONFIG_SENSORS_LM78=m +CONFIG_SENSORS_LM80=m +CONFIG_SENSORS_LM83=m +CONFIG_SENSORS_LM85=m +CONFIG_SENSORS_LM87=m +CONFIG_SENSORS_LM90=m +CONFIG_SENSORS_LM92=m +CONFIG_SENSORS_LM93=m +CONFIG_SENSORS_LM95234=m +CONFIG_SENSORS_LM95241=m +CONFIG_SENSORS_LM95245=m +CONFIG_SENSORS_PC87360=m +CONFIG_SENSORS_PC87427=m +CONFIG_SENSORS_NTC_THERMISTOR=m +CONFIG_SENSORS_NCT6683=m +CONFIG_SENSORS_NCT6775_I2C=m +CONFIG_SENSORS_NCT7802=m +CONFIG_SENSORS_NCT7904=m +CONFIG_SENSORS_NPCM7XX=m +CONFIG_SENSORS_NZXT_KRAKEN2=m +CONFIG_SENSORS_NZXT_SMART2=m +CONFIG_SENSORS_PCF8591=m +CONFIG_SENSORS_PECI_CPUTEMP=m +CONFIG_SENSORS_PECI_DIMMTEMP=m +CONFIG_PMBUS=m +CONFIG_SENSORS_ADM1266=m +CONFIG_SENSORS_ADM1275=m +CONFIG_SENSORS_BEL_PFE=m +CONFIG_SENSORS_BPA_RS600=m +CONFIG_SENSORS_DELTA_AHE50DC_FAN=m +CONFIG_SENSORS_FSP_3Y=m +CONFIG_SENSORS_IBM_CFFPS=m +CONFIG_SENSORS_DPS920AB=m +CONFIG_SENSORS_INSPUR_IPSPS=m +CONFIG_SENSORS_IR35221=m +CONFIG_SENSORS_IR36021=m +CONFIG_SENSORS_IR38064=m +CONFIG_SENSORS_IR38064_REGULATOR=y +CONFIG_SENSORS_IRPS5401=m +CONFIG_SENSORS_ISL68137=m +CONFIG_SENSORS_LM25066=m +CONFIG_SENSORS_LM25066_REGULATOR=y +CONFIG_SENSORS_LTC2978=m +CONFIG_SENSORS_LTC2978_REGULATOR=y +CONFIG_SENSORS_LTC3815=m +CONFIG_SENSORS_MAX15301=m +CONFIG_SENSORS_MAX16064=m +CONFIG_SENSORS_MAX16601=m +CONFIG_SENSORS_MAX20730=m +CONFIG_SENSORS_MAX20751=m +CONFIG_SENSORS_MAX31785=m +CONFIG_SENSORS_MAX34440=m +CONFIG_SENSORS_MAX8688=m +CONFIG_SENSORS_MP2888=m +CONFIG_SENSORS_MP2975=m +CONFIG_SENSORS_MP5023=m +CONFIG_SENSORS_PIM4328=m +CONFIG_SENSORS_PLI1209BC=m +CONFIG_SENSORS_PLI1209BC_REGULATOR=y +CONFIG_SENSORS_PM6764TR=m +CONFIG_SENSORS_PXE1610=m +CONFIG_SENSORS_Q54SJ108A2=m +CONFIG_SENSORS_STPDDC60=m +CONFIG_SENSORS_TPS40422=m +CONFIG_SENSORS_TPS53679=m +CONFIG_SENSORS_UCD9000=m +CONFIG_SENSORS_UCD9200=m +CONFIG_SENSORS_XDPE152=m +CONFIG_SENSORS_XDPE122=m +CONFIG_SENSORS_XDPE122_REGULATOR=y +CONFIG_SENSORS_ZL6100=m +CONFIG_SENSORS_PWM_FAN=m +CONFIG_SENSORS_SBTSI=m +CONFIG_SENSORS_SBRMI=m +CONFIG_SENSORS_SHT15=m +CONFIG_SENSORS_SHT21=m +CONFIG_SENSORS_SHT3x=m +CONFIG_SENSORS_SHT4x=m +CONFIG_SENSORS_SHTC1=m +CONFIG_SENSORS_SIS5595=m +CONFIG_SENSORS_DME1737=m +CONFIG_SENSORS_EMC1403=m +CONFIG_SENSORS_EMC2103=m +CONFIG_SENSORS_EMC6W201=m +CONFIG_SENSORS_SMSC47M1=m +CONFIG_SENSORS_SMSC47M192=m +CONFIG_SENSORS_SMSC47B397=m +CONFIG_SENSORS_SCH5627=m +CONFIG_SENSORS_SCH5636=m +CONFIG_SENSORS_STTS751=m +CONFIG_SENSORS_SMM665=m +CONFIG_SENSORS_ADC128D818=m +CONFIG_SENSORS_ADS7828=m +CONFIG_SENSORS_ADS7871=m +CONFIG_SENSORS_AMC6821=m +CONFIG_SENSORS_INA209=m +CONFIG_SENSORS_INA2XX=m +CONFIG_SENSORS_INA238=m +CONFIG_SENSORS_INA3221=m +CONFIG_SENSORS_TC74=m +CONFIG_SENSORS_THMC50=m +CONFIG_SENSORS_TMP102=m +CONFIG_SENSORS_TMP103=m +CONFIG_SENSORS_TMP108=m +CONFIG_SENSORS_TMP401=m +CONFIG_SENSORS_TMP421=m +CONFIG_SENSORS_TMP464=m +CONFIG_SENSORS_TMP513=m +CONFIG_SENSORS_VIA686A=m +CONFIG_SENSORS_VT1211=m +CONFIG_SENSORS_VT8231=m +CONFIG_SENSORS_W83773G=m +CONFIG_SENSORS_W83781D=m +CONFIG_SENSORS_W83791D=m +CONFIG_SENSORS_W83792D=m +CONFIG_SENSORS_W83793=m +CONFIG_SENSORS_W83795=m +CONFIG_SENSORS_W83L785TS=m +CONFIG_SENSORS_W83L786NG=m +CONFIG_SENSORS_W83627HF=m +CONFIG_SENSORS_W83627EHF=m +CONFIG_SENSORS_WM831X=m +CONFIG_SENSORS_WM8350=m +CONFIG_THERMAL_NETLINK=y +CONFIG_THERMAL_STATISTICS=y +CONFIG_THERMAL_WRITABLE_TRIPS=y +CONFIG_THERMAL_GOV_FAIR_SHARE=y +CONFIG_THERMAL_GOV_BANG_BANG=y +CONFIG_THERMAL_GOV_USER_SPACE=y +CONFIG_CPU_THERMAL=y +CONFIG_CPU_IDLE_THERMAL=y +CONFIG_DEVFREQ_THERMAL=y +CONFIG_THERMAL_EMULATION=y +CONFIG_THERMAL_MMIO=m +CONFIG_MAX77620_THERMAL=m +CONFIG_DA9062_THERMAL=m +CONFIG_GENERIC_ADC_THERMAL=m +CONFIG_WATCHDOG=y +CONFIG_WATCHDOG_CORE=y +CONFIG_WATCHDOG_SYSFS=y +CONFIG_WATCHDOG_PRETIMEOUT_GOV=y +CONFIG_WATCHDOG_PRETIMEOUT_GOV_PANIC=m +CONFIG_WATCHDOG_PRETIMEOUT_DEFAULT_GOV_NOOP=y +CONFIG_SOFT_WATCHDOG=m +CONFIG_SOFT_WATCHDOG_PRETIMEOUT=y +CONFIG_BD957XMUF_WATCHDOG=m +CONFIG_DA9052_WATCHDOG=m +CONFIG_DA9055_WATCHDOG=m +CONFIG_DA9063_WATCHDOG=m +CONFIG_DA9062_WATCHDOG=m +CONFIG_GPIO_WATCHDOG=m +CONFIG_MENF21BMC_WATCHDOG=m +CONFIG_MENZ069_WATCHDOG=m +CONFIG_WM831X_WATCHDOG=m +CONFIG_WM8350_WATCHDOG=m +CONFIG_XILINX_WATCHDOG=m +CONFIG_ZIIRAVE_WATCHDOG=m +CONFIG_RAVE_SP_WATCHDOG=m +CONFIG_CADENCE_WATCHDOG=m +CONFIG_DW_WATCHDOG=m +CONFIG_RN5T618_WATCHDOG=m +CONFIG_TWL4030_WATCHDOG=m +CONFIG_MAX63XX_WATCHDOG=m +CONFIG_MAX77620_WATCHDOG=m +CONFIG_RETU_WATCHDOG=m +CONFIG_STPMIC1_WATCHDOG=m +CONFIG_ALIM7101_WDT=m +CONFIG_I6300ESB_WDT=m +CONFIG_KEMPLD_WDT=m +CONFIG_MEN_A21_WDT=m +CONFIG_PCIPCWATCHDOG=m +CONFIG_WDTPCI=m +CONFIG_USBPCWATCHDOG=m +CONFIG_SSB_SDIOHOST=y +CONFIG_SSB_DRIVER_GPIO=y +CONFIG_BCMA_HOST_SOC=y +CONFIG_BCMA_DRIVER_GMAC_CMN=y +CONFIG_BCMA_DRIVER_GPIO=y +CONFIG_MFD_ACT8945A=m +CONFIG_MFD_AS3711=y +CONFIG_MFD_AS3722=y +CONFIG_PMIC_ADP5520=y +CONFIG_MFD_AAT2870_CORE=y +CONFIG_MFD_ATMEL_FLEXCOM=m +CONFIG_MFD_ATMEL_HLCDC=m +CONFIG_MFD_BCM590XX=m +CONFIG_MFD_BD9571MWV=m +CONFIG_MFD_AXP20X_I2C=m +CONFIG_MFD_MADERA=m +CONFIG_MFD_MADERA_I2C=m +CONFIG_MFD_MADERA_SPI=m +CONFIG_MFD_CS47L15=y +CONFIG_MFD_CS47L35=y +CONFIG_MFD_CS47L85=y +CONFIG_MFD_CS47L90=y +CONFIG_MFD_CS47L92=y +CONFIG_PMIC_DA903X=y +CONFIG_MFD_DA9052_SPI=y +CONFIG_MFD_DA9052_I2C=y +CONFIG_MFD_DA9055=y +CONFIG_MFD_DA9062=m +CONFIG_MFD_DA9063=y +CONFIG_MFD_DA9150=m +CONFIG_MFD_DLN2=m +CONFIG_MFD_GATEWORKS_GSC=m +CONFIG_MFD_MC13XXX_SPI=m +CONFIG_MFD_MC13XXX_I2C=m +CONFIG_MFD_MP2629=m +CONFIG_MFD_HI6421_PMIC=m +CONFIG_MFD_HI6421_SPMI=m +CONFIG_LPC_ICH=m +CONFIG_MFD_IQS62X=m +CONFIG_MFD_JANZ_CMODIO=m +CONFIG_MFD_KEMPLD=m +CONFIG_MFD_88PM800=m +CONFIG_MFD_88PM805=m +CONFIG_MFD_88PM860X=y +CONFIG_MFD_MAX14577=y +CONFIG_MFD_MAX77620=y +CONFIG_MFD_MAX77650=m +CONFIG_MFD_MAX77686=y +CONFIG_MFD_MAX77693=y +CONFIG_MFD_MAX77714=m +CONFIG_MFD_MAX77843=y +CONFIG_MFD_MAX8907=m +CONFIG_MFD_MAX8925=y +CONFIG_MFD_MAX8997=y +CONFIG_MFD_MAX8998=y +CONFIG_MFD_MT6360=m +CONFIG_MFD_MT6397=m +CONFIG_MFD_MENF21BMC=m +CONFIG_EZX_PCAP=y +CONFIG_MFD_CPCAP=m +CONFIG_MFD_VIPERBOARD=m +CONFIG_MFD_NTXEC=m +CONFIG_MFD_RETU=m +CONFIG_MFD_PCF50633=m +CONFIG_PCF50633_ADC=m +CONFIG_PCF50633_GPIO=m +CONFIG_MFD_RT4831=m +CONFIG_MFD_RT5033=m +CONFIG_MFD_RC5T583=y +CONFIG_MFD_RK808=m +CONFIG_MFD_RN5T618=m +CONFIG_MFD_SEC_CORE=y +CONFIG_MFD_SI476X_CORE=m +CONFIG_MFD_SM501=m +CONFIG_MFD_SM501_GPIO=y +CONFIG_MFD_SKY81452=m +CONFIG_MFD_STMPE=y +CONFIG_STMPE_SPI=y +CONFIG_MFD_TI_AM335X_TSCADC=m +CONFIG_MFD_LP3943=m +CONFIG_MFD_LP8788=y +CONFIG_MFD_TI_LMU=m +CONFIG_MFD_PALMAS=y +CONFIG_TPS6105X=m +CONFIG_TPS65010=m +CONFIG_TPS6507X=m +CONFIG_MFD_TPS65086=m +CONFIG_MFD_TPS65090=y +CONFIG_MFD_TI_LP873X=m +CONFIG_MFD_TI_LP87565=m +CONFIG_MFD_TPS65218=m +CONFIG_MFD_TPS6586X=y +CONFIG_MFD_TPS65910=y +CONFIG_MFD_TPS65912_I2C=y +CONFIG_MFD_TPS65912_SPI=y +CONFIG_TWL4030_CORE=y +CONFIG_TWL6040_CORE=y +CONFIG_MFD_LM3533=m +CONFIG_MFD_TC3589X=y +CONFIG_MFD_VX855=m +CONFIG_MFD_LOCHNAGAR=y +CONFIG_MFD_ARIZONA_I2C=m +CONFIG_MFD_ARIZONA_SPI=m +CONFIG_MFD_CS47L24=y +CONFIG_MFD_WM5102=y +CONFIG_MFD_WM5110=y +CONFIG_MFD_WM8997=y +CONFIG_MFD_WM8998=y +CONFIG_MFD_WM8400=y +CONFIG_MFD_WM831X_I2C=y +CONFIG_MFD_WM831X_SPI=y +CONFIG_MFD_WM8350_I2C=y +CONFIG_MFD_WM8994=m +CONFIG_MFD_ROHM_BD718XX=m +CONFIG_MFD_ROHM_BD71828=m +CONFIG_MFD_ROHM_BD957XMUF=m +CONFIG_MFD_STPMIC1=m +CONFIG_MFD_WCD934X=m +CONFIG_MFD_ATC260X_I2C=m +CONFIG_MFD_QCOM_PM8008=m +CONFIG_RAVE_SP_CORE=m +CONFIG_MFD_RSMU_I2C=m +CONFIG_MFD_RSMU_SPI=m +CONFIG_REGULATOR_VIRTUAL_CONSUMER=m +CONFIG_REGULATOR_USERSPACE_CONSUMER=m +CONFIG_REGULATOR_88PG86X=m +CONFIG_REGULATOR_88PM800=m +CONFIG_REGULATOR_88PM8607=m +CONFIG_REGULATOR_ACT8865=m +CONFIG_REGULATOR_ACT8945A=m +CONFIG_REGULATOR_AD5398=m +CONFIG_REGULATOR_AAT2870=m +CONFIG_REGULATOR_ARIZONA_LDO1=m +CONFIG_REGULATOR_ARIZONA_MICSUPP=m +CONFIG_REGULATOR_AS3711=m +CONFIG_REGULATOR_AS3722=m +CONFIG_REGULATOR_ATC260X=m +CONFIG_REGULATOR_AXP20X=m +CONFIG_REGULATOR_BCM590XX=m +CONFIG_REGULATOR_BD71815=m +CONFIG_REGULATOR_BD71828=m +CONFIG_REGULATOR_BD718XX=m +CONFIG_REGULATOR_BD9571MWV=m +CONFIG_REGULATOR_BD957XMUF=m +CONFIG_REGULATOR_CPCAP=m +CONFIG_REGULATOR_DA903X=m +CONFIG_REGULATOR_DA9052=m +CONFIG_REGULATOR_DA9055=m +CONFIG_REGULATOR_DA9062=m +CONFIG_REGULATOR_DA9063=m +CONFIG_REGULATOR_DA9121=m +CONFIG_REGULATOR_DA9210=m +CONFIG_REGULATOR_DA9211=m +CONFIG_REGULATOR_FAN53555=m +CONFIG_REGULATOR_FAN53880=m +CONFIG_REGULATOR_GPIO=m +CONFIG_REGULATOR_HI6421=m +CONFIG_REGULATOR_HI6421V530=m +CONFIG_REGULATOR_HI6421V600=m +CONFIG_REGULATOR_ISL9305=m +CONFIG_REGULATOR_ISL6271A=m +CONFIG_REGULATOR_LM363X=m +CONFIG_REGULATOR_LOCHNAGAR=m +CONFIG_REGULATOR_LP3971=m +CONFIG_REGULATOR_LP3972=m +CONFIG_REGULATOR_LP872X=m +CONFIG_REGULATOR_LP873X=m +CONFIG_REGULATOR_LP8755=m +CONFIG_REGULATOR_LP87565=m +CONFIG_REGULATOR_LP8788=m +CONFIG_REGULATOR_LTC3589=m +CONFIG_REGULATOR_LTC3676=m +CONFIG_REGULATOR_MAX14577=m +CONFIG_REGULATOR_MAX1586=m +CONFIG_REGULATOR_MAX77620=m +CONFIG_REGULATOR_MAX77650=m +CONFIG_REGULATOR_MAX8649=m +CONFIG_REGULATOR_MAX8660=m +CONFIG_REGULATOR_MAX8893=m +CONFIG_REGULATOR_MAX8907=m +CONFIG_REGULATOR_MAX8925=m +CONFIG_REGULATOR_MAX8952=m +CONFIG_REGULATOR_MAX8973=m +CONFIG_REGULATOR_MAX8997=m +CONFIG_REGULATOR_MAX8998=m +CONFIG_REGULATOR_MAX20086=m +CONFIG_REGULATOR_MAX77686=m +CONFIG_REGULATOR_MAX77693=m +CONFIG_REGULATOR_MAX77802=m +CONFIG_REGULATOR_MAX77826=m +CONFIG_REGULATOR_MC13783=m +CONFIG_REGULATOR_MC13892=m +CONFIG_REGULATOR_MCP16502=m +CONFIG_REGULATOR_MP5416=m +CONFIG_REGULATOR_MP8859=m +CONFIG_REGULATOR_MP886X=m +CONFIG_REGULATOR_MPQ7920=m +CONFIG_REGULATOR_MT6311=m +CONFIG_REGULATOR_MT6315=m +CONFIG_REGULATOR_MT6323=m +CONFIG_REGULATOR_MT6358=m +CONFIG_REGULATOR_MT6359=m +CONFIG_REGULATOR_MT6360=m +CONFIG_REGULATOR_MT6397=m +CONFIG_REGULATOR_PALMAS=m +CONFIG_REGULATOR_PCA9450=m +CONFIG_REGULATOR_PCAP=m +CONFIG_REGULATOR_PCF50633=m +CONFIG_REGULATOR_PF8X00=m +CONFIG_REGULATOR_PFUZE100=m +CONFIG_REGULATOR_PV88060=m +CONFIG_REGULATOR_PV88080=m +CONFIG_REGULATOR_PV88090=m +CONFIG_REGULATOR_PWM=m +CONFIG_REGULATOR_QCOM_SPMI=m +CONFIG_REGULATOR_QCOM_USB_VBUS=m +CONFIG_REGULATOR_RASPBERRYPI_TOUCHSCREEN_ATTINY=m +CONFIG_REGULATOR_RC5T583=m +CONFIG_REGULATOR_RK808=m +CONFIG_REGULATOR_RN5T618=m +CONFIG_REGULATOR_RT4801=m +CONFIG_REGULATOR_RT4831=m +CONFIG_REGULATOR_RT5033=m +CONFIG_REGULATOR_RT5190A=m +CONFIG_REGULATOR_RT5759=m +CONFIG_REGULATOR_RT6160=m +CONFIG_REGULATOR_RT6245=m +CONFIG_REGULATOR_RTQ2134=m +CONFIG_REGULATOR_RTMV20=m +CONFIG_REGULATOR_RTQ6752=m +CONFIG_REGULATOR_S2MPA01=m +CONFIG_REGULATOR_S2MPS11=m +CONFIG_REGULATOR_S5M8767=m +CONFIG_REGULATOR_SKY81452=m +CONFIG_REGULATOR_SLG51000=m +CONFIG_REGULATOR_STPMIC1=m +CONFIG_REGULATOR_SY8106A=m +CONFIG_REGULATOR_SY8824X=m +CONFIG_REGULATOR_SY8827N=m +CONFIG_REGULATOR_TPS51632=m +CONFIG_REGULATOR_TPS62360=m +CONFIG_REGULATOR_TPS6286X=m +CONFIG_REGULATOR_TPS65023=m +CONFIG_REGULATOR_TPS6507X=m +CONFIG_REGULATOR_TPS65086=m +CONFIG_REGULATOR_TPS65090=m +CONFIG_REGULATOR_TPS65132=m +CONFIG_REGULATOR_TPS65218=m +CONFIG_REGULATOR_TPS6524X=m +CONFIG_REGULATOR_TPS6586X=m +CONFIG_REGULATOR_TPS65910=m +CONFIG_REGULATOR_TPS65912=m +CONFIG_REGULATOR_TWL4030=m +CONFIG_REGULATOR_VCTRL=m +CONFIG_REGULATOR_WM831X=m +CONFIG_REGULATOR_WM8350=m +CONFIG_REGULATOR_WM8400=m +CONFIG_REGULATOR_WM8994=m +CONFIG_REGULATOR_QCOM_LABIBB=m +CONFIG_RC_CORE=m +CONFIG_LIRC=y +CONFIG_RC_DECODERS=y +CONFIG_IR_IMON_DECODER=m +CONFIG_IR_JVC_DECODER=m +CONFIG_IR_MCE_KBD_DECODER=m +CONFIG_IR_NEC_DECODER=m +CONFIG_IR_RC5_DECODER=m +CONFIG_IR_RC6_DECODER=m +CONFIG_IR_RCMM_DECODER=m +CONFIG_IR_SANYO_DECODER=m +CONFIG_IR_SHARP_DECODER=m +CONFIG_IR_SONY_DECODER=m +CONFIG_IR_XMP_DECODER=m +CONFIG_RC_DEVICES=y +CONFIG_IR_GPIO_CIR=m +CONFIG_IR_GPIO_TX=m +CONFIG_IR_HIX5HD2=m +CONFIG_IR_IGORPLUGUSB=m +CONFIG_IR_IGUANA=m +CONFIG_IR_IMON=m +CONFIG_IR_IMON_RAW=m +CONFIG_IR_MCEUSB=m +CONFIG_IR_PWM_TX=m +CONFIG_IR_REDRAT3=m +CONFIG_IR_SERIAL=m +CONFIG_IR_SERIAL_TRANSMITTER=y +CONFIG_IR_SPI=m +CONFIG_IR_STREAMZAP=m +CONFIG_IR_TOY=m +CONFIG_IR_TTUSBIR=m +CONFIG_RC_ATI_REMOTE=m +CONFIG_RC_LOOPBACK=m +CONFIG_RC_XBOX_DVD=m +CONFIG_MEDIA_CEC_RC=y +CONFIG_MEDIA_CEC_SUPPORT=y +CONFIG_CEC_CH7322=m +CONFIG_USB_PULSE8_CEC=m +CONFIG_USB_RAINSHADOW_CEC=m +CONFIG_MEDIA_SUPPORT=m +CONFIG_MEDIA_SUPPORT_FILTER=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_SDR_SUPPORT=y +CONFIG_MEDIA_PLATFORM_SUPPORT=y +CONFIG_MEDIA_TEST_SUPPORT=y +CONFIG_V4L2_FLASH_LED_CLASS=m +CONFIG_DVB_MAX_ADAPTERS=8 +CONFIG_MEDIA_USB_SUPPORT=y +CONFIG_USB_GSPCA=m +CONFIG_USB_GSPCA_BENQ=m +CONFIG_USB_GSPCA_CONEX=m +CONFIG_USB_GSPCA_CPIA1=m +CONFIG_USB_GSPCA_DTCS033=m +CONFIG_USB_GSPCA_ETOMS=m +CONFIG_USB_GSPCA_FINEPIX=m +CONFIG_USB_GSPCA_JEILINJ=m +CONFIG_USB_GSPCA_JL2005BCD=m +CONFIG_USB_GSPCA_KINECT=m +CONFIG_USB_GSPCA_KONICA=m +CONFIG_USB_GSPCA_MARS=m +CONFIG_USB_GSPCA_MR97310A=m +CONFIG_USB_GSPCA_NW80X=m +CONFIG_USB_GSPCA_OV519=m +CONFIG_USB_GSPCA_OV534=m +CONFIG_USB_GSPCA_OV534_9=m +CONFIG_USB_GSPCA_PAC207=m +CONFIG_USB_GSPCA_PAC7302=m +CONFIG_USB_GSPCA_PAC7311=m +CONFIG_USB_GSPCA_SE401=m +CONFIG_USB_GSPCA_SN9C2028=m +CONFIG_USB_GSPCA_SN9C20X=m +CONFIG_USB_GSPCA_SONIXB=m +CONFIG_USB_GSPCA_SONIXJ=m +CONFIG_USB_GSPCA_SPCA1528=m +CONFIG_USB_GSPCA_SPCA500=m +CONFIG_USB_GSPCA_SPCA501=m +CONFIG_USB_GSPCA_SPCA505=m +CONFIG_USB_GSPCA_SPCA506=m +CONFIG_USB_GSPCA_SPCA508=m +CONFIG_USB_GSPCA_SPCA561=m +CONFIG_USB_GSPCA_SQ905=m +CONFIG_USB_GSPCA_SQ905C=m +CONFIG_USB_GSPCA_SQ930X=m +CONFIG_USB_GSPCA_STK014=m +CONFIG_USB_GSPCA_STK1135=m +CONFIG_USB_GSPCA_STV0680=m +CONFIG_USB_GSPCA_SUNPLUS=m +CONFIG_USB_GSPCA_T613=m +CONFIG_USB_GSPCA_TOPRO=m +CONFIG_USB_GSPCA_TOUPTEK=m +CONFIG_USB_GSPCA_TV8532=m +CONFIG_USB_GSPCA_VC032X=m +CONFIG_USB_GSPCA_VICAM=m +CONFIG_USB_GSPCA_XIRLINK_CIT=m +CONFIG_USB_GSPCA_ZC3XX=m +CONFIG_USB_GL860=m +CONFIG_USB_M5602=m +CONFIG_USB_STV06XX=m +CONFIG_USB_PWC=m +CONFIG_USB_S2255=m +CONFIG_VIDEO_USBTV=m +CONFIG_USB_VIDEO_CLASS=m +CONFIG_VIDEO_GO7007=m +CONFIG_VIDEO_GO7007_USB=m +CONFIG_VIDEO_GO7007_USB_S2250_BOARD=m +CONFIG_VIDEO_HDPVR=m +CONFIG_VIDEO_PVRUSB2=m +CONFIG_VIDEO_STK1160_COMMON=m +CONFIG_VIDEO_AU0828=m +CONFIG_VIDEO_AU0828_RC=y +CONFIG_VIDEO_CX231XX=m +CONFIG_VIDEO_CX231XX_ALSA=m +CONFIG_VIDEO_CX231XX_DVB=m +CONFIG_DVB_AS102=m +CONFIG_DVB_B2C2_FLEXCOP_USB=m +CONFIG_DVB_USB_V2=m +CONFIG_DVB_USB_AF9015=m +CONFIG_DVB_USB_AF9035=m +CONFIG_DVB_USB_ANYSEE=m +CONFIG_DVB_USB_AU6610=m +CONFIG_DVB_USB_AZ6007=m +CONFIG_DVB_USB_CE6230=m +CONFIG_DVB_USB_DVBSKY=m +CONFIG_DVB_USB_EC168=m +CONFIG_DVB_USB_GL861=m +CONFIG_DVB_USB_LME2510=m +CONFIG_DVB_USB_MXL111SF=m +CONFIG_DVB_USB_RTL28XXU=m +CONFIG_DVB_USB_ZD1301=m +CONFIG_DVB_USB=m +CONFIG_DVB_USB_A800=m +CONFIG_DVB_USB_AF9005=m +CONFIG_DVB_USB_AF9005_REMOTE=m +CONFIG_DVB_USB_AZ6027=m +CONFIG_DVB_USB_CINERGY_T2=m +CONFIG_DVB_USB_CXUSB=m +CONFIG_DVB_USB_CXUSB_ANALOG=y +CONFIG_DVB_USB_DIB0700=m +CONFIG_DVB_USB_DIBUSB_MB=m +CONFIG_DVB_USB_DIBUSB_MC=m +CONFIG_DVB_USB_DIGITV=m +CONFIG_DVB_USB_DTT200U=m +CONFIG_DVB_USB_DTV5100=m +CONFIG_DVB_USB_DW2102=m +CONFIG_DVB_USB_GP8PSK=m +CONFIG_DVB_USB_M920X=m +CONFIG_DVB_USB_NOVA_T_USB2=m +CONFIG_DVB_USB_OPERA1=m +CONFIG_DVB_USB_PCTV452E=m +CONFIG_DVB_USB_TECHNISAT_USB2=m +CONFIG_DVB_USB_TTUSB2=m +CONFIG_DVB_USB_UMT_010=m +CONFIG_DVB_USB_VP702X=m +CONFIG_DVB_USB_VP7045=m +CONFIG_SMS_USB_DRV=m +CONFIG_DVB_TTUSB_BUDGET=m +CONFIG_DVB_TTUSB_DEC=m +CONFIG_VIDEO_EM28XX=m +CONFIG_VIDEO_EM28XX_V4L2=m +CONFIG_VIDEO_EM28XX_ALSA=m +CONFIG_VIDEO_EM28XX_DVB=m +CONFIG_USB_AIRSPY=m +CONFIG_USB_HACKRF=m +CONFIG_USB_MSI2500=m +CONFIG_MEDIA_PCI_SUPPORT=y +CONFIG_VIDEO_SOLO6X10=m +CONFIG_VIDEO_TW5864=m +CONFIG_VIDEO_TW68=m +CONFIG_VIDEO_TW686X=m +CONFIG_VIDEO_DT3155=m +CONFIG_VIDEO_IVTV=m +CONFIG_VIDEO_IVTV_ALSA=m +CONFIG_VIDEO_FB_IVTV=m +CONFIG_VIDEO_BT848=m +CONFIG_DVB_BT8XX=m +CONFIG_VIDEO_CX18=m +CONFIG_VIDEO_CX18_ALSA=m +CONFIG_VIDEO_CX23885=m +CONFIG_MEDIA_ALTERA_CI=m +CONFIG_VIDEO_CX25821=m +CONFIG_VIDEO_CX25821_ALSA=m +CONFIG_VIDEO_CX88=m +CONFIG_VIDEO_CX88_ALSA=m +CONFIG_VIDEO_CX88_BLACKBIRD=m +CONFIG_VIDEO_CX88_DVB=m +CONFIG_VIDEO_SAA7134=m +CONFIG_VIDEO_SAA7134_ALSA=m +CONFIG_VIDEO_SAA7134_DVB=m +CONFIG_VIDEO_SAA7134_GO7007=m +CONFIG_VIDEO_SAA7164=m +CONFIG_DVB_B2C2_FLEXCOP_PCI=m +CONFIG_DVB_DDBRIDGE=m +CONFIG_DVB_DM1105=m +CONFIG_MANTIS_CORE=m +CONFIG_DVB_MANTIS=m +CONFIG_DVB_HOPPER=m +CONFIG_DVB_NETUP_UNIDVB=m +CONFIG_DVB_NGENE=m +CONFIG_DVB_PLUTO2=m +CONFIG_DVB_PT1=m +CONFIG_DVB_PT3=m +CONFIG_DVB_SMIPCIE=m +CONFIG_RADIO_MAXIRADIO=m +CONFIG_RADIO_SAA7706H=m +CONFIG_RADIO_SHARK=m +CONFIG_RADIO_SHARK2=m +CONFIG_RADIO_SI4713=m +CONFIG_RADIO_SI476X=m +CONFIG_RADIO_TEA5764=m +CONFIG_RADIO_TEF6862=m +CONFIG_RADIO_WL1273=m +CONFIG_USB_DSBR=m +CONFIG_USB_KEENE=m +CONFIG_USB_MA901=m +CONFIG_USB_MR800=m +CONFIG_USB_RAREMONO=m +CONFIG_RADIO_SI470X=m +CONFIG_USB_SI470X=m +CONFIG_I2C_SI470X=m +CONFIG_USB_SI4713=m +CONFIG_PLATFORM_SI4713=m +CONFIG_RADIO_WL128X=m +CONFIG_V4L_PLATFORM_DRIVERS=y +CONFIG_SDR_PLATFORM_DRIVERS=y +CONFIG_DVB_PLATFORM_DRIVERS=y +CONFIG_V4L_MEM2MEM_DRIVERS=y +CONFIG_VIDEO_MEM2MEM_DEINTERLACE=m +CONFIG_VIDEO_MUX=m +CONFIG_VIDEO_CADENCE_CSI2RX=m +CONFIG_VIDEO_CADENCE_CSI2TX=m +CONFIG_VIDEO_CAFE_CCIC=m +CONFIG_VIDEO_XILINX=m +CONFIG_VIDEO_XILINX_CSI2RXSS=m +CONFIG_VIDEO_XILINX_TPG=m +CONFIG_SMS_SDIO_DRV=m +CONFIG_V4L_TEST_DRIVERS=y +CONFIG_VIDEO_VIM2M=m +CONFIG_VIDEO_VICODEC=m +CONFIG_VIDEO_VIMC=m +CONFIG_VIDEO_VIVID=m +CONFIG_VIDEO_VIVID_CEC=y +CONFIG_DVB_FIREDTV=m +CONFIG_SMS_SIANO_DEBUGFS=y +CONFIG_VIDEO_HI556=m +CONFIG_VIDEO_HI846=m +CONFIG_VIDEO_HI847=m +CONFIG_VIDEO_IMX208=m +CONFIG_VIDEO_IMX214=m +CONFIG_VIDEO_IMX219=m +CONFIG_VIDEO_IMX258=m +CONFIG_VIDEO_IMX274=m +CONFIG_VIDEO_IMX290=m +CONFIG_VIDEO_IMX319=m +CONFIG_VIDEO_IMX334=m +CONFIG_VIDEO_IMX335=m +CONFIG_VIDEO_IMX355=m +CONFIG_VIDEO_IMX412=m +CONFIG_VIDEO_MT9M001=m +CONFIG_VIDEO_MT9M032=m +CONFIG_VIDEO_MT9M111=m +CONFIG_VIDEO_MT9P031=m +CONFIG_VIDEO_MT9T001=m +CONFIG_VIDEO_MT9T112=m +CONFIG_VIDEO_MT9V032=m +CONFIG_VIDEO_MT9V111=m +CONFIG_VIDEO_NOON010PC30=m +CONFIG_VIDEO_OG01A1B=m +CONFIG_VIDEO_OV02A10=m +CONFIG_VIDEO_OV08D10=m +CONFIG_VIDEO_OV13858=m +CONFIG_VIDEO_OV13B10=m +CONFIG_VIDEO_OV2659=m +CONFIG_VIDEO_OV2680=m +CONFIG_VIDEO_OV2685=m +CONFIG_VIDEO_OV5640=m +CONFIG_VIDEO_OV5645=m +CONFIG_VIDEO_OV5647=m +CONFIG_VIDEO_OV5670=m +CONFIG_VIDEO_OV5675=m +CONFIG_VIDEO_OV5693=m +CONFIG_VIDEO_OV5695=m +CONFIG_VIDEO_OV6650=m +CONFIG_VIDEO_OV7251=m +CONFIG_VIDEO_OV772X=m +CONFIG_VIDEO_OV7740=m +CONFIG_VIDEO_OV8856=m +CONFIG_VIDEO_OV9282=m +CONFIG_VIDEO_OV9640=m +CONFIG_VIDEO_OV9650=m +CONFIG_VIDEO_RDACM20=m +CONFIG_VIDEO_RDACM21=m +CONFIG_VIDEO_RJ54N1=m +CONFIG_VIDEO_S5C73M3=m +CONFIG_VIDEO_S5K5BAF=m +CONFIG_VIDEO_S5K6A3=m +CONFIG_VIDEO_S5K6AA=m +CONFIG_VIDEO_SR030PC30=m +CONFIG_VIDEO_VS6624=m +CONFIG_VIDEO_CCS=m +CONFIG_VIDEO_ET8EK8=m +CONFIG_VIDEO_M5MOLS=m +CONFIG_VIDEO_AD5820=m +CONFIG_VIDEO_AK7375=m +CONFIG_VIDEO_DW9714=m +CONFIG_VIDEO_DW9768=m +CONFIG_VIDEO_DW9807_VCM=m +CONFIG_VIDEO_ADP1653=m +CONFIG_VIDEO_LM3560=m +CONFIG_VIDEO_LM3646=m +CONFIG_VIDEO_TDA1997X=m +CONFIG_VIDEO_TDA9840=m +CONFIG_VIDEO_TEA6415C=m +CONFIG_VIDEO_TEA6420=m +CONFIG_VIDEO_TLV320AIC23B=m +CONFIG_VIDEO_ADV7180=m +CONFIG_VIDEO_ADV7183=m +CONFIG_VIDEO_ADV748X=m +CONFIG_VIDEO_ADV7604=m +CONFIG_VIDEO_ADV7604_CEC=y +CONFIG_VIDEO_ADV7842=m +CONFIG_VIDEO_ADV7842_CEC=y +CONFIG_VIDEO_BT819=m +CONFIG_VIDEO_BT856=m +CONFIG_VIDEO_BT866=m +CONFIG_VIDEO_ISL7998X=m +CONFIG_VIDEO_KS0127=m +CONFIG_VIDEO_MAX9286=m +CONFIG_VIDEO_ML86V7667=m +CONFIG_VIDEO_SAA7110=m +CONFIG_VIDEO_TC358743=m +CONFIG_VIDEO_TC358743_CEC=y +CONFIG_VIDEO_TVP514X=m +CONFIG_VIDEO_TVP7002=m +CONFIG_VIDEO_TW9910=m +CONFIG_VIDEO_VPX3220=m +CONFIG_VIDEO_AD9389B=m +CONFIG_VIDEO_ADV7170=m +CONFIG_VIDEO_ADV7175=m +CONFIG_VIDEO_ADV7343=m +CONFIG_VIDEO_ADV7393=m +CONFIG_VIDEO_AK881X=m +CONFIG_VIDEO_SAA7185=m +CONFIG_VIDEO_THS8200=m +CONFIG_SDR_MAX2175=m +CONFIG_VIDEO_I2C=m +CONFIG_VIDEO_ST_MIPID02=m +CONFIG_VIDEO_THS7303=m +CONFIG_CXD2880_SPI_DRV=m +CONFIG_VIDEO_GS1662=m +CONFIG_DVB_TDA8261=m +CONFIG_DVB_TUA6100=m +CONFIG_DVB_VES1X93=m +CONFIG_DVB_DIB9000=m +CONFIG_DVB_L64781=m +CONFIG_DVB_S5H1432=m +CONFIG_DVB_CXD2880=m +CONFIG_DVB_MN88443X=m +CONFIG_DVB_LGS8GL5=m +CONFIG_DVB_LNBH29=m +CONFIG_DVB_DUMMY_FE=m +CONFIG_DRM=m +CONFIG_DRM_LOAD_EDID_FIRMWARE=y +CONFIG_DRM_DP_AUX_CHARDEV=y +CONFIG_DRM_DP_CEC=y +CONFIG_DRM_I2C_NXP_TDA998X=m +CONFIG_DRM_I2C_NXP_TDA9950=m +CONFIG_DRM_KOMEDA=m +CONFIG_DRM_RADEON=m +CONFIG_DRM_AMDGPU=m +CONFIG_DRM_AMDGPU_SI=y +CONFIG_DRM_AMDGPU_CIK=y +CONFIG_DRM_AMDGPU_USERPTR=y +CONFIG_DRM_AMD_ACP=y +CONFIG_DRM_AMD_DC_HDCP=y +CONFIG_DRM_AMD_DC_SI=y +CONFIG_DRM_NOUVEAU=m +CONFIG_DRM_VGEM=m +CONFIG_DRM_VKMS=m +CONFIG_DRM_UDL=m +CONFIG_DRM_AST=m +CONFIG_DRM_MGAG200=m +CONFIG_DRM_QXL=m +CONFIG_DRM_VIRTIO_GPU=m +CONFIG_DRM_PANEL_ABT_Y030XX067A=m +CONFIG_DRM_PANEL_ARM_VERSATILE=m +CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596=m +CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0=m +CONFIG_DRM_PANEL_BOE_HIMAX8279D=m +CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=m +CONFIG_DRM_PANEL_DSI_CM=m +CONFIG_DRM_PANEL_LVDS=m +CONFIG_DRM_PANEL_ELIDA_KD35T133=m +CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02=m +CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D=m +CONFIG_DRM_PANEL_ILITEK_IL9322=m +CONFIG_DRM_PANEL_ILITEK_ILI9341=m +CONFIG_DRM_PANEL_ILITEK_ILI9881C=m +CONFIG_DRM_PANEL_INNOLUX_EJ030NA=m +CONFIG_DRM_PANEL_INNOLUX_P079ZCA=m +CONFIG_DRM_PANEL_JDI_LT070ME05000=m +CONFIG_DRM_PANEL_JDI_R63452=m +CONFIG_DRM_PANEL_KHADAS_TS050=m +CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04=m +CONFIG_DRM_PANEL_LEADTEK_LTK050H3146W=m +CONFIG_DRM_PANEL_LEADTEK_LTK500HD1829=m +CONFIG_DRM_PANEL_SAMSUNG_LD9040=m +CONFIG_DRM_PANEL_LG_LB035Q02=m +CONFIG_DRM_PANEL_LG_LG4573=m +CONFIG_DRM_PANEL_NEC_NL8048HL11=m +CONFIG_DRM_PANEL_NEWVISION_NV3052C=m +CONFIG_DRM_PANEL_NOVATEK_NT35510=m +CONFIG_DRM_PANEL_NOVATEK_NT35560=m +CONFIG_DRM_PANEL_NOVATEK_NT35950=m +CONFIG_DRM_PANEL_NOVATEK_NT36672A=m +CONFIG_DRM_PANEL_NOVATEK_NT39016=m +CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m +CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO=m +CONFIG_DRM_PANEL_ORISETECH_OTM8009A=m +CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS=m +CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00=m +CONFIG_DRM_PANEL_RASPBERRYPI_TOUCHSCREEN=m +CONFIG_DRM_PANEL_RAYDIUM_RM67191=m +CONFIG_DRM_PANEL_RAYDIUM_RM68200=m +CONFIG_DRM_PANEL_RONBO_RB070D30=m +CONFIG_DRM_PANEL_SAMSUNG_DB7430=m +CONFIG_DRM_PANEL_SAMSUNG_S6D16D0=m +CONFIG_DRM_PANEL_SAMSUNG_S6D27A1=m +CONFIG_DRM_PANEL_SAMSUNG_S6E3HA2=m +CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=m +CONFIG_DRM_PANEL_SAMSUNG_S6E63M0=m +CONFIG_DRM_PANEL_SAMSUNG_S6E63M0_DSI=m +CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01=m +CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m +CONFIG_DRM_PANEL_SAMSUNG_SOFEF00=m +CONFIG_DRM_PANEL_SEIKO_43WVF1G=m +CONFIG_DRM_PANEL_SHARP_LQ101R1SX01=m +CONFIG_DRM_PANEL_SHARP_LS037V7DW01=m +CONFIG_DRM_PANEL_SHARP_LS043T1LE01=m +CONFIG_DRM_PANEL_SHARP_LS060T1SX01=m +CONFIG_DRM_PANEL_SITRONIX_ST7701=m +CONFIG_DRM_PANEL_SITRONIX_ST7703=m +CONFIG_DRM_PANEL_SITRONIX_ST7789V=m +CONFIG_DRM_PANEL_SONY_ACX565AKM=m +CONFIG_DRM_PANEL_SONY_TULIP_TRULY_NT35521=m +CONFIG_DRM_PANEL_TDO_TL070WSH30=m +CONFIG_DRM_PANEL_TPO_TD028TTEC1=m +CONFIG_DRM_PANEL_TPO_TD043MTEA1=m +CONFIG_DRM_PANEL_TPO_TPG110=m +CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m +CONFIG_DRM_PANEL_VISIONOX_RM69299=m +CONFIG_DRM_PANEL_WIDECHIPS_WS2401=m +CONFIG_DRM_PANEL_XINPENG_XPP055C272=m +CONFIG_DRM_CHIPONE_ICN6211=m +CONFIG_DRM_CHRONTEL_CH7033=m +CONFIG_DRM_DISPLAY_CONNECTOR=m +CONFIG_DRM_ITE_IT6505=m +CONFIG_DRM_LONTIUM_LT8912B=m +CONFIG_DRM_LONTIUM_LT9211=m +CONFIG_DRM_LONTIUM_LT9611=m +CONFIG_DRM_LONTIUM_LT9611UXC=m +CONFIG_DRM_ITE_IT66121=m +CONFIG_DRM_LVDS_CODEC=m +CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW=m +CONFIG_DRM_NWL_MIPI_DSI=m +CONFIG_DRM_NXP_PTN3460=m +CONFIG_DRM_PARADE_PS8622=m +CONFIG_DRM_PARADE_PS8640=m +CONFIG_DRM_SIL_SII8620=m +CONFIG_DRM_SII902X=m +CONFIG_DRM_SII9234=m +CONFIG_DRM_SIMPLE_BRIDGE=m +CONFIG_DRM_THINE_THC63LVD1024=m +CONFIG_DRM_TOSHIBA_TC358762=m +CONFIG_DRM_TOSHIBA_TC358764=m +CONFIG_DRM_TOSHIBA_TC358767=m +CONFIG_DRM_TOSHIBA_TC358768=m +CONFIG_DRM_TOSHIBA_TC358775=m +CONFIG_DRM_TI_TFP410=m +CONFIG_DRM_TI_SN65DSI83=m +CONFIG_DRM_TI_SN65DSI86=m +CONFIG_DRM_TI_TPD12S015=m +CONFIG_DRM_ANALOGIX_ANX6345=m +CONFIG_DRM_ANALOGIX_ANX78XX=m +CONFIG_DRM_ANALOGIX_ANX7625=m +CONFIG_DRM_I2C_ADV7511=m +CONFIG_DRM_I2C_ADV7511_AUDIO=y +CONFIG_DRM_CDNS_DSI=m +CONFIG_DRM_CDNS_MHDP8546=m +CONFIG_DRM_ARCPGU=m +CONFIG_DRM_BOCHS=m +CONFIG_DRM_CIRRUS_QEMU=m +CONFIG_DRM_GM12U320=m +CONFIG_DRM_PANEL_MIPI_DBI=m +CONFIG_DRM_SIMPLEDRM=m +CONFIG_TINYDRM_HX8357D=m +CONFIG_TINYDRM_ILI9163=m +CONFIG_TINYDRM_ILI9225=m +CONFIG_TINYDRM_ILI9341=m +CONFIG_TINYDRM_ILI9486=m +CONFIG_TINYDRM_MI0283QT=m +CONFIG_TINYDRM_REPAPER=m +CONFIG_TINYDRM_ST7586=m +CONFIG_TINYDRM_ST7735R=m +CONFIG_DRM_GUD=m +CONFIG_DRM_SSD130X=m +CONFIG_DRM_SSD130X_I2C=m +CONFIG_DRM_SSD130X_SPI=m +CONFIG_FB=y +CONFIG_FIRMWARE_EDID=y +CONFIG_FB_CIRRUS=m +CONFIG_FB_PM2=m +CONFIG_FB_PM2_FIFO_DISCONNECT=y +CONFIG_FB_CYBER2000=m +CONFIG_FB_ASILIANT=y +CONFIG_FB_IMSTT=y +CONFIG_FB_UVESA=m +CONFIG_FB_EFI=y +CONFIG_FB_OPENCORES=m +CONFIG_FB_S1D13XXX=m +CONFIG_FB_NVIDIA=m +CONFIG_FB_NVIDIA_I2C=y +CONFIG_FB_RIVA=m +CONFIG_FB_RIVA_I2C=y +CONFIG_FB_I740=m +CONFIG_FB_MATROX=m +CONFIG_FB_MATROX_MILLENIUM=y +CONFIG_FB_MATROX_MYSTIQUE=y +CONFIG_FB_MATROX_G=y +CONFIG_FB_MATROX_I2C=m +CONFIG_FB_MATROX_MAVEN=m +CONFIG_FB_RADEON=m +CONFIG_FB_ATY128=m +CONFIG_FB_ATY=m +CONFIG_FB_ATY_CT=y +CONFIG_FB_ATY_GX=y +CONFIG_FB_S3=m +CONFIG_FB_SAVAGE=m +CONFIG_FB_SAVAGE_I2C=y +CONFIG_FB_SIS=m +CONFIG_FB_SIS_300=y +CONFIG_FB_SIS_315=y +CONFIG_FB_NEOMAGIC=m +CONFIG_FB_KYRO=m +CONFIG_FB_3DFX=m +# CONFIG_FB_3DFX_I2C is not set +CONFIG_FB_VOODOO1=m +CONFIG_FB_VT8623=m +CONFIG_FB_TRIDENT=m +CONFIG_FB_ARK=m +CONFIG_FB_PM3=m +CONFIG_FB_CARMINE=m +CONFIG_FB_SM501=m +CONFIG_FB_SMSCUFX=m +CONFIG_FB_UDL=m +CONFIG_FB_GOLDFISH=m +CONFIG_FB_METRONOME=m +CONFIG_FB_MB862XX=m +CONFIG_FB_SIMPLE=m +CONFIG_FB_SSD1307=m +CONFIG_FB_SM712=m +CONFIG_LCD_CLASS_DEVICE=m +CONFIG_LCD_L4F00242T03=m +CONFIG_LCD_LMS283GF05=m +CONFIG_LCD_LTV350QV=m +CONFIG_LCD_ILI922X=m +CONFIG_LCD_TDO24M=m +CONFIG_LCD_VGG2432A4=m +CONFIG_LCD_PLATFORM=m +CONFIG_LCD_AMS369FG06=m +CONFIG_LCD_LMS501KF03=m +CONFIG_LCD_HX8357=m +CONFIG_LCD_OTM3225A=m +CONFIG_BACKLIGHT_KTD253=m +CONFIG_BACKLIGHT_LM3533=m +CONFIG_BACKLIGHT_PWM=m +CONFIG_BACKLIGHT_DA903X=m +CONFIG_BACKLIGHT_DA9052=m +CONFIG_BACKLIGHT_MAX8925=m +CONFIG_BACKLIGHT_QCOM_WLED=m +CONFIG_BACKLIGHT_RT4831=m +CONFIG_BACKLIGHT_WM831X=m +CONFIG_BACKLIGHT_ADP5520=m +CONFIG_BACKLIGHT_ADP8860=m +CONFIG_BACKLIGHT_ADP8870=m +CONFIG_BACKLIGHT_88PM860X=m +CONFIG_BACKLIGHT_PCF50633=m +CONFIG_BACKLIGHT_AAT2870=m +CONFIG_BACKLIGHT_LM3630A=m +CONFIG_BACKLIGHT_LM3639=m +CONFIG_BACKLIGHT_LP855X=m +CONFIG_BACKLIGHT_LP8788=m +CONFIG_BACKLIGHT_PANDORA=m +CONFIG_BACKLIGHT_SKY81452=m +CONFIG_BACKLIGHT_AS3711=m +CONFIG_BACKLIGHT_GPIO=m +CONFIG_BACKLIGHT_LV5207LP=m +CONFIG_BACKLIGHT_BD6107=m +CONFIG_BACKLIGHT_ARCXCNN=m +CONFIG_BACKLIGHT_RAVE_SP=m +CONFIG_BACKLIGHT_LED=m +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER=y +CONFIG_SOUND=m +# CONFIG_SOUND_OSS_CORE_PRECLAIM is not set +CONFIG_SND=m +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=m +CONFIG_SND_HRTIMER=m +CONFIG_SND_SEQUENCER=m +CONFIG_SND_SEQ_DUMMY=m +CONFIG_SND_DUMMY=m +CONFIG_SND_ALOOP=m +CONFIG_SND_VIRMIDI=m +CONFIG_SND_MTPAV=m +CONFIG_SND_MTS64=m +CONFIG_SND_SERIAL_U16550=m +CONFIG_SND_SERIAL_GENERIC=m +CONFIG_SND_MPU401=m +CONFIG_SND_PORTMAN2X4=m +CONFIG_SND_AC97_POWER_SAVE=y +CONFIG_SND_AD1889=m +CONFIG_SND_ATIIXP=m +CONFIG_SND_ATIIXP_MODEM=m +CONFIG_SND_AU8810=m +CONFIG_SND_AU8820=m +CONFIG_SND_AU8830=m +CONFIG_SND_AW2=m +CONFIG_SND_BT87X=m +CONFIG_SND_CA0106=m +CONFIG_SND_CMIPCI=m +CONFIG_SND_OXYGEN=m +CONFIG_SND_CS4281=m +CONFIG_SND_CS46XX=m +CONFIG_SND_CTXFI=m +CONFIG_SND_DARLA20=m +CONFIG_SND_GINA20=m +CONFIG_SND_LAYLA20=m +CONFIG_SND_DARLA24=m +CONFIG_SND_GINA24=m +CONFIG_SND_LAYLA24=m +CONFIG_SND_MONA=m +CONFIG_SND_MIA=m +CONFIG_SND_ECHO3G=m +CONFIG_SND_INDIGO=m +CONFIG_SND_INDIGOIO=m +CONFIG_SND_INDIGODJ=m +CONFIG_SND_INDIGOIOX=m +CONFIG_SND_INDIGODJX=m +CONFIG_SND_ENS1370=m +CONFIG_SND_ENS1371=m +CONFIG_SND_FM801=m +CONFIG_SND_FM801_TEA575X_BOOL=y +CONFIG_SND_HDSP=m +CONFIG_SND_HDSPM=m +CONFIG_SND_ICE1724=m +CONFIG_SND_INTEL8X0=m +CONFIG_SND_INTEL8X0M=m +CONFIG_SND_KORG1212=m +CONFIG_SND_LOLA=m +CONFIG_SND_LX6464ES=m +CONFIG_SND_MIXART=m +CONFIG_SND_NM256=m +CONFIG_SND_PCXHR=m +CONFIG_SND_RIPTIDE=m +CONFIG_SND_RME32=m +CONFIG_SND_RME96=m +CONFIG_SND_RME9652=m +CONFIG_SND_VIA82XX=m +CONFIG_SND_VIA82XX_MODEM=m +CONFIG_SND_VIRTUOSO=m +CONFIG_SND_VX222=m +CONFIG_SND_YMFPCI=m +CONFIG_SND_HDA_INTEL=m +CONFIG_SND_HDA_HWDEP=y +CONFIG_SND_HDA_INPUT_BEEP=y +CONFIG_SND_HDA_INPUT_BEEP_MODE=0 +CONFIG_SND_HDA_PATCH_LOADER=y +CONFIG_SND_HDA_CODEC_REALTEK=m +CONFIG_SND_HDA_CODEC_ANALOG=m +CONFIG_SND_HDA_CODEC_SIGMATEL=m +CONFIG_SND_HDA_CODEC_VIA=m +CONFIG_SND_HDA_CODEC_HDMI=m +CONFIG_SND_HDA_CODEC_CIRRUS=m +CONFIG_SND_HDA_CODEC_CS8409=m +CONFIG_SND_HDA_CODEC_CONEXANT=m +CONFIG_SND_HDA_CODEC_CA0110=m +CONFIG_SND_HDA_CODEC_CA0132=m +CONFIG_SND_HDA_CODEC_CMEDIA=m +CONFIG_SND_HDA_CODEC_SI3054=m +CONFIG_SND_USB_AUDIO=m +CONFIG_SND_USB_UA101=m +CONFIG_SND_USB_CAIAQ=m +CONFIG_SND_USB_CAIAQ_INPUT=y +CONFIG_SND_USB_6FIRE=m +CONFIG_SND_USB_HIFACE=m +CONFIG_SND_BCD2000=m +CONFIG_SND_USB_POD=m +CONFIG_SND_USB_PODHD=m +CONFIG_SND_USB_TONEPORT=m +CONFIG_SND_USB_VARIAX=m +CONFIG_SND_DICE=m +CONFIG_SND_OXFW=m +CONFIG_SND_ISIGHT=m +CONFIG_SND_FIREWORKS=m +CONFIG_SND_BEBOB=m +CONFIG_SND_FIREWIRE_DIGI00X=m +CONFIG_SND_FIREWIRE_TASCAM=m +CONFIG_SND_FIREWIRE_MOTU=m +CONFIG_SND_FIREFACE=m +CONFIG_SND_SOC=m +CONFIG_SND_SOC_ADI=m +CONFIG_SND_SOC_ADI_AXI_I2S=m +CONFIG_SND_SOC_ADI_AXI_SPDIF=m +CONFIG_SND_SOC_AMD_ACP=m +CONFIG_SND_SOC_AMD_CZ_RT5645_MACH=m +CONFIG_SND_AMD_ACP_CONFIG=m +CONFIG_SND_ATMEL_SOC=m +CONFIG_SND_SOC_MIKROE_PROTO=m +CONFIG_SND_BCM63XX_I2S_WHISTLER=m +CONFIG_SND_DESIGNWARE_I2S=m +CONFIG_SND_DESIGNWARE_PCM=y +CONFIG_SND_SOC_FSL_ASRC=m +CONFIG_SND_SOC_FSL_SAI=m +CONFIG_SND_SOC_FSL_MQS=m +CONFIG_SND_SOC_FSL_AUDMIX=m +CONFIG_SND_SOC_FSL_SSI=m +CONFIG_SND_SOC_FSL_SPDIF=m +CONFIG_SND_SOC_FSL_ESAI=m +CONFIG_SND_SOC_FSL_MICFIL=m +CONFIG_SND_SOC_FSL_EASRC=m +CONFIG_SND_SOC_FSL_XCVR=m +CONFIG_SND_SOC_FSL_RPMSG=m +CONFIG_SND_SOC_IMX_AUDMUX=m +CONFIG_SND_I2S_HI6210_I2S=m +CONFIG_SND_SOC_IMG=y +CONFIG_SND_SOC_IMG_I2S_IN=m +CONFIG_SND_SOC_IMG_I2S_OUT=m +CONFIG_SND_SOC_IMG_PARALLEL_OUT=m +CONFIG_SND_SOC_IMG_SPDIF_IN=m +CONFIG_SND_SOC_IMG_SPDIF_OUT=m +CONFIG_SND_SOC_IMG_PISTACHIO_INTERNAL_DAC=m +CONFIG_SND_SOC_MTK_BTCVSD=m +CONFIG_SND_SOC_SOF_TOPLEVEL=y +CONFIG_SND_SOC_SOF_PCI=m +CONFIG_SND_SOC_SOF_OF=m +CONFIG_SND_SOC_XILINX_I2S=m +CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER=m +CONFIG_SND_SOC_XILINX_SPDIF=m +CONFIG_SND_SOC_XTFPGA_I2S=m +CONFIG_SND_SOC_AC97_CODEC=m +CONFIG_SND_SOC_ADAU1372_I2C=m +CONFIG_SND_SOC_ADAU1372_SPI=m +CONFIG_SND_SOC_ADAU1701=m +CONFIG_SND_SOC_ADAU1761_I2C=m +CONFIG_SND_SOC_ADAU1761_SPI=m +CONFIG_SND_SOC_ADAU7002=m +CONFIG_SND_SOC_ADAU7118_HW=m +CONFIG_SND_SOC_ADAU7118_I2C=m +CONFIG_SND_SOC_AK4104=m +CONFIG_SND_SOC_AK4118=m +CONFIG_SND_SOC_AK4375=m +CONFIG_SND_SOC_AK4458=m +CONFIG_SND_SOC_AK4554=m +CONFIG_SND_SOC_AK4613=m +CONFIG_SND_SOC_AK4642=m +CONFIG_SND_SOC_AK5386=m +CONFIG_SND_SOC_AK5558=m +CONFIG_SND_SOC_ALC5623=m +CONFIG_SND_SOC_AW8738=m +CONFIG_SND_SOC_BD28623=m +CONFIG_SND_SOC_BT_SCO=m +CONFIG_SND_SOC_CPCAP=m +CONFIG_SND_SOC_CS35L32=m +CONFIG_SND_SOC_CS35L33=m +CONFIG_SND_SOC_CS35L34=m +CONFIG_SND_SOC_CS35L35=m +CONFIG_SND_SOC_CS35L36=m +CONFIG_SND_SOC_CS35L41_SPI=m +CONFIG_SND_SOC_CS35L41_I2C=m +CONFIG_SND_SOC_CS35L45_SPI=m +CONFIG_SND_SOC_CS35L45_I2C=m +CONFIG_SND_SOC_CS42L42=m +CONFIG_SND_SOC_CS42L51_I2C=m +CONFIG_SND_SOC_CS42L52=m +CONFIG_SND_SOC_CS42L56=m +CONFIG_SND_SOC_CS42L73=m +CONFIG_SND_SOC_CS4234=m +CONFIG_SND_SOC_CS4265=m +CONFIG_SND_SOC_CS4270=m +CONFIG_SND_SOC_CS4271_I2C=m +CONFIG_SND_SOC_CS4271_SPI=m +CONFIG_SND_SOC_CS42XX8_I2C=m +CONFIG_SND_SOC_CS43130=m +CONFIG_SND_SOC_CS4341=m +CONFIG_SND_SOC_CS4349=m +CONFIG_SND_SOC_CS53L30=m +CONFIG_SND_SOC_CX2072X=m +CONFIG_SND_SOC_DA7213=m +CONFIG_SND_SOC_DMIC=m +CONFIG_SND_SOC_ES7134=m +CONFIG_SND_SOC_ES7241=m +CONFIG_SND_SOC_ES8316=m +CONFIG_SND_SOC_ES8328_I2C=m +CONFIG_SND_SOC_ES8328_SPI=m +CONFIG_SND_SOC_GTM601=m +CONFIG_SND_SOC_ICS43432=m +CONFIG_SND_SOC_INNO_RK3036=m +CONFIG_SND_SOC_LOCHNAGAR_SC=m +CONFIG_SND_SOC_MAX98088=m +CONFIG_SND_SOC_MAX98357A=m +CONFIG_SND_SOC_MAX98504=m +CONFIG_SND_SOC_MAX9867=m +CONFIG_SND_SOC_MAX98927=m +CONFIG_SND_SOC_MAX98520=m +CONFIG_SND_SOC_MAX98373_I2C=m +CONFIG_SND_SOC_MAX98373_SDW=m +CONFIG_SND_SOC_MAX98390=m +CONFIG_SND_SOC_MAX98396=m +CONFIG_SND_SOC_MAX9860=m +CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m +CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m +CONFIG_SND_SOC_PCM1681=m +CONFIG_SND_SOC_PCM1789_I2C=m +CONFIG_SND_SOC_PCM179X_I2C=m +CONFIG_SND_SOC_PCM179X_SPI=m +CONFIG_SND_SOC_PCM186X_I2C=m +CONFIG_SND_SOC_PCM186X_SPI=m +CONFIG_SND_SOC_PCM3060_I2C=m +CONFIG_SND_SOC_PCM3060_SPI=m +CONFIG_SND_SOC_PCM3168A_I2C=m +CONFIG_SND_SOC_PCM3168A_SPI=m +CONFIG_SND_SOC_PCM5102A=m +CONFIG_SND_SOC_PCM512x_I2C=m +CONFIG_SND_SOC_PCM512x_SPI=m +CONFIG_SND_SOC_RK3328=m +CONFIG_SND_SOC_RK817=m +CONFIG_SND_SOC_RT1308_SDW=m +CONFIG_SND_SOC_RT1316_SDW=m +CONFIG_SND_SOC_RT5616=m +CONFIG_SND_SOC_RT5631=m +CONFIG_SND_SOC_RT5640=m +CONFIG_SND_SOC_RT5659=m +CONFIG_SND_SOC_RT5682_SDW=m +CONFIG_SND_SOC_RT700_SDW=m +CONFIG_SND_SOC_RT711_SDW=m +CONFIG_SND_SOC_RT711_SDCA_SDW=m +CONFIG_SND_SOC_RT715_SDW=m +CONFIG_SND_SOC_RT715_SDCA_SDW=m +CONFIG_SND_SOC_RT9120=m +CONFIG_SND_SOC_SDW_MOCKUP=m +CONFIG_SND_SOC_SGTL5000=m +CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m +CONFIG_SND_SOC_SIMPLE_MUX=m +CONFIG_SND_SOC_SPDIF=m +CONFIG_SND_SOC_SSM2305=m +CONFIG_SND_SOC_SSM2518=m +CONFIG_SND_SOC_SSM2602_SPI=m +CONFIG_SND_SOC_SSM2602_I2C=m +CONFIG_SND_SOC_SSM4567=m +CONFIG_SND_SOC_STA32X=m +CONFIG_SND_SOC_STA350=m +CONFIG_SND_SOC_STI_SAS=m +CONFIG_SND_SOC_TAS2552=m +CONFIG_SND_SOC_TAS2562=m +CONFIG_SND_SOC_TAS2764=m +CONFIG_SND_SOC_TAS2770=m +CONFIG_SND_SOC_TAS5086=m +CONFIG_SND_SOC_TAS571X=m +CONFIG_SND_SOC_TAS5720=m +CONFIG_SND_SOC_TAS5805M=m +CONFIG_SND_SOC_TAS6424=m +CONFIG_SND_SOC_TDA7419=m +CONFIG_SND_SOC_TFA9879=m +CONFIG_SND_SOC_TFA989X=m +CONFIG_SND_SOC_TLV320ADC3XXX=m +CONFIG_SND_SOC_TLV320AIC23_I2C=m +CONFIG_SND_SOC_TLV320AIC23_SPI=m +CONFIG_SND_SOC_TLV320AIC31XX=m +CONFIG_SND_SOC_TLV320AIC32X4_I2C=m +CONFIG_SND_SOC_TLV320AIC32X4_SPI=m +CONFIG_SND_SOC_TLV320AIC3X_I2C=m +CONFIG_SND_SOC_TLV320AIC3X_SPI=m +CONFIG_SND_SOC_TLV320ADCX140=m +CONFIG_SND_SOC_TS3A227E=m +CONFIG_SND_SOC_TSCS42XX=m +CONFIG_SND_SOC_TSCS454=m +CONFIG_SND_SOC_UDA1334=m +CONFIG_SND_SOC_WCD9335=m +CONFIG_SND_SOC_WCD934X=m +CONFIG_SND_SOC_WCD938X_SDW=m +CONFIG_SND_SOC_WM8510=m +CONFIG_SND_SOC_WM8523=m +CONFIG_SND_SOC_WM8524=m +CONFIG_SND_SOC_WM8580=m +CONFIG_SND_SOC_WM8711=m +CONFIG_SND_SOC_WM8728=m +CONFIG_SND_SOC_WM8731_I2C=m +CONFIG_SND_SOC_WM8731_SPI=m +CONFIG_SND_SOC_WM8737=m +CONFIG_SND_SOC_WM8741=m +CONFIG_SND_SOC_WM8750=m +CONFIG_SND_SOC_WM8753=m +CONFIG_SND_SOC_WM8770=m +CONFIG_SND_SOC_WM8776=m +CONFIG_SND_SOC_WM8782=m +CONFIG_SND_SOC_WM8804_I2C=m +CONFIG_SND_SOC_WM8804_SPI=m +CONFIG_SND_SOC_WM8903=m +CONFIG_SND_SOC_WM8904=m +CONFIG_SND_SOC_WM8940=m +CONFIG_SND_SOC_WM8960=m +CONFIG_SND_SOC_WM8962=m +CONFIG_SND_SOC_WM8974=m +CONFIG_SND_SOC_WM8978=m +CONFIG_SND_SOC_WM8985=m +CONFIG_SND_SOC_WSA881X=m +CONFIG_SND_SOC_ZL38060=m +CONFIG_SND_SOC_MAX9759=m +CONFIG_SND_SOC_MT6351=m +CONFIG_SND_SOC_MT6358=m +CONFIG_SND_SOC_MT6660=m +CONFIG_SND_SOC_NAU8315=m +CONFIG_SND_SOC_NAU8540=m +CONFIG_SND_SOC_NAU8810=m +CONFIG_SND_SOC_NAU8821=m +CONFIG_SND_SOC_NAU8822=m +CONFIG_SND_SOC_NAU8824=m +CONFIG_SND_SOC_TPA6130A2=m +CONFIG_SND_SOC_LPASS_WSA_MACRO=m +CONFIG_SND_SOC_LPASS_VA_MACRO=m +CONFIG_SND_SOC_LPASS_RX_MACRO=m +CONFIG_SND_SOC_LPASS_TX_MACRO=m +CONFIG_SND_SIMPLE_CARD=m +CONFIG_SND_AUDIO_GRAPH_CARD=m +CONFIG_SND_AUDIO_GRAPH_CARD2=m +CONFIG_SND_AUDIO_GRAPH_CARD2_CUSTOM_SAMPLE=m +CONFIG_SND_TEST_COMPONENT=m +CONFIG_SND_VIRTIO=m +CONFIG_HID=m +CONFIG_HID_BATTERY_STRENGTH=y +CONFIG_HIDRAW=y +CONFIG_UHID=m +CONFIG_HID_A4TECH=m +CONFIG_HID_ACCUTOUCH=m +CONFIG_HID_ACRUX=m +CONFIG_HID_ACRUX_FF=y +CONFIG_HID_APPLE=m +CONFIG_HID_APPLEIR=m +CONFIG_HID_ASUS=m +CONFIG_HID_AUREAL=m +CONFIG_HID_BELKIN=m +CONFIG_HID_BETOP_FF=m +CONFIG_HID_BIGBEN_FF=m +CONFIG_HID_CHERRY=m +CONFIG_HID_CHICONY=m +CONFIG_HID_CORSAIR=m +CONFIG_HID_COUGAR=m +CONFIG_HID_MACALLY=m +CONFIG_HID_PRODIKEYS=m +CONFIG_HID_CMEDIA=m +CONFIG_HID_CP2112=m +CONFIG_HID_CREATIVE_SB0540=m +CONFIG_HID_CYPRESS=m +CONFIG_HID_DRAGONRISE=m +CONFIG_DRAGONRISE_FF=y +CONFIG_HID_EMS_FF=m +CONFIG_HID_ELAN=m +CONFIG_HID_ELECOM=m +CONFIG_HID_ELO=m +CONFIG_HID_EZKEY=m +CONFIG_HID_FT260=m +CONFIG_HID_GEMBIRD=m +CONFIG_HID_GFRM=m +CONFIG_HID_GLORIOUS=m +CONFIG_HID_HOLTEK=m +CONFIG_HOLTEK_FF=y +CONFIG_HID_VIVALDI=m +CONFIG_HID_GT683R=m +CONFIG_HID_KEYTOUCH=m +CONFIG_HID_KYE=m +CONFIG_HID_UCLOGIC=m +CONFIG_HID_WALTOP=m +CONFIG_HID_VIEWSONIC=m +CONFIG_HID_XIAOMI=m +CONFIG_HID_GYRATION=m +CONFIG_HID_ICADE=m +CONFIG_HID_ITE=m +CONFIG_HID_JABRA=m +CONFIG_HID_TWINHAN=m +CONFIG_HID_KENSINGTON=m +CONFIG_HID_LCPOWER=m +CONFIG_HID_LENOVO=m +CONFIG_HID_LETSKETCH=m +CONFIG_HID_LOGITECH=m +CONFIG_HID_LOGITECH_DJ=m +CONFIG_LOGITECH_FF=y +CONFIG_LOGIRUMBLEPAD2_FF=y +CONFIG_LOGIG940_FF=y +CONFIG_HID_MAGICMOUSE=m +CONFIG_HID_MALTRON=m +CONFIG_HID_MAYFLASH=m +CONFIG_HID_MEGAWORLD_FF=m +CONFIG_HID_REDRAGON=m +CONFIG_HID_MICROSOFT=m +CONFIG_HID_MONTEREY=m +CONFIG_HID_MULTITOUCH=m +CONFIG_HID_NINTENDO=m +CONFIG_NINTENDO_FF=y +CONFIG_HID_NTI=m +CONFIG_HID_NTRIG=m +CONFIG_HID_ORTEK=m +CONFIG_HID_PANTHERLORD=m +CONFIG_PANTHERLORD_FF=y +CONFIG_HID_PENMOUNT=m +CONFIG_HID_PETALYNX=m +CONFIG_HID_PICOLCD=m +CONFIG_HID_PICOLCD_FB=y +CONFIG_HID_PICOLCD_BACKLIGHT=y +CONFIG_HID_PICOLCD_LCD=y +CONFIG_HID_PICOLCD_LEDS=y +CONFIG_HID_PICOLCD_CIR=y +CONFIG_HID_PLANTRONICS=m +CONFIG_HID_PLAYSTATION=m +CONFIG_PLAYSTATION_FF=y +CONFIG_HID_RAZER=m +CONFIG_HID_PRIMAX=m +CONFIG_HID_RETRODE=m +CONFIG_HID_ROCCAT=m +CONFIG_HID_SAITEK=m +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SEMITEK=m +CONFIG_HID_SIGMAMICRO=m +CONFIG_HID_SONY=m +CONFIG_SONY_FF=y +CONFIG_HID_SPEEDLINK=m +CONFIG_HID_STEAM=m +CONFIG_HID_STEELSERIES=m +CONFIG_HID_SUNPLUS=m +CONFIG_HID_RMI=m +CONFIG_HID_GREENASIA=m +CONFIG_GREENASIA_FF=y +CONFIG_HID_SMARTJOYPLUS=m +CONFIG_SMARTJOYPLUS_FF=y +CONFIG_HID_TIVO=m +CONFIG_HID_TOPSEED=m +CONFIG_HID_THINGM=m +CONFIG_HID_THRUSTMASTER=m +CONFIG_THRUSTMASTER_FF=y +CONFIG_HID_UDRAW_PS3=m +CONFIG_HID_U2FZERO=m +CONFIG_HID_WACOM=m +CONFIG_HID_WIIMOTE=m +CONFIG_HID_XINMO=m +CONFIG_HID_ZEROPLUS=m +CONFIG_ZEROPLUS_FF=y +CONFIG_HID_ZYDACRON=m +CONFIG_HID_SENSOR_HUB=m +CONFIG_HID_SENSOR_CUSTOM_SENSOR=m +CONFIG_HID_ALPS=m +CONFIG_HID_MCP2221=m +CONFIG_USB_HID=m +CONFIG_HID_PID=y +CONFIG_USB_HIDDEV=y +CONFIG_USB_KBD=m +CONFIG_USB_MOUSE=m +CONFIG_I2C_HID_OF=m +CONFIG_I2C_HID_OF_GOODIX=m +CONFIG_USB_LED_TRIG=y +CONFIG_USB_CONN_GPIO=m +CONFIG_USB=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_DYNAMIC_MINORS=y +CONFIG_USB_LEDS_TRIGGER_USBPORT=m +CONFIG_USB_MON=m +CONFIG_USB_C67X00_HCD=m +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DBGCAP=y +CONFIG_USB_XHCI_PCI_RENESAS=m +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_FSL=m +CONFIG_USB_OXU210HP_HCD=m +CONFIG_USB_ISP116X_HCD=m +CONFIG_USB_MAX3421_HCD=m +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_UHCI_HCD=y +CONFIG_USB_U132_HCD=m +CONFIG_USB_SL811_HCD=m +CONFIG_USB_SL811_HCD_ISO=y +CONFIG_USB_R8A66597_HCD=m +CONFIG_USB_HCD_BCMA=m +CONFIG_USB_HCD_SSB=m +CONFIG_USB_PRINTER=m +CONFIG_USB_TMC=m +CONFIG_USB_STORAGE=m +CONFIG_USB_STORAGE_REALTEK=m +CONFIG_USB_STORAGE_DATAFAB=m +CONFIG_USB_STORAGE_FREECOM=m +CONFIG_USB_STORAGE_ISD200=m +CONFIG_USB_STORAGE_USBAT=m +CONFIG_USB_STORAGE_SDDR09=m +CONFIG_USB_STORAGE_SDDR55=m +CONFIG_USB_STORAGE_JUMPSHOT=m +CONFIG_USB_STORAGE_ALAUDA=m +CONFIG_USB_STORAGE_ONETOUCH=m +CONFIG_USB_STORAGE_KARMA=m +CONFIG_USB_STORAGE_CYPRESS_ATACB=m +CONFIG_USB_STORAGE_ENE_UB6250=m +CONFIG_USB_UAS=m +CONFIG_USB_MDC800=m +CONFIG_USB_MICROTEK=m +CONFIG_USBIP_CORE=m +CONFIG_USBIP_VHCI_HCD=m +CONFIG_USBIP_HOST=m +CONFIG_USBIP_VUDC=m +CONFIG_USB_CDNS_SUPPORT=m +CONFIG_USB_CDNS3=m +CONFIG_USB_CDNS3_GADGET=y +CONFIG_USB_CDNS3_HOST=y +CONFIG_USB_MUSB_HDRC=m +CONFIG_USB_MUSB_POLARFIRE_SOC=m +CONFIG_MUSB_PIO_ONLY=y +CONFIG_USB_DWC3=m +CONFIG_USB_DWC3_ULPI=y +CONFIG_USB_DWC2=y +CONFIG_USB_DWC2_PCI=m +CONFIG_USB_CHIPIDEA=m +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_ISP1760=m +CONFIG_USB_USS720=m +CONFIG_USB_SERIAL=m +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_SIMPLE=m +CONFIG_USB_SERIAL_AIRCABLE=m +CONFIG_USB_SERIAL_ARK3116=m +CONFIG_USB_SERIAL_BELKIN=m +CONFIG_USB_SERIAL_CH341=m +CONFIG_USB_SERIAL_WHITEHEAT=m +CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m +CONFIG_USB_SERIAL_CP210X=m +CONFIG_USB_SERIAL_CYPRESS_M8=m +CONFIG_USB_SERIAL_EMPEG=m +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_VISOR=m +CONFIG_USB_SERIAL_IPAQ=m +CONFIG_USB_SERIAL_IR=m +CONFIG_USB_SERIAL_EDGEPORT=m +CONFIG_USB_SERIAL_EDGEPORT_TI=m +CONFIG_USB_SERIAL_F81232=m +CONFIG_USB_SERIAL_F8153X=m +CONFIG_USB_SERIAL_GARMIN=m +CONFIG_USB_SERIAL_IPW=m +CONFIG_USB_SERIAL_IUU=m +CONFIG_USB_SERIAL_KEYSPAN_PDA=m +CONFIG_USB_SERIAL_KEYSPAN=m +CONFIG_USB_SERIAL_KLSI=m +CONFIG_USB_SERIAL_KOBIL_SCT=m +CONFIG_USB_SERIAL_MCT_U232=m +CONFIG_USB_SERIAL_METRO=m +CONFIG_USB_SERIAL_MOS7720=m +CONFIG_USB_SERIAL_MOS7715_PARPORT=y +CONFIG_USB_SERIAL_MOS7840=m +CONFIG_USB_SERIAL_MXUPORT=m +CONFIG_USB_SERIAL_NAVMAN=m +CONFIG_USB_SERIAL_PL2303=m +CONFIG_USB_SERIAL_OTI6858=m +CONFIG_USB_SERIAL_QCAUX=m +CONFIG_USB_SERIAL_QUALCOMM=m +CONFIG_USB_SERIAL_SPCP8X5=m +CONFIG_USB_SERIAL_SAFE=m +CONFIG_USB_SERIAL_SIERRAWIRELESS=m +CONFIG_USB_SERIAL_SYMBOL=m +CONFIG_USB_SERIAL_TI=m +CONFIG_USB_SERIAL_CYBERJACK=m +CONFIG_USB_SERIAL_OPTION=m +CONFIG_USB_SERIAL_OMNINET=m +CONFIG_USB_SERIAL_OPTICON=m +CONFIG_USB_SERIAL_XSENS_MT=m +CONFIG_USB_SERIAL_WISHBONE=m +CONFIG_USB_SERIAL_SSU100=m +CONFIG_USB_SERIAL_QT2=m +CONFIG_USB_SERIAL_UPD78F0730=m +CONFIG_USB_SERIAL_XR=m +CONFIG_USB_SERIAL_DEBUG=m +CONFIG_USB_EMI62=m +CONFIG_USB_EMI26=m +CONFIG_USB_ADUTUX=m +CONFIG_USB_SEVSEG=m +CONFIG_USB_LEGOTOWER=m +CONFIG_USB_LCD=m +CONFIG_USB_CYPRESS_CY7C63=m +CONFIG_USB_CYTHERM=m +CONFIG_USB_IDMOUSE=m +CONFIG_USB_FTDI_ELAN=m +CONFIG_USB_APPLEDISPLAY=m +CONFIG_APPLE_MFI_FASTCHARGE=m +CONFIG_USB_SISUSBVGA=m +CONFIG_USB_LD=m +CONFIG_USB_TRANCEVIBRATOR=m +CONFIG_USB_IOWARRIOR=m +CONFIG_USB_TEST=m +CONFIG_USB_EHSET_TEST_FIXTURE=m +CONFIG_USB_ISIGHTFW=m +CONFIG_USB_YUREX=m +CONFIG_USB_HUB_USB251XB=m +CONFIG_USB_HSIC_USB3503=m +CONFIG_USB_HSIC_USB4604=m +CONFIG_USB_LINK_LAYER_TEST=m +CONFIG_USB_CHAOSKEY=m +CONFIG_USB_ATM=m +CONFIG_USB_SPEEDTOUCH=m +CONFIG_USB_CXACRU=m +CONFIG_USB_UEAGLEATM=m +CONFIG_USB_XUSBATM=m +CONFIG_USB_GPIO_VBUS=m +CONFIG_TAHVO_USB=m +CONFIG_TAHVO_USB_HOST_BY_DEFAULT=y +CONFIG_USB_ISP1301=m +CONFIG_USB_GADGET=m +CONFIG_U_SERIAL_CONSOLE=y +CONFIG_USB_GR_UDC=m +CONFIG_USB_R8A66597=m +CONFIG_USB_PXA27X=m +CONFIG_USB_MV_UDC=m +CONFIG_USB_MV_U3D=m +CONFIG_USB_SNP_UDC_PLAT=m +CONFIG_USB_BDC_UDC=m +CONFIG_USB_AMD5536UDC=m +CONFIG_USB_NET2272=m +CONFIG_USB_NET2272_DMA=y +CONFIG_USB_NET2280=m +CONFIG_USB_GOKU=m +CONFIG_USB_EG20T=m +CONFIG_USB_GADGET_XILINX=m +CONFIG_USB_MAX3420_UDC=m +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_PHONET=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_F_LB_SS=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_USB_CONFIGFS_F_UAC1=y +CONFIG_USB_CONFIGFS_F_UAC1_LEGACY=y +CONFIG_USB_CONFIGFS_F_UAC2=y +CONFIG_USB_CONFIGFS_F_MIDI=y +CONFIG_USB_CONFIGFS_F_HID=y +CONFIG_USB_CONFIGFS_F_UVC=y +CONFIG_USB_CONFIGFS_F_PRINTER=y +CONFIG_USB_CONFIGFS_F_TCM=y +CONFIG_USB_ZERO=m +CONFIG_USB_AUDIO=m +CONFIG_GADGET_UAC1=y +CONFIG_USB_ETH=m +CONFIG_USB_ETH_EEM=y +CONFIG_USB_G_NCM=m +CONFIG_USB_GADGETFS=m +CONFIG_USB_FUNCTIONFS=m +CONFIG_USB_FUNCTIONFS_ETH=y +CONFIG_USB_FUNCTIONFS_RNDIS=y +CONFIG_USB_FUNCTIONFS_GENERIC=y +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_GADGET_TARGET=m +CONFIG_USB_G_SERIAL=m +CONFIG_USB_MIDI_GADGET=m +CONFIG_USB_G_PRINTER=m +CONFIG_USB_CDC_COMPOSITE=m +CONFIG_USB_G_NOKIA=m +CONFIG_USB_G_ACM_MS=m +CONFIG_USB_G_HID=m +CONFIG_USB_G_DBGP=m +CONFIG_USB_G_WEBCAM=m +CONFIG_USB_RAW_GADGET=m +CONFIG_TYPEC=m +CONFIG_TYPEC_TCPM=m +CONFIG_TYPEC_TCPCI=m +CONFIG_TYPEC_RT1711H=m +CONFIG_TYPEC_MT6360=m +CONFIG_TYPEC_TCPCI_MAXIM=m +CONFIG_TYPEC_FUSB302=m +CONFIG_TYPEC_UCSI=m +CONFIG_UCSI_CCG=m +CONFIG_TYPEC_TPS6598X=m +CONFIG_TYPEC_RT1719=m +CONFIG_TYPEC_HD3SS3220=m +CONFIG_TYPEC_STUSB160X=m +CONFIG_TYPEC_WUSB3801=m +CONFIG_TYPEC_MUX_FSA4480=m +CONFIG_TYPEC_MUX_PI3USB30532=m +CONFIG_TYPEC_DP_ALTMODE=m +CONFIG_TYPEC_NVIDIA_ALTMODE=m +CONFIG_MMC=y +CONFIG_PWRSEQ_EMMC=m +CONFIG_PWRSEQ_SD8787=m +CONFIG_PWRSEQ_SIMPLE=m +CONFIG_SDIO_UART=m +CONFIG_MMC_CRYPTO=y +CONFIG_MMC_SDHCI=m +CONFIG_MMC_SDHCI_PCI=m +CONFIG_MMC_SDHCI_PLTFM=m +CONFIG_MMC_SDHCI_OF_ARASAN=m +CONFIG_MMC_SDHCI_OF_AT91=m +CONFIG_MMC_SDHCI_OF_DWCMSHC=m +CONFIG_MMC_SDHCI_CADENCE=m +CONFIG_MMC_SDHCI_F_SDH30=m +CONFIG_MMC_SDHCI_MILBEAUT=m +CONFIG_MMC_ALCOR=m +CONFIG_MMC_TIFM_SD=m +CONFIG_MMC_SPI=y +CONFIG_MMC_CB710=m +CONFIG_MMC_VIA_SDMMC=m +CONFIG_MMC_DW=m +CONFIG_MMC_DW_BLUEFIELD=m +CONFIG_MMC_DW_EXYNOS=m +CONFIG_MMC_DW_HI3798CV200=m +CONFIG_MMC_DW_K3=m +CONFIG_MMC_DW_PCI=m +CONFIG_MMC_VUB300=m +CONFIG_MMC_USHC=m +CONFIG_MMC_USDHI6ROL0=m +CONFIG_MMC_REALTEK_PCI=m +CONFIG_MMC_REALTEK_USB=m +CONFIG_MMC_HSQ=m +CONFIG_MMC_TOSHIBA_PCI=m +CONFIG_MMC_MTK=m +CONFIG_MMC_SDHCI_XENON=m +CONFIG_MMC_SDHCI_OMAP=m +CONFIG_MMC_SDHCI_AM654=m +CONFIG_MMC_LITEX=m +CONFIG_SCSI_UFSHCD=m +CONFIG_SCSI_UFS_BSG=y +CONFIG_SCSI_UFS_CRYPTO=y +CONFIG_SCSI_UFS_HPB=y +CONFIG_SCSI_UFSHCD_PCI=m +CONFIG_SCSI_UFS_DWC_TC_PCI=m +CONFIG_SCSI_UFSHCD_PLATFORM=m +CONFIG_SCSI_UFS_CDNS_PLATFORM=m +CONFIG_SCSI_UFS_DWC_TC_PLATFORM=m +CONFIG_MEMSTICK=m +CONFIG_MSPRO_BLOCK=m +CONFIG_MS_BLOCK=m +CONFIG_MEMSTICK_TIFM_MS=m +CONFIG_MEMSTICK_JMICRON_38X=m +CONFIG_MEMSTICK_R592=m +CONFIG_MEMSTICK_REALTEK_PCI=m +CONFIG_MEMSTICK_REALTEK_USB=m +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_CLASS_FLASH=m +CONFIG_LEDS_CLASS_MULTICOLOR=m +CONFIG_LEDS_BRIGHTNESS_HW_CHANGED=y +CONFIG_LEDS_88PM860X=m +CONFIG_LEDS_AN30259A=m +CONFIG_LEDS_AW2013=m +CONFIG_LEDS_BCM6328=m +CONFIG_LEDS_BCM6358=m +CONFIG_LEDS_CPCAP=m +CONFIG_LEDS_CR0014114=m +CONFIG_LEDS_EL15203000=m +CONFIG_LEDS_LM3530=m +CONFIG_LEDS_LM3532=m +CONFIG_LEDS_LM3533=m +CONFIG_LEDS_LM3642=m +CONFIG_LEDS_LM3692X=m +CONFIG_LEDS_MT6323=m +CONFIG_LEDS_PCA9532=m +CONFIG_LEDS_PCA9532_GPIO=y +CONFIG_LEDS_GPIO=m +CONFIG_LEDS_LP3944=m +CONFIG_LEDS_LP3952=m +CONFIG_LEDS_LP50XX=m +CONFIG_LEDS_LP55XX_COMMON=m +CONFIG_LEDS_LP5521=m +CONFIG_LEDS_LP5523=m +CONFIG_LEDS_LP5562=m +CONFIG_LEDS_LP8501=m +CONFIG_LEDS_LP8788=m +CONFIG_LEDS_LP8860=m +CONFIG_LEDS_PCA955X=m +CONFIG_LEDS_PCA955X_GPIO=y +CONFIG_LEDS_PCA963X=m +CONFIG_LEDS_WM831X_STATUS=m +CONFIG_LEDS_WM8350=m +CONFIG_LEDS_DA903X=m +CONFIG_LEDS_DA9052=m +CONFIG_LEDS_DAC124S085=m +CONFIG_LEDS_PWM=m +CONFIG_LEDS_REGULATOR=m +CONFIG_LEDS_BD2802=m +CONFIG_LEDS_LT3593=m +CONFIG_LEDS_ADP5520=m +CONFIG_LEDS_MC13783=m +CONFIG_LEDS_TCA6507=m +CONFIG_LEDS_TLC591XX=m +CONFIG_LEDS_MAX77650=m +CONFIG_LEDS_MAX8997=m +CONFIG_LEDS_LM355x=m +CONFIG_LEDS_MENF21BMC=m +CONFIG_LEDS_IS31FL319X=m +CONFIG_LEDS_IS31FL32XX=m +CONFIG_LEDS_BLINKM=m +CONFIG_LEDS_SYSCON=y +CONFIG_LEDS_MLXREG=m +CONFIG_LEDS_USER=m +CONFIG_LEDS_SPI_BYTE=m +CONFIG_LEDS_TI_LMU_COMMON=m +CONFIG_LEDS_LM3697=m +CONFIG_LEDS_LM36274=m +CONFIG_LEDS_AAT1290=m +CONFIG_LEDS_AS3645A=m +CONFIG_LEDS_KTD2692=m +CONFIG_LEDS_LM3601X=m +CONFIG_LEDS_MAX77693=m +CONFIG_LEDS_MT6360=m +CONFIG_LEDS_RT4505=m +CONFIG_LEDS_RT8515=m +CONFIG_LEDS_SGM3140=m +CONFIG_LEDS_PWM_MULTICOLOR=m +CONFIG_LEDS_QCOM_LPG=m +CONFIG_LEDS_TRIGGER_TIMER=m +CONFIG_LEDS_TRIGGER_ONESHOT=m +CONFIG_LEDS_TRIGGER_DISK=y +CONFIG_LEDS_TRIGGER_MTD=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=m +CONFIG_LEDS_TRIGGER_BACKLIGHT=m +CONFIG_LEDS_TRIGGER_CPU=y +CONFIG_LEDS_TRIGGER_ACTIVITY=m +CONFIG_LEDS_TRIGGER_GPIO=m +CONFIG_LEDS_TRIGGER_DEFAULT_ON=m +CONFIG_LEDS_TRIGGER_TRANSIENT=m +CONFIG_LEDS_TRIGGER_CAMERA=m +CONFIG_LEDS_TRIGGER_PANIC=y +CONFIG_LEDS_TRIGGER_NETDEV=m +CONFIG_LEDS_TRIGGER_PATTERN=m +CONFIG_LEDS_TRIGGER_TTY=m +CONFIG_INFINIBAND=m +CONFIG_INFINIBAND_USER_MAD=m +CONFIG_INFINIBAND_USER_ACCESS=m +CONFIG_INFINIBAND_BNXT_RE=m +CONFIG_INFINIBAND_CXGB4=m +CONFIG_INFINIBAND_EFA=m +CONFIG_INFINIBAND_IRDMA=m +CONFIG_MLX4_INFINIBAND=m +CONFIG_MLX5_INFINIBAND=m +CONFIG_INFINIBAND_MTHCA=m +# CONFIG_INFINIBAND_MTHCA_DEBUG is not set +CONFIG_INFINIBAND_OCRDMA=m +CONFIG_INFINIBAND_QEDR=m +CONFIG_INFINIBAND_VMWARE_PVRDMA=m +CONFIG_RDMA_RXE=m +CONFIG_RDMA_SIW=m +CONFIG_INFINIBAND_IPOIB=m +CONFIG_INFINIBAND_IPOIB_CM=y +# CONFIG_INFINIBAND_IPOIB_DEBUG is not set +CONFIG_INFINIBAND_SRP=m +CONFIG_INFINIBAND_SRPT=m +CONFIG_INFINIBAND_ISER=m +CONFIG_INFINIBAND_ISERT=m +CONFIG_INFINIBAND_RTRS_CLIENT=m +CONFIG_INFINIBAND_RTRS_SERVER=m +CONFIG_EDAC=y +# CONFIG_EDAC_LEGACY_SYSFS is not set +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_88PM860X=m +CONFIG_RTC_DRV_88PM80X=m +CONFIG_RTC_DRV_ABB5ZES3=m +CONFIG_RTC_DRV_ABEOZ9=m +CONFIG_RTC_DRV_ABX80X=m +CONFIG_RTC_DRV_AS3722=m +CONFIG_RTC_DRV_DS1307=m +CONFIG_RTC_DRV_DS1307_CENTURY=y +CONFIG_RTC_DRV_DS1374=m +CONFIG_RTC_DRV_DS1374_WDT=y +CONFIG_RTC_DRV_DS1672=m +CONFIG_RTC_DRV_HYM8563=m +CONFIG_RTC_DRV_LP8788=m +CONFIG_RTC_DRV_MAX6900=m +CONFIG_RTC_DRV_MAX8907=m +CONFIG_RTC_DRV_MAX8925=m +CONFIG_RTC_DRV_MAX8998=m +CONFIG_RTC_DRV_MAX8997=m +CONFIG_RTC_DRV_MAX77686=m +CONFIG_RTC_DRV_RK808=m +CONFIG_RTC_DRV_RS5C372=m +CONFIG_RTC_DRV_ISL1208=m +CONFIG_RTC_DRV_ISL12022=m +CONFIG_RTC_DRV_ISL12026=m +CONFIG_RTC_DRV_X1205=m +CONFIG_RTC_DRV_PCF8523=m +CONFIG_RTC_DRV_PCF85063=m +CONFIG_RTC_DRV_PCF85363=m +CONFIG_RTC_DRV_PCF8563=m +CONFIG_RTC_DRV_PCF8583=m +CONFIG_RTC_DRV_M41T80=m +CONFIG_RTC_DRV_M41T80_WDT=y +CONFIG_RTC_DRV_BD70528=m +CONFIG_RTC_DRV_BQ32K=m +CONFIG_RTC_DRV_TWL4030=m +CONFIG_RTC_DRV_PALMAS=m +CONFIG_RTC_DRV_TPS6586X=m +CONFIG_RTC_DRV_TPS65910=m +CONFIG_RTC_DRV_RC5T583=m +CONFIG_RTC_DRV_RC5T619=m +CONFIG_RTC_DRV_S35390A=m +CONFIG_RTC_DRV_FM3130=m +CONFIG_RTC_DRV_RX8010=m +CONFIG_RTC_DRV_RX8581=m +CONFIG_RTC_DRV_RX8025=m +CONFIG_RTC_DRV_EM3027=m +CONFIG_RTC_DRV_RV3028=m +CONFIG_RTC_DRV_RV3032=m +CONFIG_RTC_DRV_RV8803=m +CONFIG_RTC_DRV_S5M=m +CONFIG_RTC_DRV_SD3078=m +CONFIG_RTC_DRV_M41T93=m +CONFIG_RTC_DRV_M41T94=m +CONFIG_RTC_DRV_DS1302=m +CONFIG_RTC_DRV_DS1305=m +CONFIG_RTC_DRV_DS1343=m +CONFIG_RTC_DRV_DS1347=m +CONFIG_RTC_DRV_DS1390=m +CONFIG_RTC_DRV_MAX6916=m +CONFIG_RTC_DRV_R9701=m +CONFIG_RTC_DRV_RX4581=m +CONFIG_RTC_DRV_RS5C348=m +CONFIG_RTC_DRV_MAX6902=m +CONFIG_RTC_DRV_PCF2123=m +CONFIG_RTC_DRV_MCP795=m +CONFIG_RTC_DRV_DS3232=m +CONFIG_RTC_DRV_PCF2127=m +CONFIG_RTC_DRV_RV3029C2=m +CONFIG_RTC_DRV_RX6110=m +CONFIG_RTC_DRV_DS1286=m +CONFIG_RTC_DRV_DS1511=m +CONFIG_RTC_DRV_DS1553=m +CONFIG_RTC_DRV_DS1685_FAMILY=m +CONFIG_RTC_DRV_DS1742=m +CONFIG_RTC_DRV_DS2404=m +CONFIG_RTC_DRV_DA9052=m +CONFIG_RTC_DRV_DA9055=m +CONFIG_RTC_DRV_DA9063=m +CONFIG_RTC_DRV_EFI=m +CONFIG_RTC_DRV_STK17TA8=m +CONFIG_RTC_DRV_M48T86=m +CONFIG_RTC_DRV_M48T35=m +CONFIG_RTC_DRV_M48T59=m +CONFIG_RTC_DRV_MSM6242=m +CONFIG_RTC_DRV_BQ4802=m +CONFIG_RTC_DRV_RP5C01=m +CONFIG_RTC_DRV_WM831X=m +CONFIG_RTC_DRV_WM8350=m +CONFIG_RTC_DRV_PCF50633=m +CONFIG_RTC_DRV_ZYNQMP=m +CONFIG_RTC_DRV_NTXEC=m +CONFIG_RTC_DRV_CADENCE=m +CONFIG_RTC_DRV_FTRTC010=m +CONFIG_RTC_DRV_PCAP=m +CONFIG_RTC_DRV_MC13XXX=m +CONFIG_RTC_DRV_MT6397=m +CONFIG_RTC_DRV_R7301=m +CONFIG_RTC_DRV_CPCAP=m +CONFIG_RTC_DRV_HID_SENSOR_TIME=m +CONFIG_DMADEVICES=y +CONFIG_ALTERA_MSGDMA=m +CONFIG_DW_AXI_DMAC=m +CONFIG_FSL_EDMA=m +CONFIG_INTEL_IDMA64=m +CONFIG_PLX_DMA=m +CONFIG_XILINX_ZYNQMP_DPDMA=m +CONFIG_QCOM_HIDMA_MGMT=m +CONFIG_QCOM_HIDMA=m +CONFIG_DW_DMAC=m +CONFIG_DW_DMAC_PCI=m +CONFIG_DW_EDMA=m +CONFIG_DW_EDMA_PCIE=m +CONFIG_SF_PDMA=m +CONFIG_ASYNC_TX_DMA=y +CONFIG_SW_SYNC=y +CONFIG_UDMABUF=y +CONFIG_DMABUF_HEAPS=y +CONFIG_DMABUF_HEAPS_SYSTEM=y +CONFIG_DMABUF_HEAPS_CMA=y +CONFIG_HD44780=m +CONFIG_KS0108=m +CONFIG_IMG_ASCII_LCD=m +CONFIG_HT16K33=m +CONFIG_LCD2S=m +CONFIG_PANEL=m +CONFIG_UIO_CIF=m +CONFIG_UIO_PDRV_GENIRQ=m +CONFIG_UIO_DMEM_GENIRQ=m +CONFIG_UIO_AEC=m +CONFIG_UIO_SERCOS3=m +CONFIG_UIO_PCI_GENERIC=m +CONFIG_UIO_NETX=m +CONFIG_UIO_PRUSS=m +CONFIG_UIO_MF624=m +CONFIG_UIO_DFL=m +CONFIG_VFIO=m +CONFIG_VFIO_NOIOMMU=y +CONFIG_VFIO_PCI=m +CONFIG_MLX5_VFIO_PCI=m +CONFIG_VIRT_DRIVERS=y +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_VDPA=m +CONFIG_VIRTIO_PMEM=m +CONFIG_VIRTIO_BALLOON=y +CONFIG_VIRTIO_INPUT=m +CONFIG_VIRTIO_MMIO=y +CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y +CONFIG_VDPA=m +CONFIG_VDPA_SIM=m +CONFIG_VDPA_SIM_NET=m +CONFIG_VDPA_SIM_BLOCK=m +CONFIG_VDPA_USER=m +CONFIG_IFCVF=m +CONFIG_MLX5_VDPA_NET=m +CONFIG_VP_VDPA=m +CONFIG_VHOST_NET=m +CONFIG_VHOST_SCSI=m +CONFIG_VHOST_VSOCK=m +CONFIG_VHOST_VDPA=m +CONFIG_COMEDI=m +CONFIG_COMEDI_MISC_DRIVERS=y +CONFIG_COMEDI_BOND=m +CONFIG_COMEDI_TEST=m +CONFIG_COMEDI_PARPORT=m +CONFIG_COMEDI_ISA_DRIVERS=y +CONFIG_COMEDI_PCL711=m +CONFIG_COMEDI_PCL724=m +CONFIG_COMEDI_PCL726=m +CONFIG_COMEDI_PCL730=m +CONFIG_COMEDI_PCL812=m +CONFIG_COMEDI_PCL816=m +CONFIG_COMEDI_PCL818=m +CONFIG_COMEDI_PCM3724=m +CONFIG_COMEDI_AMPLC_DIO200_ISA=m +CONFIG_COMEDI_AMPLC_PC236_ISA=m +CONFIG_COMEDI_AMPLC_PC263_ISA=m +CONFIG_COMEDI_RTI800=m +CONFIG_COMEDI_RTI802=m +CONFIG_COMEDI_DAC02=m +CONFIG_COMEDI_DAS16M1=m +CONFIG_COMEDI_DAS08_ISA=m +CONFIG_COMEDI_DAS16=m +CONFIG_COMEDI_DAS800=m +CONFIG_COMEDI_DAS1800=m +CONFIG_COMEDI_DAS6402=m +CONFIG_COMEDI_DT2801=m +CONFIG_COMEDI_DT2811=m +CONFIG_COMEDI_DT2814=m +CONFIG_COMEDI_DT2815=m +CONFIG_COMEDI_DT2817=m +CONFIG_COMEDI_DT282X=m +CONFIG_COMEDI_DMM32AT=m +CONFIG_COMEDI_FL512=m +CONFIG_COMEDI_AIO_AIO12_8=m +CONFIG_COMEDI_AIO_IIRO_16=m +CONFIG_COMEDI_II_PCI20KC=m +CONFIG_COMEDI_C6XDIGIO=m +CONFIG_COMEDI_MPC624=m +CONFIG_COMEDI_ADQ12B=m +CONFIG_COMEDI_NI_AT_A2150=m +CONFIG_COMEDI_NI_AT_AO=m +CONFIG_COMEDI_NI_ATMIO=m +CONFIG_COMEDI_NI_ATMIO16D=m +CONFIG_COMEDI_NI_LABPC_ISA=m +CONFIG_COMEDI_PCMAD=m +CONFIG_COMEDI_PCMDA12=m +CONFIG_COMEDI_PCMMIO=m +CONFIG_COMEDI_PCMUIO=m +CONFIG_COMEDI_MULTIQ3=m +CONFIG_COMEDI_S526=m +CONFIG_COMEDI_PCI_DRIVERS=m +CONFIG_COMEDI_8255_PCI=m +CONFIG_COMEDI_ADDI_APCI_1032=m +CONFIG_COMEDI_ADDI_APCI_1500=m +CONFIG_COMEDI_ADDI_APCI_1516=m +CONFIG_COMEDI_ADDI_APCI_1564=m +CONFIG_COMEDI_ADDI_APCI_16XX=m +CONFIG_COMEDI_ADDI_APCI_2032=m +CONFIG_COMEDI_ADDI_APCI_2200=m +CONFIG_COMEDI_ADDI_APCI_3120=m +CONFIG_COMEDI_ADDI_APCI_3501=m +CONFIG_COMEDI_ADDI_APCI_3XXX=m +CONFIG_COMEDI_ADL_PCI6208=m +CONFIG_COMEDI_ADL_PCI7X3X=m +CONFIG_COMEDI_ADL_PCI8164=m +CONFIG_COMEDI_ADL_PCI9111=m +CONFIG_COMEDI_ADL_PCI9118=m +CONFIG_COMEDI_ADV_PCI1710=m +CONFIG_COMEDI_ADV_PCI1720=m +CONFIG_COMEDI_ADV_PCI1723=m +CONFIG_COMEDI_ADV_PCI1724=m +CONFIG_COMEDI_ADV_PCI1760=m +CONFIG_COMEDI_ADV_PCI_DIO=m +CONFIG_COMEDI_AMPLC_DIO200_PCI=m +CONFIG_COMEDI_AMPLC_PC236_PCI=m +CONFIG_COMEDI_AMPLC_PC263_PCI=m +CONFIG_COMEDI_AMPLC_PCI224=m +CONFIG_COMEDI_AMPLC_PCI230=m +CONFIG_COMEDI_CONTEC_PCI_DIO=m +CONFIG_COMEDI_DAS08_PCI=m +CONFIG_COMEDI_DT3000=m +CONFIG_COMEDI_DYNA_PCI10XX=m +CONFIG_COMEDI_GSC_HPDI=m +CONFIG_COMEDI_MF6X4=m +CONFIG_COMEDI_ICP_MULTI=m +CONFIG_COMEDI_DAQBOARD2000=m +CONFIG_COMEDI_JR3_PCI=m +CONFIG_COMEDI_KE_COUNTER=m +CONFIG_COMEDI_CB_PCIDAS64=m +CONFIG_COMEDI_CB_PCIDAS=m +CONFIG_COMEDI_CB_PCIDDA=m +CONFIG_COMEDI_CB_PCIMDAS=m +CONFIG_COMEDI_CB_PCIMDDA=m +CONFIG_COMEDI_ME4000=m +CONFIG_COMEDI_ME_DAQ=m +CONFIG_COMEDI_NI_6527=m +CONFIG_COMEDI_NI_65XX=m +CONFIG_COMEDI_NI_660X=m +CONFIG_COMEDI_NI_670X=m +CONFIG_COMEDI_NI_LABPC_PCI=m +CONFIG_COMEDI_NI_PCIDIO=m +CONFIG_COMEDI_NI_PCIMIO=m +CONFIG_COMEDI_RTD520=m +CONFIG_COMEDI_S626=m +CONFIG_COMEDI_USB_DRIVERS=m +CONFIG_COMEDI_DT9812=m +CONFIG_COMEDI_NI_USB6501=m +CONFIG_COMEDI_USBDUX=m +CONFIG_COMEDI_USBDUXFAST=m +CONFIG_COMEDI_USBDUXSIGMA=m +CONFIG_COMEDI_VMK80XX=m +CONFIG_COMEDI_8255_SA=m +CONFIG_COMEDI_TESTS=m +CONFIG_COMEDI_TESTS_EXAMPLE=m +CONFIG_COMEDI_TESTS_NI_ROUTES=m +CONFIG_STAGING=y +CONFIG_PRISM2_USB=m +CONFIG_RTL8192U=m +CONFIG_RTLLIB=m +CONFIG_RTL8192E=m +CONFIG_RTL8723BS=m +CONFIG_R8712U=m +CONFIG_R8188EU=m +CONFIG_RTS5208=m +CONFIG_VT6655=m +CONFIG_VT6656=m +CONFIG_ADIS16203=m +CONFIG_ADIS16240=m +CONFIG_AD7816=m +CONFIG_ADT7316=m +CONFIG_ADT7316_I2C=m +CONFIG_AD9832=m +CONFIG_AD9834=m +CONFIG_AD5933=m +CONFIG_ADE7854=m +CONFIG_AD2S1210=m +CONFIG_FB_SM750=m +CONFIG_STAGING_MEDIA=y +CONFIG_VIDEO_MAX96712=m +CONFIG_LTE_GDM724X=m +CONFIG_FB_TFT=m +CONFIG_FB_TFT_AGM1264K_FL=m +CONFIG_FB_TFT_BD663474=m +CONFIG_FB_TFT_HX8340BN=m +CONFIG_FB_TFT_HX8347D=m +CONFIG_FB_TFT_HX8353D=m +CONFIG_FB_TFT_HX8357D=m +CONFIG_FB_TFT_ILI9163=m +CONFIG_FB_TFT_ILI9320=m +CONFIG_FB_TFT_ILI9325=m +CONFIG_FB_TFT_ILI9340=m +CONFIG_FB_TFT_ILI9341=m +CONFIG_FB_TFT_ILI9481=m +CONFIG_FB_TFT_ILI9486=m +CONFIG_FB_TFT_PCD8544=m +CONFIG_FB_TFT_RA8875=m +CONFIG_FB_TFT_S6D02A1=m +CONFIG_FB_TFT_S6D1121=m +CONFIG_FB_TFT_SEPS525=m +CONFIG_FB_TFT_SH1106=m +CONFIG_FB_TFT_SSD1289=m +CONFIG_FB_TFT_SSD1305=m +CONFIG_FB_TFT_SSD1306=m +CONFIG_FB_TFT_SSD1331=m +CONFIG_FB_TFT_SSD1351=m +CONFIG_FB_TFT_ST7735R=m +CONFIG_FB_TFT_ST7789V=m +CONFIG_FB_TFT_TINYLCD=m +CONFIG_FB_TFT_TLS8204=m +CONFIG_FB_TFT_UC1611=m +CONFIG_FB_TFT_UC1701=m +CONFIG_FB_TFT_UPD161704=m +CONFIG_MOST_COMPONENTS=m +CONFIG_MOST_NET=m +CONFIG_MOST_VIDEO=m +CONFIG_MOST_DIM2=m +CONFIG_MOST_I2C=m +CONFIG_KS7010=m +CONFIG_PI433=m +CONFIG_XIL_AXIS_FIFO=m +CONFIG_FIELDBUS_DEV=m +CONFIG_HMS_ANYBUSS_BUS=m +CONFIG_ARCX_ANYBUS_CONTROLLER=m +CONFIG_HMS_PROFINET=m +CONFIG_QLGE=m +CONFIG_VME_BUS=y +CONFIG_VME_TSI148=m +CONFIG_VME_FAKE=m +CONFIG_VME_USER=m +CONFIG_GOLDFISH_PIPE=m +CONFIG_COMMON_CLK_WM831X=m +CONFIG_LMK04832=m +CONFIG_COMMON_CLK_MAX77686=m +CONFIG_COMMON_CLK_MAX9485=m +CONFIG_COMMON_CLK_RK808=m +CONFIG_COMMON_CLK_SI5341=m +CONFIG_COMMON_CLK_SI5351=m +CONFIG_COMMON_CLK_SI514=m +CONFIG_COMMON_CLK_SI544=m +CONFIG_COMMON_CLK_SI570=m +CONFIG_COMMON_CLK_CDCE706=m +CONFIG_COMMON_CLK_CDCE925=m +CONFIG_COMMON_CLK_CS2000_CP=m +CONFIG_COMMON_CLK_S2MPS11=m +CONFIG_CLK_TWL6040=m +CONFIG_COMMON_CLK_AXI_CLKGEN=m +CONFIG_COMMON_CLK_LOCHNAGAR=m +CONFIG_COMMON_CLK_PALMAS=m +CONFIG_COMMON_CLK_PWM=m +CONFIG_COMMON_CLK_RS9_PCIE=m +CONFIG_COMMON_CLK_VC5=m +CONFIG_COMMON_CLK_BD718XX=m +CONFIG_COMMON_CLK_FIXED_MMIO=y +CONFIG_XILINX_VCU=m +CONFIG_HWSPINLOCK=y +CONFIG_MAILBOX=y +CONFIG_PLATFORM_MHU=m +CONFIG_ALTERA_MBOX=m +CONFIG_MAILBOX_TEST=m +CONFIG_POLARFIRE_SOC_MAILBOX=m +CONFIG_RPMSG_CHAR=m +CONFIG_RPMSG_CTRL=m +CONFIG_RPMSG_QCOM_GLINK_RPM=m +CONFIG_RPMSG_VIRTIO=m +CONFIG_SOUNDWIRE=m +CONFIG_SOUNDWIRE_QCOM=m +CONFIG_LITEX_SOC_CONTROLLER=m +CONFIG_POLARFIRE_SOC_SYS_CTRL=m +CONFIG_SOC_TI=y +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_POWERSAVE=y +CONFIG_DEVFREQ_GOV_USERSPACE=y +CONFIG_DEVFREQ_GOV_PASSIVE=y +CONFIG_PM_DEVFREQ_EVENT=y +CONFIG_EXTCON_ADC_JACK=m +CONFIG_EXTCON_FSA9480=m +CONFIG_EXTCON_GPIO=m +CONFIG_EXTCON_MAX14577=m +CONFIG_EXTCON_MAX3355=m +CONFIG_EXTCON_MAX77693=m +CONFIG_EXTCON_MAX77843=m +CONFIG_EXTCON_MAX8997=m +CONFIG_EXTCON_PALMAS=m +CONFIG_EXTCON_PTN5150=m +CONFIG_EXTCON_RT8973A=m +CONFIG_EXTCON_SM5502=m +CONFIG_EXTCON_USB_GPIO=m +CONFIG_EXTCON_USBC_TUSB320=m +CONFIG_MEMORY=y +CONFIG_FPGA_DFL_EMIF=m +CONFIG_IIO_SW_DEVICE=m +CONFIG_IIO_SW_TRIGGER=m +CONFIG_ADIS16201=m +CONFIG_ADIS16209=m +CONFIG_ADXL313_I2C=m +CONFIG_ADXL313_SPI=m +CONFIG_ADXL355_I2C=m +CONFIG_ADXL355_SPI=m +CONFIG_ADXL367_SPI=m +CONFIG_ADXL367_I2C=m +CONFIG_ADXL372_SPI=m +CONFIG_ADXL372_I2C=m +CONFIG_BMA220=m +CONFIG_BMA400=m +CONFIG_BMC150_ACCEL=m +CONFIG_BMI088_ACCEL=m +CONFIG_DA280=m +CONFIG_DA311=m +CONFIG_DMARD06=m +CONFIG_DMARD09=m +CONFIG_DMARD10=m +CONFIG_FXLS8962AF_I2C=m +CONFIG_FXLS8962AF_SPI=m +CONFIG_HID_SENSOR_ACCEL_3D=m +CONFIG_KXSD9=m +CONFIG_KXCJK1013=m +CONFIG_MC3230=m +CONFIG_MMA7455_I2C=m +CONFIG_MMA7455_SPI=m +CONFIG_MMA7660=m +CONFIG_MMA8452=m +CONFIG_MMA9551=m +CONFIG_MMA9553=m +CONFIG_MXC4005=m +CONFIG_MXC6255=m +CONFIG_SCA3000=m +CONFIG_SCA3300=m +CONFIG_STK8312=m +CONFIG_STK8BA50=m +CONFIG_AD7091R5=m +CONFIG_AD7124=m +CONFIG_AD7192=m +CONFIG_AD7266=m +CONFIG_AD7280=m +CONFIG_AD7291=m +CONFIG_AD7292=m +CONFIG_AD7298=m +CONFIG_AD7476=m +CONFIG_AD7606_IFACE_PARALLEL=m +CONFIG_AD7606_IFACE_SPI=m +CONFIG_AD7766=m +CONFIG_AD7768_1=m +CONFIG_AD7780=m +CONFIG_AD7791=m +CONFIG_AD7793=m +CONFIG_AD7887=m +CONFIG_AD7923=m +CONFIG_AD7949=m +CONFIG_AD799X=m +CONFIG_AD9467=m +CONFIG_ADI_AXI_ADC=m +CONFIG_AXP20X_ADC=m +CONFIG_AXP288_ADC=m +CONFIG_CC10001_ADC=m +CONFIG_CPCAP_ADC=m +CONFIG_DA9150_GPADC=m +CONFIG_DLN2_ADC=m +CONFIG_ENVELOPE_DETECTOR=m +CONFIG_HI8435=m +CONFIG_HX711=m +CONFIG_INA2XX_ADC=m +CONFIG_LP8788_ADC=m +CONFIG_LTC2471=m +CONFIG_LTC2485=m +CONFIG_LTC2496=m +CONFIG_LTC2497=m +CONFIG_MAX1027=m +CONFIG_MAX11100=m +CONFIG_MAX1118=m +CONFIG_MAX1241=m +CONFIG_MAX1363=m +CONFIG_MAX9611=m +CONFIG_MCP320X=m +CONFIG_MCP3422=m +CONFIG_MCP3911=m +CONFIG_MEDIATEK_MT6360_ADC=m +CONFIG_MEN_Z188_ADC=m +CONFIG_MP2629_ADC=m +CONFIG_NAU7802=m +CONFIG_PALMAS_GPADC=m +CONFIG_QCOM_SPMI_IADC=m +CONFIG_QCOM_SPMI_VADC=m +CONFIG_QCOM_SPMI_ADC5=m +CONFIG_RN5T618_ADC=m +CONFIG_SD_ADC_MODULATOR=m +CONFIG_STMPE_ADC=m +CONFIG_TI_ADC081C=m +CONFIG_TI_ADC0832=m +CONFIG_TI_ADC084S021=m +CONFIG_TI_ADC12138=m +CONFIG_TI_ADC108S102=m +CONFIG_TI_ADC128S052=m +CONFIG_TI_ADC161S626=m +CONFIG_TI_ADS1015=m +CONFIG_TI_ADS7950=m +CONFIG_TI_ADS8344=m +CONFIG_TI_ADS8688=m +CONFIG_TI_ADS124S08=m +CONFIG_TI_ADS131E08=m +CONFIG_TI_AM335X_ADC=m +CONFIG_TI_TLC4541=m +CONFIG_TI_TSC2046=m +CONFIG_TWL4030_MADC=m +CONFIG_TWL6030_GPADC=m +CONFIG_VF610_ADC=m +CONFIG_VIPERBOARD_ADC=m +CONFIG_XILINX_XADC=m +CONFIG_AD74413R=m +CONFIG_IIO_RESCALE=m +CONFIG_AD8366=m +CONFIG_ADA4250=m +CONFIG_HMC425=m +CONFIG_AD7150=m +CONFIG_AD7746=m +CONFIG_ATLAS_PH_SENSOR=m +CONFIG_ATLAS_EZO_SENSOR=m +CONFIG_BME680=m +CONFIG_CCS811=m +CONFIG_IAQCORE=m +CONFIG_PMS7003=m +CONFIG_SCD30_CORE=m +CONFIG_SCD30_I2C=m +CONFIG_SCD30_SERIAL=m +CONFIG_SCD4X=m +CONFIG_SENSIRION_SGP30=m +CONFIG_SENSIRION_SGP40=m +CONFIG_SPS30_I2C=m +CONFIG_SPS30_SERIAL=m +CONFIG_SENSEAIR_SUNRISE_CO2=m +CONFIG_VZ89X=m +CONFIG_IIO_SSP_SENSORS_COMMONS=m +CONFIG_IIO_SSP_SENSORHUB=m +CONFIG_AD3552R=m +CONFIG_AD5064=m +CONFIG_AD5360=m +CONFIG_AD5380=m +CONFIG_AD5421=m +CONFIG_AD5446=m +CONFIG_AD5449=m +CONFIG_AD5592R=m +CONFIG_AD5593R=m +CONFIG_AD5504=m +CONFIG_AD5624R_SPI=m +CONFIG_LTC2688=m +CONFIG_AD5686_SPI=m +CONFIG_AD5696_I2C=m +CONFIG_AD5755=m +CONFIG_AD5758=m +CONFIG_AD5761=m +CONFIG_AD5764=m +CONFIG_AD5766=m +CONFIG_AD5770R=m +CONFIG_AD5791=m +CONFIG_AD7293=m +CONFIG_AD7303=m +CONFIG_AD8801=m +CONFIG_DPOT_DAC=m +CONFIG_DS4424=m +CONFIG_LTC1660=m +CONFIG_LTC2632=m +CONFIG_M62332=m +CONFIG_MAX517=m +CONFIG_MAX5821=m +CONFIG_MCP4725=m +CONFIG_MCP4922=m +CONFIG_TI_DAC082S085=m +CONFIG_TI_DAC5571=m +CONFIG_TI_DAC7311=m +CONFIG_TI_DAC7612=m +CONFIG_VF610_DAC=m +CONFIG_IIO_SIMPLE_DUMMY=m +CONFIG_ADMV8818=m +CONFIG_AD9523=m +CONFIG_ADF4350=m +CONFIG_ADF4371=m +CONFIG_ADMV1013=m +CONFIG_ADMV1014=m +CONFIG_ADMV4420=m +CONFIG_ADRF6780=m +CONFIG_ADIS16080=m +CONFIG_ADIS16130=m +CONFIG_ADIS16136=m +CONFIG_ADIS16260=m +CONFIG_ADXRS290=m +CONFIG_ADXRS450=m +CONFIG_BMG160=m +CONFIG_FXAS21002C=m +CONFIG_HID_SENSOR_GYRO_3D=m +CONFIG_MPU3050_I2C=m +CONFIG_IIO_ST_GYRO_3AXIS=m +CONFIG_ITG3200=m +CONFIG_AFE4403=m +CONFIG_AFE4404=m +CONFIG_MAX30100=m +CONFIG_MAX30102=m +CONFIG_AM2315=m +CONFIG_DHT11=m +CONFIG_HDC100X=m +CONFIG_HDC2010=m +CONFIG_HID_SENSOR_HUMIDITY=m +CONFIG_HTS221=m +CONFIG_HTU21=m +CONFIG_SI7005=m +CONFIG_SI7020=m +CONFIG_ADIS16400=m +CONFIG_ADIS16460=m +CONFIG_ADIS16475=m +CONFIG_ADIS16480=m +CONFIG_BMI160_I2C=m +CONFIG_BMI160_SPI=m +CONFIG_FXOS8700_I2C=m +CONFIG_FXOS8700_SPI=m +CONFIG_KMX61=m +CONFIG_INV_ICM42600_I2C=m +CONFIG_INV_ICM42600_SPI=m +CONFIG_INV_MPU6050_I2C=m +CONFIG_INV_MPU6050_SPI=m +CONFIG_IIO_ST_LSM6DSX=m +CONFIG_IIO_ST_LSM9DS0=m +CONFIG_ADJD_S311=m +CONFIG_ADUX1020=m +CONFIG_AL3010=m +CONFIG_AL3320A=m +CONFIG_APDS9300=m +CONFIG_APDS9960=m +CONFIG_AS73211=m +CONFIG_BH1750=m +CONFIG_BH1780=m +CONFIG_CM32181=m +CONFIG_CM3232=m +CONFIG_CM3323=m +CONFIG_CM3605=m +CONFIG_CM36651=m +CONFIG_GP2AP002=m +CONFIG_GP2AP020A00F=m +CONFIG_IQS621_ALS=m +CONFIG_SENSORS_ISL29018=m +CONFIG_SENSORS_ISL29028=m +CONFIG_ISL29125=m +CONFIG_HID_SENSOR_ALS=m +CONFIG_HID_SENSOR_PROX=m +CONFIG_JSA1212=m +CONFIG_RPR0521=m +CONFIG_SENSORS_LM3533=m +CONFIG_LTR501=m +CONFIG_LV0104CS=m +CONFIG_MAX44000=m +CONFIG_MAX44009=m +CONFIG_NOA1305=m +CONFIG_OPT3001=m +CONFIG_PA12203001=m +CONFIG_SI1133=m +CONFIG_SI1145=m +CONFIG_STK3310=m +CONFIG_ST_UVIS25=m +CONFIG_TCS3414=m +CONFIG_TCS3472=m +CONFIG_SENSORS_TSL2563=m +CONFIG_TSL2583=m +CONFIG_TSL2591=m +CONFIG_TSL2772=m +CONFIG_TSL4531=m +CONFIG_US5182D=m +CONFIG_VCNL4000=m +CONFIG_VCNL4035=m +CONFIG_VEML6030=m +CONFIG_VEML6070=m +CONFIG_VL6180=m +CONFIG_ZOPT2201=m +CONFIG_AK8974=m +CONFIG_AK09911=m +CONFIG_BMC150_MAGN_I2C=m +CONFIG_BMC150_MAGN_SPI=m +CONFIG_MAG3110=m +CONFIG_HID_SENSOR_MAGNETOMETER_3D=m +CONFIG_MMC35240=m +CONFIG_SENSORS_HMC5843_I2C=m +CONFIG_SENSORS_HMC5843_SPI=m +CONFIG_SENSORS_RM3100_I2C=m +CONFIG_SENSORS_RM3100_SPI=m +CONFIG_YAMAHA_YAS530=m +CONFIG_IIO_MUX=m +CONFIG_HID_SENSOR_INCLINOMETER_3D=m +CONFIG_HID_SENSOR_DEVICE_ROTATION=m +CONFIG_IIO_HRTIMER_TRIGGER=m +CONFIG_IIO_INTERRUPT_TRIGGER=m +CONFIG_IIO_TIGHTLOOP_TRIGGER=m +CONFIG_IIO_SYSFS_TRIGGER=m +CONFIG_IQS624_POS=m +CONFIG_HID_SENSOR_CUSTOM_INTEL_HINGE=m +CONFIG_AD5110=m +CONFIG_AD5272=m +CONFIG_DS1803=m +CONFIG_MAX5432=m +CONFIG_MAX5481=m +CONFIG_MAX5487=m +CONFIG_MCP4018=m +CONFIG_MCP4131=m +CONFIG_MCP4531=m +CONFIG_MCP41010=m +CONFIG_TPL0102=m +CONFIG_LMP91000=m +CONFIG_ABP060MG=m +CONFIG_BMP280=m +CONFIG_DLHL60D=m +CONFIG_DPS310=m +CONFIG_HID_SENSOR_PRESS=m +CONFIG_HP03=m +CONFIG_ICP10100=m +CONFIG_MPL115_I2C=m +CONFIG_MPL115_SPI=m +CONFIG_MPL3115=m +CONFIG_MS5611=m +CONFIG_MS5611_I2C=m +CONFIG_MS5611_SPI=m +CONFIG_MS5637=m +CONFIG_IIO_ST_PRESS=m +CONFIG_T5403=m +CONFIG_HP206C=m +CONFIG_ZPA2326=m +CONFIG_AS3935=m +CONFIG_ISL29501=m +CONFIG_LIDAR_LITE_V2=m +CONFIG_MB1232=m +CONFIG_PING=m +CONFIG_RFD77402=m +CONFIG_SRF04=m +CONFIG_SX9310=m +CONFIG_SX9324=m +CONFIG_SX9360=m +CONFIG_SX9500=m +CONFIG_SRF08=m +CONFIG_VCNL3020=m +CONFIG_VL53L0X_I2C=m +CONFIG_AD2S90=m +CONFIG_AD2S1200=m +CONFIG_IQS620AT_TEMP=m +CONFIG_LTC2983=m +CONFIG_MAXIM_THERMOCOUPLE=m +CONFIG_HID_SENSOR_TEMP=m +CONFIG_MLX90614=m +CONFIG_MLX90632=m +CONFIG_TMP006=m +CONFIG_TMP007=m +CONFIG_TMP117=m +CONFIG_TSYS01=m +CONFIG_TSYS02D=m +CONFIG_MAX31856=m +CONFIG_MAX31865=m +CONFIG_NTB=m +CONFIG_NTB_MSI=y +CONFIG_NTB_IDT=m +CONFIG_NTB_EPF=m +CONFIG_NTB_SWITCHTEC=m +CONFIG_NTB_PINGPONG=m +CONFIG_NTB_TOOL=m +CONFIG_NTB_PERF=m +CONFIG_NTB_TRANSPORT=m +CONFIG_PWM=y +CONFIG_PWM_ATMEL_HLCDC_PWM=m +CONFIG_PWM_ATMEL_TCB=m +CONFIG_PWM_DWC=m +CONFIG_PWM_FSL_FTM=m +CONFIG_PWM_IQS620A=m +CONFIG_PWM_LP3943=m +CONFIG_PWM_NTXEC=m +CONFIG_PWM_PCA9685=m +CONFIG_PWM_SIFIVE=m +CONFIG_PWM_STMPE=y +CONFIG_PWM_TWL=m +CONFIG_PWM_TWL_LED=m +CONFIG_PWM_XILINX=m +CONFIG_AL_FIC=y +CONFIG_XILINX_INTC=y +CONFIG_IPACK_BUS=m +CONFIG_BOARD_TPCI200=m +CONFIG_SERIAL_IPOCTAL=m +CONFIG_RESET_TI_SYSCON=m +CONFIG_PHY_CAN_TRANSCEIVER=m +CONFIG_BCM_KONA_USB2_PHY=m +CONFIG_PHY_CADENCE_TORRENT=m +CONFIG_PHY_CADENCE_DPHY=m +CONFIG_PHY_CADENCE_DPHY_RX=m +CONFIG_PHY_CADENCE_SIERRA=m +CONFIG_PHY_CADENCE_SALVO=m +CONFIG_PHY_PXA_28NM_HSIC=m +CONFIG_PHY_PXA_28NM_USB2=m +CONFIG_PHY_LAN966X_SERDES=m +CONFIG_PHY_CPCAP_USB=m +CONFIG_PHY_MAPPHONE_MDM6600=m +CONFIG_PHY_OCELOT_SERDES=m +CONFIG_PHY_QCOM_USB_HS=m +CONFIG_PHY_QCOM_USB_HSIC=m +CONFIG_PHY_SAMSUNG_USB2=m +CONFIG_PHY_TUSB1210=m +CONFIG_POWERCAP=y +CONFIG_IDLE_INJECT=y +CONFIG_DTPM=y +CONFIG_MCB=m +CONFIG_MCB_PCI=m +CONFIG_MCB_LPC=m +CONFIG_USB4=m +CONFIG_LIBNVDIMM=y +CONFIG_BLK_DEV_PMEM=m +CONFIG_OF_PMEM=m +CONFIG_DAX=y +CONFIG_DEV_DAX=m +CONFIG_NVMEM_RMEM=m +CONFIG_NVMEM_SPMI_SDAM=m +CONFIG_STM=m +CONFIG_STM_PROTO_BASIC=m +CONFIG_STM_PROTO_SYS_T=m +CONFIG_STM_DUMMY=m +CONFIG_STM_SOURCE_CONSOLE=m +CONFIG_STM_SOURCE_HEARTBEAT=m +CONFIG_STM_SOURCE_FTRACE=m +CONFIG_INTEL_TH=m +CONFIG_INTEL_TH_PCI=m +CONFIG_INTEL_TH_GTH=m +CONFIG_INTEL_TH_STH=m +CONFIG_INTEL_TH_MSU=m +CONFIG_INTEL_TH_PTI=m +CONFIG_FPGA=m +CONFIG_ALTERA_PR_IP_CORE=m +CONFIG_ALTERA_PR_IP_CORE_PLAT=m +CONFIG_FPGA_MGR_ALTERA_PS_SPI=m +CONFIG_FPGA_MGR_ALTERA_CVP=m +CONFIG_FPGA_MGR_XILINX_SPI=m +CONFIG_FPGA_MGR_ICE40_SPI=m +CONFIG_FPGA_MGR_MACHXO2_SPI=m +CONFIG_ALTERA_FREEZE_BRIDGE=m +CONFIG_XILINX_PR_DECOUPLER=m +CONFIG_OF_FPGA_REGION=m +CONFIG_FPGA_DFL=m +CONFIG_FPGA_DFL_FME=m +CONFIG_FPGA_DFL_FME_MGR=m +CONFIG_FPGA_DFL_FME_BRIDGE=m +CONFIG_FPGA_DFL_FME_REGION=m +CONFIG_FPGA_DFL_AFU=m +CONFIG_FPGA_DFL_NIOS_INTEL_PAC_N3000=m +CONFIG_FPGA_DFL_PCI=m +CONFIG_FSI=m +CONFIG_FSI_MASTER_GPIO=m +CONFIG_FSI_MASTER_HUB=m +CONFIG_FSI_MASTER_ASPEED=m +CONFIG_FSI_SCOM=m +CONFIG_FSI_SBEFIFO=m +CONFIG_FSI_OCC=m +CONFIG_MUX_ADG792A=m +CONFIG_MUX_ADGS1408=m +CONFIG_MUX_GPIO=m +CONFIG_MUX_MMIO=m +CONFIG_SIOX=m +CONFIG_SIOX_BUS_GPIO=m +CONFIG_SLIM_QCOM_CTRL=m +CONFIG_INTERCONNECT=y +CONFIG_MOST=m +CONFIG_MOST_USB_HDM=m +CONFIG_MOST_CDEV=m +CONFIG_MOST_SND=m +CONFIG_PECI=m +CONFIG_VALIDATE_FS_PARSER=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_REISERFS_FS=m +CONFIG_REISERFS_FS_XATTR=y +CONFIG_REISERFS_FS_POSIX_ACL=y +CONFIG_REISERFS_FS_SECURITY=y +CONFIG_JFS_FS=m +CONFIG_JFS_POSIX_ACL=y +CONFIG_JFS_SECURITY=y +CONFIG_JFS_STATISTICS=y +CONFIG_XFS_FS=y +CONFIG_XFS_QUOTA=y +CONFIG_XFS_POSIX_ACL=y +CONFIG_XFS_RT=y +CONFIG_GFS2_FS=m +CONFIG_GFS2_FS_LOCKING_DLM=y +CONFIG_OCFS2_FS=m +CONFIG_BTRFS_FS=m +CONFIG_BTRFS_FS_POSIX_ACL=y +CONFIG_NILFS2_FS=m +CONFIG_F2FS_FS=y +CONFIG_F2FS_FS_SECURITY=y +CONFIG_F2FS_FS_COMPRESSION=y +# CONFIG_F2FS_IOSTAT is not set +CONFIG_F2FS_UNFAIR_RWSEM=y +CONFIG_ZONEFS_FS=m +CONFIG_FS_ENCRYPTION=y +CONFIG_FS_ENCRYPTION_INLINE_CRYPT=y +CONFIG_FS_VERITY=y +CONFIG_FS_VERITY_BUILTIN_SIGNATURES=y +CONFIG_FANOTIFY=y +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +# CONFIG_PRINT_QUOTA_WARNING is not set +CONFIG_QFMT_V1=m +CONFIG_QFMT_V2=y +CONFIG_AUTOFS4_FS=m +CONFIG_FUSE_FS=y +CONFIG_CUSE=m +CONFIG_VIRTIO_FS=m +CONFIG_OVERLAY_FS=m +CONFIG_OVERLAY_FS_XINO_AUTO=y +CONFIG_FSCACHE=m +CONFIG_FSCACHE_STATS=y +CONFIG_CACHEFILES=m +CONFIG_CACHEFILES_ERROR_INJECTION=y +CONFIG_ISO9660_FS=m +CONFIG_JOLIET=y +CONFIG_ZISOFS=y +CONFIG_UDF_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=y +CONFIG_EXFAT_FS=m +CONFIG_NTFS_FS=m +CONFIG_NTFS3_FS=m +CONFIG_NTFS3_LZX_XPRESS=y +CONFIG_NTFS3_FS_POSIX_ACL=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_VMCORE_DEVICE_DUMP=y +CONFIG_TMPFS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_INODE64=y +CONFIG_HUGETLBFS=y +CONFIG_EFIVAR_FS=y +CONFIG_ORANGEFS_FS=m +CONFIG_ADFS_FS=m +CONFIG_AFFS_FS=m +CONFIG_ECRYPT_FS=y +CONFIG_ECRYPT_FS_MESSAGING=y +CONFIG_HFS_FS=m +CONFIG_HFSPLUS_FS=m +CONFIG_BEFS_FS=m +CONFIG_BFS_FS=m +CONFIG_EFS_FS=m +CONFIG_JFFS2_FS=m +CONFIG_JFFS2_FS_XATTR=y +CONFIG_JFFS2_COMPRESSION_OPTIONS=y +CONFIG_JFFS2_LZO=y +CONFIG_JFFS2_CMODE_FAVOURLZO=y +CONFIG_UBIFS_FS=m +CONFIG_UBIFS_FS_AUTHENTICATION=y +CONFIG_CRAMFS=m +CONFIG_CRAMFS_MTD=y +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_FILE_DIRECT=y +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_LZ4=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y +CONFIG_SQUASHFS_ZSTD=y +CONFIG_VXFS_FS=m +CONFIG_MINIX_FS=m +CONFIG_OMFS_FS=m +CONFIG_HPFS_FS=m +CONFIG_QNX4FS_FS=m +CONFIG_QNX6FS_FS=m +CONFIG_ROMFS_FS=m +CONFIG_PSTORE=y +CONFIG_PSTORE_RAM=m +CONFIG_PSTORE_BLK=m +CONFIG_SYSV_FS=m +CONFIG_UFS_FS=m +CONFIG_EROFS_FS=m +CONFIG_NFS_FS=m +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=m +CONFIG_NFS_SWAP=y +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_NFS_V4_1_MIGRATION=y +CONFIG_NFS_FSCACHE=y +CONFIG_NFSD=m +CONFIG_NFSD_V3_ACL=y +CONFIG_NFSD_V4=y +CONFIG_NFSD_BLOCKLAYOUT=y +CONFIG_NFSD_SCSILAYOUT=y +CONFIG_NFSD_FLEXFILELAYOUT=y +CONFIG_NFSD_V4_2_INTER_SSC=y +CONFIG_NFSD_V4_SECURITY_LABEL=y +CONFIG_SUNRPC_DEBUG=y +CONFIG_CEPH_FS=m +CONFIG_CEPH_FSCACHE=y +CONFIG_CEPH_FS_POSIX_ACL=y +CONFIG_CEPH_FS_SECURITY_LABEL=y +CONFIG_CIFS=m +# CONFIG_CIFS_STATS2 is not set +CONFIG_CIFS_UPCALL=y +CONFIG_CIFS_XATTR=y +CONFIG_CIFS_POSIX=y +CONFIG_CIFS_DFS_UPCALL=y +CONFIG_CIFS_SWN_UPCALL=y +CONFIG_CIFS_FSCACHE=y +CONFIG_SMB_SERVER=m +CONFIG_SMB_SERVER_SMBDIRECT=y +CONFIG_SMB_SERVER_KERBEROS5=y +CONFIG_CODA_FS=m +CONFIG_AFS_FS=m +CONFIG_AFS_FSCACHE=y +CONFIG_9P_FS=y +CONFIG_9P_FSCACHE=y +CONFIG_9P_FS_POSIX_ACL=y +CONFIG_9P_FS_SECURITY=y +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_CODEPAGE_737=m +CONFIG_NLS_CODEPAGE_775=m +CONFIG_NLS_CODEPAGE_850=m +CONFIG_NLS_CODEPAGE_852=m +CONFIG_NLS_CODEPAGE_855=m +CONFIG_NLS_CODEPAGE_857=m +CONFIG_NLS_CODEPAGE_860=m +CONFIG_NLS_CODEPAGE_861=m +CONFIG_NLS_CODEPAGE_862=m +CONFIG_NLS_CODEPAGE_863=m +CONFIG_NLS_CODEPAGE_864=m +CONFIG_NLS_CODEPAGE_865=m +CONFIG_NLS_CODEPAGE_866=m +CONFIG_NLS_CODEPAGE_869=m +CONFIG_NLS_CODEPAGE_936=m +CONFIG_NLS_CODEPAGE_950=m +CONFIG_NLS_CODEPAGE_932=m +CONFIG_NLS_CODEPAGE_949=m +CONFIG_NLS_CODEPAGE_874=m +CONFIG_NLS_ISO8859_8=m +CONFIG_NLS_CODEPAGE_1250=m +CONFIG_NLS_CODEPAGE_1251=m +CONFIG_NLS_ASCII=m +CONFIG_NLS_ISO8859_1=m +CONFIG_NLS_ISO8859_2=m +CONFIG_NLS_ISO8859_3=m +CONFIG_NLS_ISO8859_4=m +CONFIG_NLS_ISO8859_5=m +CONFIG_NLS_ISO8859_6=m +CONFIG_NLS_ISO8859_7=m +CONFIG_NLS_ISO8859_9=m +CONFIG_NLS_ISO8859_13=m +CONFIG_NLS_ISO8859_14=m +CONFIG_NLS_ISO8859_15=m +CONFIG_NLS_KOI8_R=m +CONFIG_NLS_KOI8_U=m +CONFIG_NLS_MAC_ROMAN=m +CONFIG_NLS_MAC_CELTIC=m +CONFIG_NLS_MAC_CENTEURO=m +CONFIG_NLS_MAC_CROATIAN=m +CONFIG_NLS_MAC_CYRILLIC=m +CONFIG_NLS_MAC_GAELIC=m +CONFIG_NLS_MAC_GREEK=m +CONFIG_NLS_MAC_ICELAND=m +CONFIG_NLS_MAC_INUIT=m +CONFIG_NLS_MAC_ROMANIAN=m +CONFIG_NLS_MAC_TURKISH=m +CONFIG_DLM=m +CONFIG_UNICODE=y +CONFIG_KEYS_REQUEST_CACHE=y +CONFIG_PERSISTENT_KEYRINGS=y +CONFIG_TRUSTED_KEYS=y +CONFIG_USER_DECRYPTED_DATA=y +CONFIG_KEY_DH_OPERATIONS=y +CONFIG_KEY_NOTIFICATIONS=y +CONFIG_SECURITY_DMESG_RESTRICT=y +CONFIG_SECURITY=y +CONFIG_SECURITY_INFINIBAND=y +CONFIG_SECURITY_NETWORK_XFRM=y +CONFIG_LSM_MMAP_MIN_ADDR=0 +CONFIG_HARDENED_USERCOPY=y +CONFIG_SECURITY_SELINUX=y +CONFIG_SECURITY_SELINUX_BOOTPARAM=y +CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 +CONFIG_SECURITY_SMACK=y +CONFIG_SECURITY_SMACK_NETFILTER=y +CONFIG_SECURITY_SMACK_APPEND_SIGNALS=y +CONFIG_SECURITY_TOMOYO=y +CONFIG_SECURITY_APPARMOR=y +CONFIG_SECURITY_YAMA=y +CONFIG_SECURITY_SAFESETID=y +CONFIG_SECURITY_LOCKDOWN_LSM=y +CONFIG_SECURITY_LOCKDOWN_LSM_EARLY=y +CONFIG_SECURITY_LANDLOCK=y +CONFIG_INTEGRITY_SIGNATURE=y +CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y +CONFIG_INTEGRITY_PLATFORM_KEYRING=y +CONFIG_INTEGRITY_MACHINE_KEYRING=y +CONFIG_IMA=y +CONFIG_IMA_KEXEC=y +CONFIG_IMA_APPRAISE=y +CONFIG_IMA_ARCH_POLICY=y +CONFIG_IMA_APPRAISE_MODSIG=y +CONFIG_EVM=y +CONFIG_EVM_EXTRA_SMACK_XATTRS=y +CONFIG_EVM_ADD_XATTRS=y +CONFIG_DEFAULT_SECURITY_APPARMOR=y +CONFIG_LSM="landlock,lockdown,yama,integrity,apparmor" +CONFIG_INIT_ON_ALLOC_DEFAULT_ON=y +CONFIG_CRYPTO_USER=m +CONFIG_CRYPTO_PCRYPT=m +CONFIG_CRYPTO_CRYPTD=m +CONFIG_CRYPTO_TEST=m +CONFIG_CRYPTO_DH_RFC7919_GROUPS=y +CONFIG_CRYPTO_ECDSA=m +CONFIG_CRYPTO_ECRDSA=m +CONFIG_CRYPTO_SM2=m +CONFIG_CRYPTO_CURVE25519=m +CONFIG_CRYPTO_AES_TI=m +CONFIG_CRYPTO_BLOWFISH=m +CONFIG_CRYPTO_CAMELLIA=m +CONFIG_CRYPTO_CAST5=m +CONFIG_CRYPTO_CAST6=m +CONFIG_CRYPTO_DES=m +CONFIG_CRYPTO_SERPENT=m +CONFIG_CRYPTO_TWOFISH=m +CONFIG_CRYPTO_ADIANTUM=m +CONFIG_CRYPTO_CFB=m +CONFIG_CRYPTO_KEYWRAP=m +CONFIG_CRYPTO_LRW=m +CONFIG_CRYPTO_OFB=m +CONFIG_CRYPTO_AEGIS128=m +CONFIG_CRYPTO_CHACHA20POLY1305=m +CONFIG_CRYPTO_GCM=y +CONFIG_CRYPTO_SEQIV=y +CONFIG_CRYPTO_MD4=m +CONFIG_CRYPTO_RMD160=m +CONFIG_CRYPTO_SHA3=m +CONFIG_CRYPTO_VMAC=m +CONFIG_CRYPTO_WP512=m +CONFIG_CRYPTO_XCBC=m +CONFIG_CRYPTO_842=m +CONFIG_CRYPTO_LZ4=m +CONFIG_CRYPTO_LZ4HC=m +CONFIG_CRYPTO_ANSI_CPRNG=m +CONFIG_CRYPTO_DRBG_HASH=y +CONFIG_CRYPTO_DRBG_CTR=y +CONFIG_CRYPTO_USER_API_HASH=m +CONFIG_CRYPTO_USER_API_SKCIPHER=m +CONFIG_CRYPTO_USER_API_RNG=m +CONFIG_CRYPTO_USER_API_AEAD=m +# CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE is not set +CONFIG_CRYPTO_STATS=y +CONFIG_CRYPTO_DEV_NITROX_CNN55XX=m +CONFIG_CRYPTO_DEV_CHELSIO=m +CONFIG_CRYPTO_DEV_VIRTIO=m +CONFIG_CRYPTO_DEV_CCREE=m +CONFIG_CRYPTO_DEV_AMLOGIC_GXL=m +CONFIG_PKCS8_PRIVATE_KEY_PARSER=m +CONFIG_PKCS7_TEST_KEY=m +CONFIG_SIGNED_PE_FILE_VERIFICATION=y +CONFIG_SYSTEM_EXTRA_CERTIFICATE=y +CONFIG_SECONDARY_TRUSTED_KEYRING=y +CONFIG_SYSTEM_BLACKLIST_KEYRING=y +CONFIG_SYSTEM_REVOCATION_LIST=y +CONFIG_XZ_DEC_MICROLZMA=y +CONFIG_XZ_DEC_TEST=m +CONFIG_DMA_RESTRICTED_POOL=y +CONFIG_DMA_CMA=y +CONFIG_DMA_PERNUMA_CMA=y +CONFIG_CMA_SIZE_MBYTES=32 +CONFIG_FONTS=y +CONFIG_FONT_8x8=y +CONFIG_FONT_ACORN_8x8=y +CONFIG_FONT_6x10=y +CONFIG_FONT_TER16x32=y +CONFIG_PRINTK_TIME=y +CONFIG_BOOT_PRINTK_DELAY=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y +CONFIG_GDB_SCRIPTS=y +CONFIG_FRAME_WARN=1024 +CONFIG_VMLINUX_MAP=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0x01b6 +CONFIG_KGDB=y +CONFIG_KGDB_KDB=y +CONFIG_KDB_KEYBOARD=y +CONFIG_PAGE_POISONING=y +CONFIG_DEBUG_WX=y +CONFIG_SCHED_STACK_END_CHECK=y +CONFIG_KFENCE=y +CONFIG_KFENCE_SAMPLE_INTERVAL=0 +CONFIG_SOFTLOCKUP_DETECTOR=y +CONFIG_SCHEDSTATS=y +CONFIG_RCU_CPU_STALL_TIMEOUT=60 +# CONFIG_RCU_TRACE is not set +CONFIG_BOOTTIME_TRACING=y +CONFIG_FUNCTION_PROFILER=y +CONFIG_STACK_TRACER=y +CONFIG_SCHED_TRACER=y +CONFIG_HWLAT_TRACER=y +CONFIG_FTRACE_SYSCALLS=y +CONFIG_BLK_DEV_IO_TRACE=y +CONFIG_BPF_KPROBE_OVERRIDE=y +CONFIG_SYNTH_EVENTS=y +CONFIG_TRACE_EVENT_INJECT=y +CONFIG_SAMPLES=y +CONFIG_SAMPLE_TRACE_PRINTK=m +CONFIG_SAMPLE_TRACE_ARRAY=m +CONFIG_NOTIFIER_ERROR_INJECTION=m +CONFIG_FUNCTION_ERROR_INJECTION=y +CONFIG_TEST_BPF=m +CONFIG_TEST_BLACKHOLE_DEV=m +CONFIG_MEMTEST=y +CONFIG_RELOCATABLE=y +CONFIG_RANDOMIZE_BASE=y +CONFIG_ERRATA_THEAD_MAE=y +CONFIG_ERRATA_THEAD=y +# DEBUG configs +CONFIG_DEBUG_ATOMIC_SLEEP=y +CONFIG_DEBUG_SPINLOCK=y +CONFIG_DEBUG_MUTEXES=y +CONFIG_DEBUG_LOCK_ALLOC=y +CONFIG_DEBUG_RWSEMS=y +CONFIG_DEBUG_LOCKDEP=y +CONFIG_DEBUG_IRQFLAGS=y +CONFIG_DEBUG_VM=y +CONFIG_PROVE_LOCKING=y +CONFIG_SLUB_DEBUG=y +CONFIG_SLUB_DEBUG_ON=y +CONFIG_DEBUG_LIST=y +CONFIG_DEBUG_PAGEALLOC=y +CONFIG_DEBUG_PAGEALLOC_DEFAULT=y +CONFIG_DEBUG_STACK_USAGE=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y diff --git a/.github/scripts/series/kernel_builder.sh b/.github/scripts/series/kernel_builder.sh new file mode 100755 index 00000000000000..98837bf7d76e03 --- /dev/null +++ b/.github/scripts/series/kernel_builder.sh @@ -0,0 +1,35 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2023 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -euo pipefail + +d=$(dirname "${BASH_SOURCE[0]}") +. $d/utils.sh + +xlen=$1 +config=$2 +fragment=$3 +toolchain=$4 + +tm=$(mktemp -p ${ci_root}) +n=$(gen_kernel_name $xlen $config $fragment $toolchain) +logs=$(get_logs_dir) +rc=0 +log="build_kernel___${n}.log" +\time --quiet -o $tm -f "took %es" \ + $d/build_kernel.sh "${xlen}" "${config}" "${fragment}" "${toolchain}" &> "${logs}/${log}" || rc=$? + +if grep -a ": warning:" "${logs}/${log}" | grep -qv "frame size"; then + # TODO Can't get rid of LLVM "warning: performing pointer arithmetic on a null pointer has undefined behavior [-Wnull-pointer-arithmetic]" + if [[ ! "${log}" =~ "nommu" ]]; then + echo "::error::FAIL WARNINGS kernel ${n} \"${log}\" $(cat $tm)" + fi +elif (( $rc )); then + echo "::error::FAIL Build kernel ${n} \"${log}\" $(cat $tm)" +else + echo "::notice::OK Build kernel ${n} $(cat $tm)" +fi +rm $tm +exit $rc diff --git a/.github/scripts/series/kernel_tester.sh b/.github/scripts/series/kernel_tester.sh new file mode 100755 index 00000000000000..d3e5bd99e9a9d7 --- /dev/null +++ b/.github/scripts/series/kernel_tester.sh @@ -0,0 +1,43 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2023 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -euo pipefail + +d=$(dirname "${BASH_SOURCE[0]}") +. $d/utils.sh +. $d/qemu_test_utils.sh + +xlen=$1 +config=$2 +fragment=$3 +toolchain=$4 +rootfs=$5 + +generate_qemu_subtests $xlen $config $fragment $toolchain $rootfs + +tm=$(mktemp -p ${ci_root}) +n=$(gen_kernel_name $xlen $config $fragment $toolchain) +logs=$(get_logs_dir) +tot=${#qemu_subtests[@]} +allrc=0 +for i in $(seq $tot); do + rc=0 + tstn=$(get_qemu_test_name ${qemu_subtests[$(($i - 1))]}) + tst=${qemu_subtests[$(($i - 1))]} + + log="test_kernel___${n}___${rootfs}___${tstn}.log" + log=${log//\//-} + \time --quiet -o $tm -f "took %es" \ + $d/test_kernel.sh "${xlen}" "${config}" "${fragment}" "${toolchain}" "${rootfs}" \ + $tst &> "${logs}/${log}" || rc=$? + if (( $rc )); then + allrc=1 + echo "::error::FAIL Test kernel ${n} ${rootfs} ${tst} $i/$tot \"${log}\" $(cat $tm)" + else + echo "::notice::OK Test kernel ${n} ${rootfs} ${tst} $i/$tot $(cat $tm)" + fi +done +rm $tm +exit $allrc diff --git a/.github/scripts/series/kselftest_prep.sh b/.github/scripts/series/kselftest_prep.sh new file mode 100644 index 00000000000000..5f6a5adf1a68ca --- /dev/null +++ b/.github/scripts/series/kselftest_prep.sh @@ -0,0 +1,10 @@ +#!/bin/bash + +# Please source me! + +git config --global user.email "you@example.com" +git config --global user.name "Your Name" + +export PATH=$(echo $PATH | tr : "\n"| grep -v ^/opt | tr "\n" :) + +export CI_TRIPLE=riscv64-linux-gnu diff --git a/.github/scripts/series/patches/0001-selftests-bpf-Add-RISC-V-specific-config.patch b/.github/scripts/series/patches/0001-selftests-bpf-Add-RISC-V-specific-config.patch new file mode 100644 index 00000000000000..a4aec87eb24532 --- /dev/null +++ b/.github/scripts/series/patches/0001-selftests-bpf-Add-RISC-V-specific-config.patch @@ -0,0 +1,47 @@ +From 611f4103494e5847190d8d8b22c15a496441c075 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= +Date: Tue, 27 Aug 2024 17:21:12 +0000 +Subject: [PATCH 1/6] selftests: bpf: Add RISC-V specific config +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Björn Töpel +--- + tools/testing/selftests/bpf/config.riscv64 | 22 ++++++++++++++++++++++ + 1 file changed, 22 insertions(+) + create mode 100644 tools/testing/selftests/bpf/config.riscv64 + +diff --git a/tools/testing/selftests/bpf/config.riscv64 b/tools/testing/selftests/bpf/config.riscv64 +new file mode 100644 +index 000000000000..9124d1549a1a +--- /dev/null ++++ b/tools/testing/selftests/bpf/config.riscv64 +@@ -0,0 +1,22 @@ ++CONFIG_DEBUG_CREDENTIALS=y ++CONFIG_DEBUG_INFO_BTF=y ++CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y ++CONFIG_DEBUG_MEMORY_INIT=y ++CONFIG_EXPERT=y ++CONFIG_RUNTIME_TESTING_MENU=y ++CONFIG_TLS=y ++CONFIG_IP_ROUTE_MULTIPATH=y ++CONFIG_MACSEC=y ++CONFIG_CRYPTO_CHACHA20POLY1305=y ++CONFIG_CRYPTO_CHACHA20=y ++CONFIG_CRYPTO_CCM=y ++CONFIG_MACVTAP=y ++CONFIG_L2TP=y ++CONFIG_TEST_FPU=y ++CONFIG_IOMMUFD=y ++CONFIG_IPV6_SEG6_LWTUNNEL=y ++CONFIG_XFRM_SUB_POLICY=y ++CONFIG_XFRM_USER=y ++CONFIG_OPENVSWITCH=y ++CONFIG_NONPORTABLE=y ++CONFIG_RISCV_EFFICIENT_UNALIGNED_ACCESS=y + +base-commit: 8d8d276ba2fb5f9ac4984f5c10ae60858090babc +-- +2.43.0 + diff --git a/.github/scripts/series/patches/0002-selftests-bpf-Rename-fallback.patch b/.github/scripts/series/patches/0002-selftests-bpf-Rename-fallback.patch new file mode 100644 index 00000000000000..2fef6472ad3fa9 --- /dev/null +++ b/.github/scripts/series/patches/0002-selftests-bpf-Rename-fallback.patch @@ -0,0 +1,70 @@ +From af4e24f21714ca1ffdedeba5fd2e587328b35823 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= +Date: Thu, 22 Aug 2024 16:26:22 +0000 +Subject: [PATCH 2/6] selftests: bpf: Rename fallback +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +There's a clash: + +arch/riscv/lib/crc32.c +154:typedef u32 (*fallback)(u32 crc, unsigned char const *p, size_t len); + +Signed-off-by: Björn Töpel +--- + tools/testing/selftests/bpf/prog_tests/bpf_tcp_ca.c | 2 +- + tools/testing/selftests/bpf/progs/bpf_dctcp.c | 8 ++++---- + 2 files changed, 5 insertions(+), 5 deletions(-) + +diff --git a/tools/testing/selftests/bpf/prog_tests/bpf_tcp_ca.c b/tools/testing/selftests/bpf/prog_tests/bpf_tcp_ca.c +index 63422f4f3896..860df52717f0 100644 +--- a/tools/testing/selftests/bpf/prog_tests/bpf_tcp_ca.c ++++ b/tools/testing/selftests/bpf/prog_tests/bpf_tcp_ca.c +@@ -285,7 +285,7 @@ static void test_dctcp_fallback(void) + dctcp_skel = bpf_dctcp__open(); + if (!ASSERT_OK_PTR(dctcp_skel, "dctcp_skel")) + return; +- strcpy(dctcp_skel->rodata->fallback, "cubic"); ++ strcpy(dctcp_skel->rodata->fallback_s, "cubic"); + if (!ASSERT_OK(bpf_dctcp__load(dctcp_skel), "bpf_dctcp__load")) + goto done; + +diff --git a/tools/testing/selftests/bpf/progs/bpf_dctcp.c b/tools/testing/selftests/bpf/progs/bpf_dctcp.c +index 02f552e7fd4d..aaa74d5fbd86 100644 +--- a/tools/testing/selftests/bpf/progs/bpf_dctcp.c ++++ b/tools/testing/selftests/bpf/progs/bpf_dctcp.c +@@ -26,7 +26,7 @@ static bool before(__u32 seq1, __u32 seq2) + + char _license[] SEC("license") = "GPL"; + +-volatile const char fallback[TCP_CA_NAME_MAX]; ++volatile const char fallback_s[TCP_CA_NAME_MAX]; + const char bpf_dctcp[] = "bpf_dctcp"; + const char tcp_cdg[] = "cdg"; + char cc_res[TCP_CA_NAME_MAX]; +@@ -71,10 +71,10 @@ void BPF_PROG(bpf_dctcp_init, struct sock *sk) + struct bpf_dctcp *ca = inet_csk_ca(sk); + int *stg; + +- if (!(tp->ecn_flags & TCP_ECN_OK) && fallback[0]) { ++ if (!(tp->ecn_flags & TCP_ECN_OK) && fallback_s[0]) { + /* Switch to fallback */ + if (bpf_setsockopt(sk, SOL_TCP, TCP_CONGESTION, +- (void *)fallback, sizeof(fallback)) == -EBUSY) ++ (void *)fallback_s, sizeof(fallback_s)) == -EBUSY) + ebusy_cnt++; + + /* Switch back to myself and the recurred bpf_dctcp_init() +@@ -87,7 +87,7 @@ void BPF_PROG(bpf_dctcp_init, struct sock *sk) + + /* Switch back to fallback */ + if (bpf_setsockopt(sk, SOL_TCP, TCP_CONGESTION, +- (void *)fallback, sizeof(fallback)) == -EBUSY) ++ (void *)fallback_s, sizeof(fallback_s)) == -EBUSY) + ebusy_cnt++; + + /* Expecting -ENOTSUPP for tcp_cdg_res */ +-- +2.43.0 + diff --git a/.github/scripts/series/patches/0003-selftests-iommu-Add-RISC-V-specific-config.patch b/.github/scripts/series/patches/0003-selftests-iommu-Add-RISC-V-specific-config.patch new file mode 100644 index 00000000000000..f99e2824232452 --- /dev/null +++ b/.github/scripts/series/patches/0003-selftests-iommu-Add-RISC-V-specific-config.patch @@ -0,0 +1,30 @@ +From 06586b3f06e5f16504967407126684b5d78aed60 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= +Date: Tue, 27 Aug 2024 17:27:18 +0000 +Subject: [PATCH 3/6] selftests: iommu: Add RISC-V specific config +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Björn Töpel +--- + tools/testing/selftests/iommu/config.riscv64 | 7 +++++++ + 1 file changed, 7 insertions(+) + create mode 100644 tools/testing/selftests/iommu/config.riscv64 + +diff --git a/tools/testing/selftests/iommu/config.riscv64 b/tools/testing/selftests/iommu/config.riscv64 +new file mode 100644 +index 000000000000..d218811ccadf +--- /dev/null ++++ b/tools/testing/selftests/iommu/config.riscv64 +@@ -0,0 +1,7 @@ ++# IOMMUFD ++CONFIG_IOMMUFD=y ++CONFIG_VFIO=y ++CONFIG_VFIO_CONTAINER=n ++CONFIG_IOMMUFD_VFIO_CONTAINER=y ++CONFIG_FAULT_INJECTION=y ++CONFIG_IOMMUFD_TEST=y +-- +2.43.0 + diff --git a/.github/scripts/series/patches/0004-selftests-exec-Remove-static-pie.patch b/.github/scripts/series/patches/0004-selftests-exec-Remove-static-pie.patch new file mode 100644 index 00000000000000..58bfa6065b5077 --- /dev/null +++ b/.github/scripts/series/patches/0004-selftests-exec-Remove-static-pie.patch @@ -0,0 +1,40 @@ +From 0e22720f7f4c1cbed83c032ca4b8bc50d2f7aeb5 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= +Date: Thu, 22 Aug 2024 16:27:16 +0000 +Subject: [PATCH 4/6] selftests: exec: Remove static-pie +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +static-pie is broken on RV pre libc6-dev 2.40 + +WIP: Fix patch + +Signed-off-by: Björn Töpel +--- + tools/testing/selftests/exec/Makefile | 5 +---- + 1 file changed, 1 insertion(+), 4 deletions(-) + +diff --git a/tools/testing/selftests/exec/Makefile b/tools/testing/selftests/exec/Makefile +index ba012bc5aab9..fcf2db80cc40 100644 +--- a/tools/testing/selftests/exec/Makefile ++++ b/tools/testing/selftests/exec/Makefile +@@ -5,7 +5,7 @@ CFLAGS += -Wno-nonnull + ALIGNS := 0x1000 0x200000 0x1000000 + ALIGN_PIES := $(patsubst %,load_address.%,$(ALIGNS)) + ALIGN_STATIC_PIES := $(patsubst %,load_address.static.%,$(ALIGNS)) +-ALIGNMENT_TESTS := $(ALIGN_PIES) $(ALIGN_STATIC_PIES) ++ALIGNMENT_TESTS := $(ALIGN_PIES) + + TEST_PROGS := binfmt_script.py + TEST_GEN_PROGS := execveat non-regular $(ALIGNMENT_TESTS) +@@ -35,6 +35,3 @@ $(OUTPUT)/execveat.denatured: $(OUTPUT)/execveat + $(OUTPUT)/load_address.0x%: load_address.c + $(CC) $(CFLAGS) $(LDFLAGS) -Wl,-z,max-page-size=$(lastword $(subst ., ,$@)) \ + -fPIE -pie $< -o $@ +-$(OUTPUT)/load_address.static.0x%: load_address.c +- $(CC) $(CFLAGS) $(LDFLAGS) -Wl,-z,max-page-size=$(lastword $(subst ., ,$@)) \ +- -fPIE -static-pie $< -o $@ +-- +2.43.0 + diff --git a/.github/scripts/series/patches/0005-selftests-hid-Fix-broken-build.patch b/.github/scripts/series/patches/0005-selftests-hid-Fix-broken-build.patch new file mode 100644 index 00000000000000..d8c1ec966ac76b --- /dev/null +++ b/.github/scripts/series/patches/0005-selftests-hid-Fix-broken-build.patch @@ -0,0 +1,30 @@ +From 350c424f2379572fcdc9e6470a02e61e2da5441a Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= +Date: Thu, 22 Aug 2024 16:28:10 +0000 +Subject: [PATCH 5/6] selftests: hid: Fix broken build +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +kexec prototypes are messed up in vmlinux.h w/o the define + +Signed-off-by: Björn Töpel +--- + tools/testing/selftests/hid/progs/hid_bpf_helpers.h | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/tools/testing/selftests/hid/progs/hid_bpf_helpers.h b/tools/testing/selftests/hid/progs/hid_bpf_helpers.h +index e5db897586bb..76e06cab1b9d 100644 +--- a/tools/testing/selftests/hid/progs/hid_bpf_helpers.h ++++ b/tools/testing/selftests/hid/progs/hid_bpf_helpers.h +@@ -22,6 +22,7 @@ + #define HID_REQ_SET_IDLE HID_REQ_SET_IDLE___not_used + #define HID_REQ_SET_PROTOCOL HID_REQ_SET_PROTOCOL___not_used + ++#define BPF_NO_KFUNC_PROTOTYPES + #include "vmlinux.h" + + #undef hid_bpf_ctx +-- +2.43.0 + diff --git a/.github/scripts/series/patches/0006-Add-missing-net-lib-kselftest-target.patch b/.github/scripts/series/patches/0006-Add-missing-net-lib-kselftest-target.patch new file mode 100644 index 00000000000000..41011c5b9a466f --- /dev/null +++ b/.github/scripts/series/patches/0006-Add-missing-net-lib-kselftest-target.patch @@ -0,0 +1,28 @@ +From a28da2534fd8273eab88228749786ddfdd463184 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= +Date: Wed, 11 Sep 2024 09:53:21 +0200 +Subject: [PATCH 6/6] Add missing net/lib kselftest target +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Björn Töpel +--- + tools/testing/selftests/Makefile | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/tools/testing/selftests/Makefile b/tools/testing/selftests/Makefile +index bc8fe9e8f7f2..cf166c64a5d3 100644 +--- a/tools/testing/selftests/Makefile ++++ b/tools/testing/selftests/Makefile +@@ -64,6 +64,7 @@ TARGETS += net + TARGETS += net/af_unix + TARGETS += net/forwarding + TARGETS += net/hsr ++TARGETS += net/lib + TARGETS += net/mptcp + TARGETS += net/openvswitch + TARGETS += net/tcp_ao +-- +2.43.0 + diff --git a/.github/scripts/series/patches/0007-BPF-kselftest-fix.patch b/.github/scripts/series/patches/0007-BPF-kselftest-fix.patch new file mode 100644 index 00000000000000..5298f4916b916c --- /dev/null +++ b/.github/scripts/series/patches/0007-BPF-kselftest-fix.patch @@ -0,0 +1,32 @@ +From 597d0700c8c55ef6a627ff6ecbc2d3c51185d570 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= +Date: Sat, 14 Sep 2024 09:49:14 +0200 +Subject: [PATCH 1/2] BPF kselftest fix +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Remove dead script + +Signed-off-by: Björn Töpel +--- + tools/testing/selftests/bpf/Makefile | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/tools/testing/selftests/bpf/Makefile b/tools/testing/selftests/bpf/Makefile +index f04af11df8eb..df75f1beb731 100644 +--- a/tools/testing/selftests/bpf/Makefile ++++ b/tools/testing/selftests/bpf/Makefile +@@ -132,7 +132,6 @@ TEST_PROGS := test_kmod.sh \ + test_tunnel.sh \ + test_lwt_seg6local.sh \ + test_lirc_mode2.sh \ +- test_skb_cgroup_id.sh \ + test_flow_dissector.sh \ + test_xdp_vlan_mode_generic.sh \ + test_xdp_vlan_mode_native.sh \ + +base-commit: 5277d130947ba8c0d54c16eed89eb97f0b6d2e5a +-- +2.43.0 + diff --git a/.github/scripts/series/patches/0008-BPF-selftest-install.patch b/.github/scripts/series/patches/0008-BPF-selftest-install.patch new file mode 100644 index 00000000000000..c10f52e25bc8b4 --- /dev/null +++ b/.github/scripts/series/patches/0008-BPF-selftest-install.patch @@ -0,0 +1,35 @@ +From 5fd0e251ba091bddb302fd56436007dbf50f450f Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= +Date: Sun, 15 Sep 2024 16:58:21 +0200 +Subject: [PATCH 2/2] BPF selftest install +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Fix deps Makefile + +Signed-off-by: Björn Töpel +--- + tools/testing/selftests/bpf/Makefile | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/tools/testing/selftests/bpf/Makefile b/tools/testing/selftests/bpf/Makefile +index df75f1beb731..f6e38b9d07f6 100644 +--- a/tools/testing/selftests/bpf/Makefile ++++ b/tools/testing/selftests/bpf/Makefile +@@ -627,6 +627,12 @@ $(TRUNNER_BPF_SKELS_LINKED): $(TRUNNER_OUTPUT)/%: $$$$(%-deps) $(BPFTOOL) | $(TR + $(notdir %.skel.h): $(TRUNNER_OUTPUT)/%.skel.h + @true + ++$(notdir %.lskel.h): $(TRUNNER_OUTPUT)/%.lskel.h ++ @true ++ ++$(notdir %.subskel.h): $(TRUNNER_OUTPUT)/%.subskel.h ++ @true ++ + endif + + # ensure we set up tests.h header generation rule just once +-- +2.43.0 + diff --git a/.github/scripts/series/patches/0009-selftests-clone3-Avoid-fragile-struct-poking.patch b/.github/scripts/series/patches/0009-selftests-clone3-Avoid-fragile-struct-poking.patch new file mode 100644 index 00000000000000..d4c5d315f13dac --- /dev/null +++ b/.github/scripts/series/patches/0009-selftests-clone3-Avoid-fragile-struct-poking.patch @@ -0,0 +1,66 @@ +From c70c39b2ee707075b40c91e5047cf33406f30f30 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= +Date: Thu, 12 Sep 2024 19:20:34 +0000 +Subject: [PATCH] selftests: clone3: Avoid fragile struct poking +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit +To: Adrian Reber , + Christian Brauner , + Shuah Khan , + linux-kselftest@vger.kernel.org +Cc: linux-kernel@vger.kernel.org + +The struct libcap in the selftest, and the what libcap is actually +using doesn't match, so the test fail. Libcap internals have changed, +but the selftest hasn't. + +Fix by avoid poking the libcap internals. + +Signed-off-by: Björn Töpel +--- + .../clone3/clone3_cap_checkpoint_restore.c | 17 +++-------------- + 1 file changed, 3 insertions(+), 14 deletions(-) + +diff --git a/tools/testing/selftests/clone3/clone3_cap_checkpoint_restore.c b/tools/testing/selftests/clone3/clone3_cap_checkpoint_restore.c +index 31b56d625655..9e6ee8c5316e 100644 +--- a/tools/testing/selftests/clone3/clone3_cap_checkpoint_restore.c ++++ b/tools/testing/selftests/clone3/clone3_cap_checkpoint_restore.c +@@ -89,14 +89,9 @@ static int test_clone3_set_tid(struct __test_metadata *_metadata, + return ret; + } + +-struct libcap { +- struct __user_cap_header_struct hdr; +- struct __user_cap_data_struct data[2]; +-}; +- + static int set_capability(void) + { +- cap_value_t cap_values[] = { CAP_SETUID, CAP_SETGID }; ++ cap_value_t cap_values[] = { CAP_SETUID, CAP_SETGID, CAP_CHECKPOINT_RESTORE }; + struct libcap *cap; + int ret = -1; + cap_t caps; +@@ -113,14 +108,8 @@ static int set_capability(void) + goto out; + } + +- cap_set_flag(caps, CAP_EFFECTIVE, 2, cap_values, CAP_SET); +- cap_set_flag(caps, CAP_PERMITTED, 2, cap_values, CAP_SET); +- +- cap = (struct libcap *) caps; +- +- /* 40 -> CAP_CHECKPOINT_RESTORE */ +- cap->data[1].effective |= 1 << (40 - 32); +- cap->data[1].permitted |= 1 << (40 - 32); ++ cap_set_flag(caps, CAP_EFFECTIVE, 3, cap_values, CAP_SET); ++ cap_set_flag(caps, CAP_PERMITTED, 3, cap_values, CAP_SET); + + if (cap_set_proc(caps)) { + perror("cap_set_proc"); + +base-commit: 075dbe9f6e3c21596c5245826a4ee1f1c1676eb8 +-- +2.43.0 + diff --git a/.github/scripts/series/patches/0010-selftests-clone3-Avoid-fragile-struct-poking.patch b/.github/scripts/series/patches/0010-selftests-clone3-Avoid-fragile-struct-poking.patch new file mode 100644 index 00000000000000..4800187f5ec109 --- /dev/null +++ b/.github/scripts/series/patches/0010-selftests-clone3-Avoid-fragile-struct-poking.patch @@ -0,0 +1,48 @@ +From dd9191caeafccf7fd4b282aa8a516e594b2cc4fe Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= +Date: Fri, 27 Sep 2024 15:01:25 +0200 +Subject: [PATCH bpf-next 1/2] libbpf: Add missing per-arch include path +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit +To: Andrii Nakryiko , + Eduard Zingerman , + Mykola Lysenko , + bpf@vger.kernel.org, + netdev@vger.kernel.org +Cc: linux-kselftest@vger.kernel.org, + linux-kernel@vger.kernel.org, + linux-riscv@lists.infradead.org, + Charlie Jenkins + +libbpf does not include the per-arch tools include path, e.g. +tools/arch/riscv/include. Some architectures depend those files to +build properly. + +Include tools/arch/$(SUBARCH)/include in the libbpf build. + +Fixes: 6d74d178fe6e ("tools: Add riscv barrier implementation") +Signed-off-by: Björn Töpel +--- + tools/lib/bpf/Makefile | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/tools/lib/bpf/Makefile b/tools/lib/bpf/Makefile +index 1b22f0f37288..857a5f7b413d 100644 +--- a/tools/lib/bpf/Makefile ++++ b/tools/lib/bpf/Makefile +@@ -61,7 +61,8 @@ ifndef VERBOSE + endif + + INCLUDES = -I$(or $(OUTPUT),.) \ +- -I$(srctree)/tools/include -I$(srctree)/tools/include/uapi ++ -I$(srctree)/tools/include -I$(srctree)/tools/include/uapi \ ++ -I$(srctree)/tools/arch/$(SRCARCH)/include + + export prefix libdir src obj + + +base-commit: db5ca265e3334b48c4e3fa07eef79e8bc578c430 +-- +2.43.0 + diff --git a/.github/scripts/series/patches/0011-selftests-bpf-Add-missing-per-arch-include-path.patch b/.github/scripts/series/patches/0011-selftests-bpf-Add-missing-per-arch-include-path.patch new file mode 100644 index 00000000000000..8430c2762afe76 --- /dev/null +++ b/.github/scripts/series/patches/0011-selftests-bpf-Add-missing-per-arch-include-path.patch @@ -0,0 +1,54 @@ +From 14733cc5a0896de29d8f4f25d80bb74793659bb1 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= +Date: Fri, 27 Sep 2024 15:05:32 +0200 +Subject: [PATCH bpf-next 2/2] selftests: bpf: Add missing per-arch include + path +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit +To: Andrii Nakryiko , + Eduard Zingerman , + Mykola Lysenko , + bpf@vger.kernel.org, + netdev@vger.kernel.org +Cc: linux-kselftest@vger.kernel.org, + linux-kernel@vger.kernel.org, + linux-riscv@lists.infradead.org, + Charlie Jenkins + +The prog_tests programs do not include the per-arch tools include +path, e.g. tools/arch/riscv/include. Some architectures depend those +files to build properly. + +Include tools/arch/$(SUBARCH)/include in the selftests bpf build. + +Fixes: 6d74d178fe6e ("tools: Add riscv barrier implementation") +Signed-off-by: Björn Töpel +--- + tools/testing/selftests/bpf/Makefile | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/tools/testing/selftests/bpf/Makefile b/tools/testing/selftests/bpf/Makefile +index 365740f24d2e..d6a53afa449f 100644 +--- a/tools/testing/selftests/bpf/Makefile ++++ b/tools/testing/selftests/bpf/Makefile +@@ -10,6 +10,7 @@ TOOLSDIR := $(abspath ../../..) + LIBDIR := $(TOOLSDIR)/lib + BPFDIR := $(LIBDIR)/bpf + TOOLSINCDIR := $(TOOLSDIR)/include ++TOOLSARCHINCDIR := $(TOOLSDIR)/arch/$(SRCARCH)/include + BPFTOOLDIR := $(TOOLSDIR)/bpf/bpftool + APIDIR := $(TOOLSINCDIR)/uapi + ifneq ($(O),) +@@ -44,7 +45,7 @@ CFLAGS += -g $(OPT_FLAGS) -rdynamic \ + -Wall -Werror -fno-omit-frame-pointer \ + $(GENFLAGS) $(SAN_CFLAGS) $(LIBELF_CFLAGS) \ + -I$(CURDIR) -I$(INCLUDE_DIR) -I$(GENDIR) -I$(LIBDIR) \ +- -I$(TOOLSINCDIR) -I$(APIDIR) -I$(OUTPUT) ++ -I$(TOOLSINCDIR) -I$(TOOLSARCHINCDIR) -I$(APIDIR) -I$(OUTPUT) + LDFLAGS += $(SAN_LDFLAGS) + LDLIBS += $(LIBELF_LIBS) -lz -lrt -lpthread + +-- +2.43.0 + diff --git a/.github/scripts/series/patches/0012-Missing-iommu-config.patch b/.github/scripts/series/patches/0012-Missing-iommu-config.patch new file mode 100644 index 00000000000000..aeb956c38564a7 --- /dev/null +++ b/.github/scripts/series/patches/0012-Missing-iommu-config.patch @@ -0,0 +1,29 @@ +From cf68142d04abb6d1c848930bf4b19097497cd924 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= +Date: Mon, 30 Sep 2024 09:47:56 +0200 +Subject: [PATCH] Missing iommu config +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Björn Töpel +--- + tools/testing/selftests/iommu/config.riscv64 | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/tools/testing/selftests/iommu/config.riscv64 b/tools/testing/selftests/iommu/config.riscv64 +index d218811ccadf..efd7fe60553f 100644 +--- a/tools/testing/selftests/iommu/config.riscv64 ++++ b/tools/testing/selftests/iommu/config.riscv64 +@@ -1,4 +1,5 @@ + # IOMMUFD ++CONFIG_RUNTIME_TESTING_MENU=y + CONFIG_IOMMUFD=y + CONFIG_VFIO=y + CONFIG_VFIO_CONTAINER=n + +base-commit: e32cde8d2bd7d251a8f9b434143977ddf13dcec6 +prerequisite-patch-id: 0b6c42032915388333abd2e1fa71082780e474d1 +-- +2.43.0 + diff --git a/.github/scripts/series/patches/0013-selftests-filesystems-mount-notify.patch b/.github/scripts/series/patches/0013-selftests-filesystems-mount-notify.patch new file mode 100644 index 00000000000000..d4033542597713 --- /dev/null +++ b/.github/scripts/series/patches/0013-selftests-filesystems-mount-notify.patch @@ -0,0 +1,34 @@ +From 1405dc9a853bd1ccd2bb66f8b26c113bdb199222 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= +Date: Tue, 6 May 2025 07:15:12 +0000 +Subject: [PATCH 1/7] selftests: filesystems/mount-notify +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Fix warning from not handling return value of chdir(). + +Signed-off-by: Björn Töpel +--- + .../selftests/filesystems/mount-notify/mount-notify_test.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/tools/testing/selftests/filesystems/mount-notify/mount-notify_test.c b/tools/testing/selftests/filesystems/mount-notify/mount-notify_test.c +index 59a71f22fb11..c64acbbbd562 100644 +--- a/tools/testing/selftests/filesystems/mount-notify/mount-notify_test.c ++++ b/tools/testing/selftests/filesystems/mount-notify/mount-notify_test.c +@@ -487,7 +487,8 @@ TEST_F(fanotify, rmdir) + ASSERT_GE(ret, 0); + + if (ret == 0) { +- chdir("/"); ++ ret = chdir("/"); ++ ASSERT_EQ(ret, 0); + unshare(CLONE_NEWNS); + mount("", "/", NULL, MS_REC|MS_PRIVATE, NULL); + umount2("/a", MNT_DETACH); + +base-commit: 01f95500a162fca88cefab9ed64ceded5afabc12 +-- +2.48.1 + diff --git a/.github/scripts/series/patches/0014-selftests-mm-page_frag.patch b/.github/scripts/series/patches/0014-selftests-mm-page_frag.patch new file mode 100644 index 00000000000000..c5443aa1e3d0bd --- /dev/null +++ b/.github/scripts/series/patches/0014-selftests-mm-page_frag.patch @@ -0,0 +1,40 @@ +From 69963d4336b06285ecd4f2bc81ed9d7ee2678a63 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= +Date: Tue, 6 May 2025 07:16:01 +0000 +Subject: [PATCH 2/7] selftests: mm/page_frag +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Fix build error for cross-builds. Make sure that correct kernel, and +make flags are picked up. + +Signed-off-by: Björn Töpel +--- + tools/testing/selftests/mm/page_frag/Makefile | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/tools/testing/selftests/mm/page_frag/Makefile b/tools/testing/selftests/mm/page_frag/Makefile +index 8c8bb39ffa28..7e60c04dadf7 100644 +--- a/tools/testing/selftests/mm/page_frag/Makefile ++++ b/tools/testing/selftests/mm/page_frag/Makefile +@@ -1,5 +1,5 @@ + PAGE_FRAG_TEST_DIR := $(realpath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))) +-KDIR ?= /lib/modules/$(shell uname -r)/build ++KDIR ?= $(abspath $(PAGE_FRAG_TEST_DIR)/../../../../..) + + ifeq ($(V),1) + Q = +@@ -12,7 +12,7 @@ MODULES = page_frag_test.ko + obj-m += page_frag_test.o + + all: +- +$(Q)make -C $(KDIR) M=$(PAGE_FRAG_TEST_DIR) modules ++ +$(Q)$(MAKE) -C $(KDIR) M=$(PAGE_FRAG_TEST_DIR) modules + + clean: +- +$(Q)make -C $(KDIR) M=$(PAGE_FRAG_TEST_DIR) clean ++ +$(Q)$(MAKE) -C $(KDIR) M=$(PAGE_FRAG_TEST_DIR) clean +-- +2.48.1 + diff --git a/.github/scripts/series/patches/0015-selftests-mount_setattr-mount_setattr_test.patch b/.github/scripts/series/patches/0015-selftests-mount_setattr-mount_setattr_test.patch new file mode 100644 index 00000000000000..026fcdc337046b --- /dev/null +++ b/.github/scripts/series/patches/0015-selftests-mount_setattr-mount_setattr_test.patch @@ -0,0 +1,47 @@ +From 9db1ec73a41c555846a72d463b9d675c191f37e1 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= +Date: Tue, 6 May 2025 07:16:55 +0000 +Subject: [PATCH 3/7] selftests: mount_setattr/mount_setattr_test +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Fix build error: Some syscalls wrappers are already included via +"filesystems" kselftests. + +Signed-off-by: Björn Töpel +--- + .../mount_setattr/mount_setattr_test.c | 17 ----------------- + 1 file changed, 17 deletions(-) + +diff --git a/tools/testing/selftests/mount_setattr/mount_setattr_test.c b/tools/testing/selftests/mount_setattr/mount_setattr_test.c +index 48a000cabc97..7b624cbf3c55 100644 +--- a/tools/testing/selftests/mount_setattr/mount_setattr_test.c ++++ b/tools/testing/selftests/mount_setattr/mount_setattr_test.c +@@ -161,23 +161,6 @@ static inline int sys_mount_setattr(int dfd, const char *path, unsigned int flag + return syscall(__NR_mount_setattr, dfd, path, flags, attr, size); + } + +-#ifndef OPEN_TREE_CLONE +-#define OPEN_TREE_CLONE 1 +-#endif +- +-#ifndef OPEN_TREE_CLOEXEC +-#define OPEN_TREE_CLOEXEC O_CLOEXEC +-#endif +- +-#ifndef AT_RECURSIVE +-#define AT_RECURSIVE 0x8000 /* Apply to the entire subtree */ +-#endif +- +-static inline int sys_open_tree(int dfd, const char *filename, unsigned int flags) +-{ +- return syscall(__NR_open_tree, dfd, filename, flags); +-} +- + static ssize_t write_nointr(int fd, const void *buf, size_t count) + { + ssize_t ret; +-- +2.48.1 + diff --git a/.github/scripts/series/patches/0016-selftests-pid_namespace-pid_max.patch b/.github/scripts/series/patches/0016-selftests-pid_namespace-pid_max.patch new file mode 100644 index 00000000000000..c6e3bce0ff07f6 --- /dev/null +++ b/.github/scripts/series/patches/0016-selftests-pid_namespace-pid_max.patch @@ -0,0 +1,30 @@ +From 1f035044cdf5a5619b49cc43dce96e7e1705f3ca Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= +Date: Tue, 6 May 2025 07:18:29 +0000 +Subject: [PATCH 4/7] selftests: pid_namespace/pid_max +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Fix build error by including glibc headers. + +Signed-off-by: Björn Töpel +--- + tools/testing/selftests/pid_namespace/pid_max.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/tools/testing/selftests/pid_namespace/pid_max.c b/tools/testing/selftests/pid_namespace/pid_max.c +index 51c414faabb0..972bedc475f1 100644 +--- a/tools/testing/selftests/pid_namespace/pid_max.c ++++ b/tools/testing/selftests/pid_namespace/pid_max.c +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + + #include "../kselftest_harness.h" + #include "../pidfd/pidfd.h" +-- +2.48.1 + diff --git a/.github/scripts/series/patches/0017-selftests-proc-proc-pid-vm.patch b/.github/scripts/series/patches/0017-selftests-proc-proc-pid-vm.patch new file mode 100644 index 00000000000000..18dd8094ec282f --- /dev/null +++ b/.github/scripts/series/patches/0017-selftests-proc-proc-pid-vm.patch @@ -0,0 +1,39 @@ +From a4bfc538aa2d9dc960e075c6b298bbc2f03314fe Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= +Date: Tue, 6 May 2025 07:19:24 +0000 +Subject: [PATCH 5/7] selftests: proc/proc-pid-vm +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Fix warning for unused variables by moving the x86 ifdef. + +Signed-off-by: Björn Töpel +--- + tools/testing/selftests/proc/proc-pid-vm.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/tools/testing/selftests/proc/proc-pid-vm.c b/tools/testing/selftests/proc/proc-pid-vm.c +index d04685771952..f5d011ec296b 100644 +--- a/tools/testing/selftests/proc/proc-pid-vm.c ++++ b/tools/testing/selftests/proc/proc-pid-vm.c +@@ -212,6 +212,8 @@ static int make_exe(const uint8_t *payload, size_t len) + } + #endif + ++#ifdef __x86_64__ ++ + /* + * 0: vsyscall VMA doesn't exist vsyscall=none + * 1: vsyscall VMA is --xp vsyscall=xonly +@@ -226,7 +228,6 @@ static const char str_vsyscall_1[] = + static const char str_vsyscall_2[] = + "ffffffffff600000-ffffffffff601000 r-xp 00000000 00:00 0 [vsyscall]\n"; + +-#ifdef __x86_64__ + static void sigaction_SIGSEGV(int _, siginfo_t *__, void *___) + { + _exit(g_vsyscall); +-- +2.48.1 + diff --git a/.github/scripts/series/patches/0018-selftests-riscv-abi-pointer_masking.patch b/.github/scripts/series/patches/0018-selftests-riscv-abi-pointer_masking.patch new file mode 100644 index 00000000000000..c2bfcb1499edca --- /dev/null +++ b/.github/scripts/series/patches/0018-selftests-riscv-abi-pointer_masking.patch @@ -0,0 +1,39 @@ +From 427d10dede741757a985e8e5a8128040cba0c328 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= +Date: Tue, 6 May 2025 07:20:17 +0000 +Subject: [PATCH 6/7] selftests: riscv/abi/pointer_masking +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Fix warning. + +Signed-off-by: Björn Töpel +--- + tools/testing/selftests/riscv/abi/pointer_masking.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/tools/testing/selftests/riscv/abi/pointer_masking.c b/tools/testing/selftests/riscv/abi/pointer_masking.c +index 059d2e87eb1f..4627bb7e6c01 100644 +--- a/tools/testing/selftests/riscv/abi/pointer_masking.c ++++ b/tools/testing/selftests/riscv/abi/pointer_masking.c +@@ -213,14 +213,14 @@ static void test_tagged_addr_abi_sysctl(void) + + value = '1'; + if (!pwrite_wrapper(fd, &value, 1, "write '1'")) +- ksft_test_result_fail(err_pwrite_msg); ++ ksft_test_result_fail("%s", err_pwrite_msg); + else + ksft_test_result(set_tagged_addr_ctrl(min_pmlen, true) == -EINVAL, + "sysctl disabled\n"); + + value = '0'; + if (!pwrite_wrapper(fd, &value, 1, "write '0'")) +- ksft_test_result_fail(err_pwrite_msg); ++ ksft_test_result_fail("%s", err_pwrite_msg); + else + ksft_test_result(set_tagged_addr_ctrl(min_pmlen, true) == 0, + "sysctl enabled\n"); +-- +2.48.1 + diff --git a/.github/scripts/series/patches/0019-selftests-ublk.patch b/.github/scripts/series/patches/0019-selftests-ublk.patch new file mode 100644 index 00000000000000..0ea338de438384 --- /dev/null +++ b/.github/scripts/series/patches/0019-selftests-ublk.patch @@ -0,0 +1,31 @@ +From 4e73635a35e39135a6c92c3ceb6c8036de707d79 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= +Date: Tue, 6 May 2025 07:20:35 +0000 +Subject: [PATCH 7/7] selftests: ublk +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Fix build by making sure the correct headers are included in the +build. + +Signed-off-by: Björn Töpel +--- + tools/testing/selftests/ublk/Makefile | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/tools/testing/selftests/ublk/Makefile b/tools/testing/selftests/ublk/Makefile +index f34ac0bac696..4aa339e222bd 100644 +--- a/tools/testing/selftests/ublk/Makefile ++++ b/tools/testing/selftests/ublk/Makefile +@@ -1,6 +1,6 @@ + # SPDX-License-Identifier: GPL-2.0 + +-CFLAGS += -O3 -Wl,-no-as-needed -Wall -I $(top_srcdir) ++CFLAGS += -O3 -Wl,-no-as-needed -Wall $(KHDR_INCLUDES) -I $(top_srcdir) + LDLIBS += -lpthread -lm -luring + + TEST_PROGS := test_generic_01.sh +-- +2.48.1 + diff --git a/.github/scripts/series/patches/0020-Add-missing-utility-script-to-install-target.patch b/.github/scripts/series/patches/0020-Add-missing-utility-script-to-install-target.patch new file mode 100644 index 00000000000000..e51d2d958c1e4c --- /dev/null +++ b/.github/scripts/series/patches/0020-Add-missing-utility-script-to-install-target.patch @@ -0,0 +1,31 @@ +From 566f501224c76e10d4b88dbd88720458add6bf3d Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= +Date: Tue, 13 May 2025 10:23:18 +0000 +Subject: [PATCH] Add missing utility script to install target +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Björn Töpel +--- + tools/testing/selftests/ublk/Makefile | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/tools/testing/selftests/ublk/Makefile b/tools/testing/selftests/ublk/Makefile +index f34ac0bac696..127ab3f17658 100644 +--- a/tools/testing/selftests/ublk/Makefile ++++ b/tools/testing/selftests/ublk/Makefile +@@ -29,6 +29,8 @@ TEST_PROGS += test_stress_03.sh + TEST_PROGS += test_stress_04.sh + TEST_PROGS += test_stress_05.sh + ++TEST_FILES := test_common.sh ++ + TEST_GEN_PROGS_EXTENDED = kublk + + include ../lib.mk + +base-commit: e9565e23cd89d4d5cd4388f8742130be1d6f182d +-- +2.48.1 + diff --git a/.github/scripts/series/patches/0021-ntsync-typo.patch b/.github/scripts/series/patches/0021-ntsync-typo.patch new file mode 100644 index 00000000000000..f2b3fa5f244c5c --- /dev/null +++ b/.github/scripts/series/patches/0021-ntsync-typo.patch @@ -0,0 +1,25 @@ +From 7a2aa1a0420d6b6fae31b6a3cb59965ebca7bb6f Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Bj=C3=B6rn=20T=C3=B6pel?= +Date: Wed, 14 May 2025 12:27:17 +0000 +Subject: [PATCH] ntsync: typo +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Björn Töpel +--- + tools/testing/selftests/drivers/ntsync/config | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/tools/testing/selftests/drivers/ntsync/config b/tools/testing/selftests/drivers/ntsync/config +index 60539c826d06..0aa68de147af 100644 +--- a/tools/testing/selftests/drivers/ntsync/config ++++ b/tools/testing/selftests/drivers/ntsync/config +@@ -1 +1 @@ +-CONFIG_WINESYNC=y ++CONFIG_NTSYNC=y + +base-commit: 9f35e33144ae5377d6a8de86dd3bd4d995c6ac65 +-- +2.48.1 + diff --git a/.github/scripts/series/post_to_squad.py b/.github/scripts/series/post_to_squad.py new file mode 100755 index 00000000000000..425e776c389073 --- /dev/null +++ b/.github/scripts/series/post_to_squad.py @@ -0,0 +1,296 @@ +#!/usr/bin/env python3 + +# SPDX-FileCopyrightText: 2024 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +# +# Pulls build/run results from the kselftest kernel logs, and +# publishes them to SQUAD. +# + +import argparse +import json +import os +import os.path +import pathlib +import pprint +import re +import requests +import sys +import tempfile + +from pathlib import Path +from tap import parser + +SQUAD_TOKEN = os.getenv('SQUAD_TOKEN') +SQUAD_URL = "https://squad.di.riseproject.dev/api/submit" +SQUAD_GROUP = "riscv-linux" +SQUAD_PROJECT = "linux-all" +SQUAD_CI_ENV = "qemu" + +def parse_bpf_kselftest(kselftest_file, results): + bpf_start_pat = re.compile(r'^#\s+selftests:\s+([a-z_\-/]+):\s+([a-z_\-/]+)') + bpf_end_pat = re.compile(r'^(not ok|ok)\s+([0-9]+)\s+selftests:\s+([a-z_\-/]+):\s+([a-z_\-/]+)') + bpf_test_pat = re.compile(r'^#\s+#([0-9]+)\s+([a-z_\-/]+):(OK|FAIL)') + + curr_start = None + curr_end = None + for i in kselftest_file: + if (m := bpf_start_pat.match(i)): + group = m.group(1) + test = m.group(2) + if curr_start and not curr_end: + print(f"PREMATURE START: group: {group} test: {test}", file=sys.stderr) + curr_start = m + curr_end = None + continue + + if (m := bpf_end_pat.match(i)): + group = "kselftest-" + m.group(3) + test = group + "/" + m.group(4) + "__allsubtests" + res = False if m.group(1) == "not ok" else True + if not curr_start or curr_start.group(1) != m.group(3): + print(f"PREMATURE END: group end: {group} test: {test}", file=sys.stderr) + res = False + curr_end = m + + if group not in results: + results[group] = {} + if "tests" not in results[group]: + results[group]["tests"] = {} + if test not in results[group]["tests"]: + results[group]["tests"][test] = {} + + results[group]["tests"][test]["result"] = "pass" if res else "fail" + results[group]["log"] = kselftest_file.name + continue + + if (m := bpf_test_pat.match(i)): + sub_test_id = m.group(1) + sub_test_name = m.group(2) + sub_res = False if m.group(3) == "FAIL" else True + if not curr_start: + print(f"PREMATURE TEST: test: {sub_test_name}", file=sys.stderr) + continue + + group = "kselftest-" + curr_start.group(1) + test = group + "/" + curr_start.group(2) + "__" + sub_test_name + + if "tests" not in results[group]: + results[group]["tests"] = {} + if test not in results[group]["tests"]: + results[group]["tests"][test] = {} + + results[group]["tests"][test]["result"] = "pass" if sub_res else "fail" + results[group]["log"] = kselftest_file.name + + if curr_start and not curr_end: + group = "kselftest-" + curr_start.group(1) + test = group + "/" + curr_start.group(2) + "__allsubtests" + print(f"END MISSING: group end: {group} test: {test}", file=sys.stderr) + if test not in results[group]["tests"]: + results[group]["tests"][test] = {} + results[group]["tests"][test]["result"] = "fail" + + return results + +def parse_kselftest(kselftest_file, results): + description_pat = re.compile(r"selftests:\s+(\S+)\s+(\S+)") + + p = parser.Parser() + for l in p.parse(kselftest_file): + if l.category == "test": + description = description_pat.match(l.description) + if not description: + print(f"BAD SELFTEST STRING: {l.description}", file=sys.stderr) + continue + + group = "kselftest-" + description.group(1)[:-1] + test = group + "/" + description.group(2) + + if group not in results: + results[group] = {} + if "tests" not in results[group]: + results[group]["tests"] = {} + if test not in results[group]["tests"]: + results[group]["tests"][test] = {} + + # XXX Use l.directive.skip? + + results[group]["tests"][test]["result"] = "pass" if l.ok else "fail" + results[group]["log"] = kselftest_file.name + + return results + +# +# The toplevel file needs special handling, when submitting the +# results to SQUAD. The SQUAD REST API only allows for *one* full log +# per POST, but the toplevel log is a collection of builds/tests. This +# means that each test in the toplevel, that has a log needs a POST of +# its own. +# +def parse_toplevel(top_file, results): + build_fail_pat = re.compile(r"^::error::FAIL Build (kernel|selftest) (\S+) \"(\S+)\"") + build_ok_pat = re.compile(r"^::notice::OK Build (kernel|selftest) (\S+)") + test_fail_pat = re.compile(r"^::error::FAIL Test kernel (\S+) (\S+) (\S+) (\S+) (\S+) (\S+) \S+ \"(\S+)\"") + test_ok_pat = re.compile(r"^::notice::OK Test kernel (\S+) (\S+) (\S+) (\S+) (\S+) (\S+)") + build_name_pat = re.compile(r"^build_name (\S+)") + + for i in top_file: + group = None + test = None + log = None + res = False + + if (m := build_name_pat.match(i)): + results["build_name"] = m.group(1) + continue + + if (m := build_fail_pat.match(i)): + group = m.group(2) + test = group + "/" + "build_" + m.group(1) + log = m.group(3) + res = False + + if (m := build_ok_pat.match(i)): + group = m.group(2) + test = group + "/" + "build_" + m.group(1) + res = True + + if (m := test_fail_pat.match(i)): + group = m.group(1) + test = group + "/" + m.group(2) + "__" + m.group(3) + "__" + m.group(4)\ + + "__" + m.group(5) + "__" + m.group(6) + log = m.group(7) + res = False + + if (m := test_ok_pat.match(i)): + group = m.group(1) + test = group + "/" + m.group(2) + "__" + m.group(3) + "__" + m.group(4)\ + + "__" + m.group(5) + "__" + m.group(6) + res = True + + if group and test: + if group not in results: + results[group] = {} + + results[group]["log_per_test"] = True + + if "tests" not in results[group]: + results[group]["tests"] = {} + if "tests-log" not in results[group]: + results[group]["tests-log"] = {} + if test not in results[group]["tests"]: + results[group]["tests"][test] = {} + + results[group]["tests"][test]["result"] = "pass" if res else "fail" + if log: + if "tests-log" not in results[group]: + results[group]["tests-log"] = {} + + l = os.path.dirname(top_file.name) + "/" + log + results[group]["tests-log"][test] = l + + return results + +def parse_args(): + parser = argparse.ArgumentParser(description = 'Output Squad json from kselftest runs') + + parser.add_argument("--fake-curl", action="store_true", help = 'Dry run showing curl equivalent') + parser.add_argument("--branch", default="please_set_me", help = 'Git branch ref') + parser.add_argument("--job-url", default="http://example.com/notset", help = 'Job URL') + parser.add_argument("--selftest-bpf-log", help = 'BPF kselftest log file') + parser.add_argument("--selftest-log-dir", default=None, help = 'Kselftest log files directory') + parser.add_argument("--toplevel-log", required=True, help = 'Toplevel "kselftest.log" file') + + return parser.parse_args() + +def submit_fake_curl(testsuite, tests_dict, log, job_url, branch, build_name, o_path): + metadata_json = o_path / (testsuite.replace("/", "_") + "--metadata.json") + jstr = json.dumps({"job_url" : job_url, + "branch" : branch + }, indent=4) + metadata_json.write_text(jstr) + print(f"metadata: {jstr}") + + tests_json = o_path / (testsuite.replace("/", "_") + "--tests.json") + jstr = json.dumps(tests_dict, indent=4) + tests_json.write_text(jstr) + print(f"tests: {jstr}") + + print(f'curl --header "Authorization: token {SQUAD_TOKEN}" \\') + print(f' --form tests=@{str(o_path.absolute()) + "/" + tests_json.name} \\') + print(f' --form metadata=@{str(o_path.absolute()) + "/" + metadata_json.name} \\') + if log: + print(f' --form log=@{log} \\') + print(f' {SQUAD_URL}/{SQUAD_GROUP}/{SQUAD_PROJECT}/{build_name}/{SQUAD_CI_ENV}') + +def submit_squad(testsuite, tests_dict, log, job_url, branch, build_name, o_path): + full_url = f"{SQUAD_URL}/{SQUAD_GROUP}/{SQUAD_PROJECT}/{build_name}/{SQUAD_CI_ENV}" + + metadata_json = o_path / (testsuite.replace("/", "_") + "--metadata.json") + jstr = json.dumps({"job_url" : job_url, + "branch" : branch + }, indent=4) + metadata_json.write_text(jstr) + # print(f"metadata: {jstr}") + + tests_json = o_path / (testsuite.replace("/", "_") + "--tests.json") + jstr = json.dumps(tests_dict, indent=4) + tests_json.write_text(jstr) + # print(f"tests: {jstr}") + + headers = { + "Authorization": f"token {SQUAD_TOKEN}" + } + + files = { + "tests": tests_json.open(mode='rb'), + "metadata": metadata_json.open(mode='rb') + } + + if log: + files["log"] = open(f"{log}", 'rb') + + response = requests.post(full_url, headers=headers, files=files) + print(f"Request completed with status code: {response.status_code} text: {response.text}") + +if __name__ == "__main__": + args = parse_args() + + results = {} + + t = os.path.expanduser(args.toplevel_log) + with open(t, 'r') as top: + results = parse_toplevel(top, results) + + if args.selftest_log_dir: + for f in Path(args.selftest_log_dir).glob("test_kernel__*.log"): + a = os.path.expanduser(f) + with open(a, 'r') as all: + results = parse_kselftest(all, results) + + if args.selftest_bpf_log: + b = os.path.expanduser(args.selftest_bpf_log) + with open(b, 'r') as bpf: + results = parse_bpf_kselftest(bpf, results) + + submit = submit_fake_curl if args.fake_curl else submit_squad + + with tempfile.TemporaryDirectory() as temp_dir: + o_path = Path(temp_dir) + + for testsuite in results: + if testsuite == "build_name": + continue + + if results[testsuite].get("log_per_test", False): + for test in results[testsuite]["tests"]: + log = results[testsuite]["tests-log"].get(test, None) + submit(testsuite, {test : results[testsuite]["tests"][test] },\ + log, args.job_url, args.branch, results["build_name"], o_path) + else: + log = results[testsuite].get("log", None) + submit(testsuite, results[testsuite]["tests"], log, args.job_url,\ + args.branch, results["build_name"], o_path) diff --git a/.github/scripts/series/prepare_rootfs.sh b/.github/scripts/series/prepare_rootfs.sh new file mode 100755 index 00000000000000..e77699ea752442 --- /dev/null +++ b/.github/scripts/series/prepare_rootfs.sh @@ -0,0 +1,111 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2023 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +# Prepares a VM image, from a kernel tar-ball and a rootfs. + +set -x +set -euo pipefail + +d=$(dirname "${BASH_SOURCE[0]}") +. $d/utils.sh +. $d/qemu_test_utils.sh + +kernelpath=$1 +rootfs=$2 +tst=$3 +imagename=$4 + +cleanup() { + rm -rf "$tmp" +} + +tmp=$(mktemp -d -p ${ci_root}) +trap cleanup EXIT + +unzstd --keep --stdout $rootfs > $tmp/$(basename $rootfs .zst) + +rootfs="$tmp/$(basename $rootfs .zst)" +modpath=$(find $kernelpath -wholename '*/lib/modules') +vmlinuz=$(find $kernelpath -name '*vmlinu[zx]*') + +kselftestpath=${kernelpath}_build/kselftest/kselftest_install + +imsz=0 +if [[ $tst =~ kselftest ]]; then + sz=$(du -B 1G -s "$kselftestpath" | awk '{print $1}') + imsz=$(( ${imsz} + $sz )) +fi + +if [[ -n $modpath ]]; then + sz=$(du -B 1G -s "$modpath" | awk '{print $1}') + imsz=$(( ${imsz} + $sz )) +fi +imsz=$(( ${imsz} + 2 )) + +# aarch64 export LIBGUESTFS_BACKEND_SETTINGS=force_tcg +eval "$(guestfish --listen)" + +rm -rf $imagename +guestfish --remote -- \ + disk-create "$imagename" raw ${imsz}G : \ + add-drive "$imagename" format:raw : \ + launch : \ + part-init /dev/sda gpt : \ + part-add /dev/sda primary 2048 526336 : \ + part-add /dev/sda primary 526337 -34 : \ + part-set-gpt-type /dev/sda 1 C12A7328-F81F-11D2-BA4B-00A0C93EC93B : \ + mkfs ext4 /dev/sda2 : \ + mount /dev/sda2 / : \ + mkdir /boot : \ + mkdir /boot/efi : \ + mkfs vfat /dev/sda1 : \ + mount /dev/sda1 /boot/efi : \ + tar-in $rootfs / : \ + copy-in $vmlinuz /boot/efi/ : \ + mv /boot/efi/$(basename $vmlinuz) /boot/efi/Image + + +if [[ -n $modpath ]]; then + guestfish --remote -- copy-in $modpath /lib/ +fi + +if [[ $tst =~ kselftest ]]; then + guestfish --remote -- \ + copy-in $kselftestpath / + + subtest=$(echo ${tst} | cut -f2- -d'-') + + if [[ "$subtest" =~ bpf ]]; then + timeout=9000 + else + timeout=3600 + fi + + touch $tmp/dotest + chmod +x $tmp/dotest + cat >$tmp/dotest <Hello kselftest" > /dev/kmsg +cd /kselftest_install +export PATH=${PATH}:/kselftest_install/bpf/tools/sbin + +echo "TEST ${subtest}" +./run_kselftest.sh -o ${timeout} -c ${subtest} +EOF + + echo "dotest:" + cat $tmp/dotest + echo "dotest end" + guestfish --remote -- \ + copy-in $tmp/dotest / +fi + +guestfish --remote -- \ + sync : \ + umount /boot/efi : \ + umount / : \ + exit diff --git a/.github/scripts/series/qemu_test_utils.sh b/.github/scripts/series/qemu_test_utils.sh new file mode 100644 index 00000000000000..5bc13b74e3c87c --- /dev/null +++ b/.github/scripts/series/qemu_test_utils.sh @@ -0,0 +1,95 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2024 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -euo pipefail + +qemu_subtests=() + +generate_qemu_subtests() { + local xlen=$1 + local config=$2 + local fragment=$3 + local toolchain=$4 + local rootfs=$5 + + local n=$(gen_kernel_name $xlen $config $fragment $toolchain) + local cpu_sifive=0 + local fw_uefi=0 + local hw_acpi=0 + local kernel_config=$(find ${ci_root}/${n} -name 'config-*' 2>/dev/null || echo "/dev/null") + + qemu_subtests=() + + if [[ $xlen == "rv64" ]]; then + if ls ${kernel_config} &> /dev/null; then + if grep -q 'CONFIG_RISCV_ALTERNATIVE_EARLY=y' ${kernel_config}; then + cpu_sifive=1 + fi + if grep -q 'CONFIG_EFI=y' ${kernel_config}; then + fw_uefi=1 + fi + if grep -q 'CONFIG_ACPI=y' ${kernel_config}; then + hw_acpi=1 + fi + fi + + for cpu in default64 server64 max64 sifive; do + if [[ $cpu =~ sifive ]]; then + if ! (( ${cpu_sifive} )); then + continue + fi + fi + + for fw in no_uefi uboot_uefi; do + if ! [[ $fw == no_uefi ]]; then + if ! (( ${fw_uefi} )); then + continue + fi + + if [[ $fw == edk2_uefi ]]; then + continue + fi + fi + + # For now, we're only doing selftest on DT. + if [[ $config =~ ^kselftest ]]; then + if [[ $cpu == server64 && $fw == uboot_uefi && $rootfs == ubuntu ]]; then + if (( ${ci_test_selftests} )); then + qemu_subtests+=( "$cpu $fw dt $config" ) + fi + fi + continue + fi + + for hw in dt acpi; do + if [[ $hw == acpi ]]; then + if [[ $fw == no_uefi ]]; then + continue + fi + + if ! (( ${hw_acpi} )); then + continue + fi + fi + + qemu_subtests+=( "$cpu $fw $hw boot" ) + + done + done + done + else + qemu_subtests+=( "default32 no_uefi dt boot" ) + fi + return 0 +} + +get_qemu_test_name() { + local cpu=$1 + local fw=$2 + local hw=$3 + local tst=$4 + + echo "${cpu}__${fw}__${hw}__${tst}" +} diff --git a/.github/scripts/series/selftest_builder.sh b/.github/scripts/series/selftest_builder.sh new file mode 100755 index 00000000000000..51b0ac69fcb9a6 --- /dev/null +++ b/.github/scripts/series/selftest_builder.sh @@ -0,0 +1,24 @@ +set -euo pipefail + +d=$(dirname "${BASH_SOURCE[0]}") +. $d/utils.sh + +xlen=$1 +config=$2 +fragment=$3 +toolchain=$4 + +tm=$(mktemp -p ${ci_root}) +n=$(gen_kernel_name $xlen $config $fragment $toolchain) +logs=$(get_logs_dir) +rc=0 +log="build_selftest___${n}.log" +\time --quiet -o $tm -f "took %es" \ + $d/build_selftest.sh "${xlen}" "${config}" "${fragment}" "${toolchain}" &> "${logs}/${log}" || rc=$? +if (( $rc )); then + echo "::error::FAIL Build selftest ${n} \"${log}\" $(cat $tm)" +else + echo "::notice::OK Build selftest ${n} $(cat $tm)" +fi +rm $tm +exit $rc diff --git a/.github/scripts/series/test_all.sh b/.github/scripts/series/test_all.sh new file mode 100755 index 00000000000000..b9329e55cffead --- /dev/null +++ b/.github/scripts/series/test_all.sh @@ -0,0 +1,17 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2023 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -euo pipefail + +d=$(dirname "${BASH_SOURCE[0]}") +. $d/utils.sh + +$d/unpack_fw.sh + +parallel_log=$(mktemp -p ${ci_root}) +parallel -j $(($(nproc)/4)) --colsep ' ' --joblog ${parallel_log} \ + ${d}/kernel_tester.sh {1} {2} {3} {4} {5} :::: <($d/generate_test_runs.sh) || true +cat ${parallel_log} +rm ${parallel_log} diff --git a/.github/scripts/series/test_kernel.sh b/.github/scripts/series/test_kernel.sh new file mode 100755 index 00000000000000..2e668bfc3feb6d --- /dev/null +++ b/.github/scripts/series/test_kernel.sh @@ -0,0 +1,206 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2023 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +# Executes the VMs, and report. + +set -x +set -euo pipefail + +d=$(dirname "${BASH_SOURCE[0]}") +. $d/utils.sh +. $d/qemu_test_utils.sh + +xlen=$1 +config=$2 +fragment=$3 +toolchain=$4 +rootfs=$5 + +cpu=$6 +fw=$7 +hw=$8 +tst=$9 + +cpu_to_qemu() { + local cpu=$1 + + case "$cpu" in + "default32") + echo "rv32" + ;; + "default64") + echo "rv64" + ;; + "server64") + echo "rv64,v=true,vlen=256,elen=64,h=true,zbkb=on,zbkc=on,zbkx=on,zkr=on,zkt=on,svinval=on,svnapot=on,svpbmt=on,zabha=on,zacas=on" + ;; + "max64") + echo "max" + ;; + "sifive") + echo "sifive-u54" + ;; + *) + echo "BADCPU" + ;; + esac +} + +fw_to_qemu() { + local hw=$1 + local fw=$2 + local vmlinuz=$3 + + case "$fw" in + "no_uefi") + echo "$vmlinuz" + ;; + "uboot_uefi") + if [[ ${hw} == "acpi" ]]; then + echo "${ci_root}/firmware/rv64/rv64-u-boot-acpi.bin" + else + echo "${ci_root}/firmware/rv64/rv64-u-boot.bin" + fi + ;; + *) + echo "BADFW" + ;; + esac +} + +qemu_kernel_append="root=/dev/vda2 rw earlycon console=tty0 console=ttyS0 panic=-1 oops=panic sysctl.vm.panic_on_oom=1" + +qemu_rv64 () { + local qemu_to=$1 + local qemu_log=$2 + local qemu_bios=$3 + local qemu_kernel=$4 + local qemu_cpu=$5 + local qemu_acpi=$6 + local qemu_aia=$7 + local qemu_image=$8 + + timeout --foreground ${qemu_to}s qemu-system-riscv64 \ + -no-reboot \ + -nodefaults \ + -nographic \ + -machine virt,acpi=${qemu_acpi},aia=${qemu_aia} \ + -smp 4 \ + -bios ${qemu_bios} \ + -cpu ${qemu_cpu} \ + -kernel ${qemu_kernel} \ + -append "${qemu_kernel_append}" \ + -m 8G \ + -object rng-random,filename=/dev/urandom,id=rng0 \ + -device virtio-rng-device,rng=rng0 \ + -chardev stdio,id=char0,mux=on,signal=off,logfile="${qemu_log}" \ + -serial chardev:char0 \ + -drive if=none,file=${qemu_image},format=raw,id=hd0 \ + -device virtio-blk-pci,drive=hd0 +} + +qemu_rv32 () { + local qemu_to=$1 + local qemu_log=$2 + local qemu_bios=$3 + local qemu_kernel=$4 + local qemu_cpu=$5 + local qemu_acpi=$6 + local qemu_aia=$7 + local qemu_image=$8 + + timeout --foreground ${qemu_to}s qemu-system-riscv32 \ + -no-reboot \ + -nodefaults \ + -nographic \ + -machine virt \ + -cpu rv32 \ + -smp 4 \ + -bios ${qemu_bios} \ + -kernel ${qemu_kernel} \ + -append "${qemu_kernel_append}" \ + -m 1G \ + -object rng-random,filename=/dev/urandom,id=rng0 \ + -device virtio-rng-device,rng=rng0 \ + -chardev stdio,id=char0,mux=on,signal=off,logfile="${qemu_log}" \ + -serial chardev:char0 \ + -drive if=none,file=${qemu_image},format=raw,id=hd0 \ + -device virtio-blk-pci,drive=hd0 +} + +check_shutdown () { + local image=$1 + local rc=0 + + shutdown="$(guestfish --ro -a "$image" -i cat /shutdown-status 2>/dev/null)" + if [[ $shutdown == "clean" ]]; then + f=$(mktemp -p ${tmp}) + guestfish --rw -a "$image" -i download /dmesg $f + fail_str=( "\-+\\[ cut here \\]-+\\s+(.*\\s+-+\\[ end trace (\\w*) \\]-+)" "(Unhandled fault.*)\\r\\n" "Kernel panic - (.*) end Kernel panic" "Stack:\\s+(.*\\s+-+\\[ end trace (\\w*) \\]-+)" "^[^\\n]+WARNING:.*?$" "^[^\\n]+Oops(?: -|:).*?$" "^[^\\n]+BUG:.*?$" ) + for fail in "${fail_str[@]}"; do + if grep -E "$fail" $f; then + rc=1 + fi + done + else + rc=1 + fi + + return $rc +} + +tmp=$(mktemp -d -p "${ci_root}") +trap 'rm -rf "$tmp"' EXIT + +kernelpath=${ci_root}/$(gen_kernel_name $xlen $config $fragment $toolchain) +vmlinuz=$(find $kernelpath -name '*vmlinu[zx]*') +rootfs_tar=$(echo ${ci_rootfs_root}/rootfs_${xlen}_${rootfs}_*.tar.zst) +qemu_image=$tmp/rootfs.img + +rc=0 +\time --quiet -f "took prepare_rootfs %e" \ + $d/prepare_rootfs.sh $kernelpath $rootfs_tar $tst $qemu_image || rc=$? +if (( $rc )); then + echo "Failed preparing rootfs image" + exit 1 +fi + +qemu_to=120 +if [[ $rootfs == "ubuntu" ]]; then + qemu_to=$(( $qemu_to * 3 )) + if [[ $fragment =~ nosmp || $fragment =~ lockdep || $fragment =~ kasan || $fragment =~ kfence ]]; then + qemu_to=$(( $qemu_to * 10 )) + fi +else + if [[ $fragment =~ lockdep ]]; then + qemu_to=$(( $qemu_to * 10 )) + fi +fi + +if [[ $config =~ kselftest ]]; then + qemu_to=$((2 * 24 * 3600)) # 40h +fi + +qemu_log=${tmp}/qemu.log +qemu_bios=${ci_root}/firmware/${xlen}/fw_dynamic.bin +qemu_kernel=$(fw_to_qemu $hw $fw $vmlinuz) +qemu_cpu=$(cpu_to_qemu $cpu) + +qemu_acpi=off +if [[ ${hw} == "acpi" ]]; then + qemu_acpi=on + qemu_kernel_append="${qemu_kernel_append} acpi=force" +fi +qemu_aia=none +if [[ ${cpu} == "server64" || ${cpu} == "max64" ]]; then + qemu_aia="aplic-imsic" +fi + +export TIMEFORMAT="took qemu %0R" +time qemu_${xlen} ${qemu_to} ${qemu_log} ${qemu_bios} ${qemu_kernel} ${qemu_cpu} ${qemu_acpi} ${qemu_aia} ${qemu_image} + +export TIMEFORMAT="took check_shutdown %0R" +time check_shutdown $qemu_image || rc=$? +exit $rc diff --git a/.github/scripts/series/test_only_defconfig.sh b/.github/scripts/series/test_only_defconfig.sh new file mode 100755 index 00000000000000..b7551995268bef --- /dev/null +++ b/.github/scripts/series/test_only_defconfig.sh @@ -0,0 +1,15 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2024 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -euo pipefail + +d=$(dirname "${BASH_SOURCE[0]}") +. $d/utils.sh + +$d/unpack_fw.sh + +rc=0 +${d}/kernel_tester.sh rv64 defconfig plain gcc ubuntu || rc=1 +exit $rc diff --git a/.github/scripts/series/test_only_kselftest.sh b/.github/scripts/series/test_only_kselftest.sh new file mode 100755 index 00000000000000..0663895a19555d --- /dev/null +++ b/.github/scripts/series/test_only_kselftest.sh @@ -0,0 +1,26 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2023 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -euo pipefail + +d=$(dirname "${BASH_SOURCE[0]}") +. $d/utils.sh +. $d/kselftest_prep.sh + +$d/unpack_fw.sh +rc=0 + +logs=$(get_logs_dir) +subtests=${logs}/kselftest-collections.txt +readarray -t kselftest_subtests < ${subtests} + +parallel_log=$(mktemp -p ${ci_root}) + +for subtest in "${kselftest_subtests[@]}"; do + echo "${d}/kernel_tester.sh rv64 ${subtest} plain gcc ubuntu" +done | parallel -j$(($(nproc)/8)) --colsep ' ' --joblog ${parallel_log} || true + +cat ${parallel_log} +rm ${parallel_log} diff --git a/.github/scripts/series/tuxrun_to_squad_json.py b/.github/scripts/series/tuxrun_to_squad_json.py new file mode 100644 index 00000000000000..434c5ed78d3bc4 --- /dev/null +++ b/.github/scripts/series/tuxrun_to_squad_json.py @@ -0,0 +1,54 @@ +import argparse +import json + +""" +Turn +{ + "testsuiteA": { + "test1": {} + }, + "testsuiteB": { + "test1": {} + } +} + +into + +{ + "testsuiteA/test1": {} + "testsuiteB/test1": {} +} + +which is what is expected by Squad. +""" + +def parse_args(): + parser = argparse.ArgumentParser(description = 'Output Squad tests results for tuxrun LTP') + parser.add_argument("--result-path", default = "", + help = 'Path to the tuxrun JSON result file') + parser.add_argument("--testsuite", default = "", + help = 'Testsuite name') + + return parser.parse_args() + +def generate_squad_json(result_path, testsuite): + dict_results = {} + + with open(result_path, "r") as f: + dict_initial = json.loads(f.read()) + + # Search only the first dimension for keys starting with "ltp-" + for k, v in dict_initial.items(): + if k.startswith(testsuite): + for ltp_key, ltp_value in v.items(): + dict_results[k + "/" + ltp_key] = ltp_value + + print(dict_results) + + with open(result_path.replace(".json", ".squad.json"), "w") as f: + json.dump(dict_results, f) + +if __name__ == "__main__": + args = parse_args() + generate_squad_json(args.result_path, args.testsuite) + diff --git a/.github/scripts/series/unpack_fw.sh b/.github/scripts/series/unpack_fw.sh new file mode 100755 index 00000000000000..6a6114ad556ba0 --- /dev/null +++ b/.github/scripts/series/unpack_fw.sh @@ -0,0 +1,25 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2023 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -euo pipefail +shopt -s extglob + +d=$(dirname "${BASH_SOURCE[0]}") +. $d/utils.sh + +firmware_dir=${ci_root}/firmware + +fw_rv32_opensbi=$(echo ${ci_fw_root}/firmware_rv32_opensbi_+([a-f0-9]).tar.zst) +fw_rv64_opensbi=$(echo ${ci_fw_root}/firmware_rv64_opensbi_+([a-f0-9]).tar.zst) +fw_rv64_uboot=$(echo ${ci_fw_root}/firmware_rv64_uboot_+([a-f0-9]).tar.zst) +fw_rv64_uboot_acpi=$(echo ${ci_fw_root}/firmware_rv64_uboot_acpi_+([a-f0-9]).tar.zst) + +mkdir -p ${firmware_dir}/rv32 +mkdir -p ${firmware_dir}/rv64 + +tar -C ${firmware_dir}/rv32 -xf $fw_rv32_opensbi +tar -C ${firmware_dir}/rv64 -xf $fw_rv64_opensbi +tar -C ${firmware_dir}/rv64 -xf $fw_rv64_uboot +tar -C ${firmware_dir}/rv64 -xf $fw_rv64_uboot_acpi diff --git a/.github/scripts/series/utils.sh b/.github/scripts/series/utils.sh new file mode 100644 index 00000000000000..55b5e008fcef30 --- /dev/null +++ b/.github/scripts/series/utils.sh @@ -0,0 +1,48 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2024 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +ci_root=${CI_ROOT:-"/build"} +ci_triple=${CI_TRIPLE:-"riscv64-linux"} +ci_patches=${CI_PATCHES:-"$d/patches"} +ci_fw_root=${CI_FW_ROOT:-"/firmware"} +ci_rootfs_root=${CI_ROOTFS_ROOT:-"/rootfs"} + +ci_test_selftests=1 + +apply_patches() { + if [[ -d ${ci_patches} ]]; then + if ls ${ci_patches}/*.patch &> /dev/null; then + for i in ${ci_patches}/*.patch; do + if git apply --check -q $i; then + git apply --index -q $i + fi + done + fi + fi + git commit --allow-empty -m "OOT" +} + +unapply_patches() { + git reset --hard HEAD^ +} + +gen_kernel_name() { + local xlen=$1 + local config=$2 + local fragment=$3 + local toolchain=$4 + + if [[ "$config" =~ ^kselftest ]]; then + config="kselftest" + fi + + echo "${xlen}__${config}__$(basename $fragment)__${toolchain}" +} + +get_logs_dir() { + logs=${ci_root}/logs + mkdir -p ${logs} + echo ${logs} +} diff --git a/.github/scripts/sync.sh b/.github/scripts/sync.sh new file mode 100755 index 00000000000000..6a92064f85134c --- /dev/null +++ b/.github/scripts/sync.sh @@ -0,0 +1,122 @@ +#!/bin/bash + +set -euo pipefail + +# Assumptions: +# Run from git source tree, e.g. /build/linux +# +# This script syncs remote "upstream" branches to the local git repo. +# The script will create a $ORIGIN_BRANCH, which is a clone of of the +# upstream $UPSTREAM_BRANCH, and a $WORKFLOW_BRANCH which is the +# upstream with the latest CI applied as on commit on top. +# +# Subsequent jobs will use these branches, e.g. to run Patchwork CI. + +echo "Environment Variables:" +echo " Workflow: ${GITHUB_WORKFLOW:-notset}" +echo " Action: ${GITHUB_ACTION:-notset}" +echo " Actor: ${GITHUB_ACTOR:-notset}" +echo " Repository: ${GITHUB_REPOSITORY:-notset}" +echo " Event-name: ${GITHUB_EVENT_NAME:-notset}" +echo " Event-path: ${GITHUB_EVENT_PATH:-notset}" +echo " Workspace: ${GITHUB_WORKSPACE:-notset}" +echo " SHA: ${GITHUB_SHA:-notset}" +echo " REF: ${GITHUB_REF:-notset}" +echo " HEAD-REF: ${GITHUB_HEAD_REF:-notset}" +echo " BASE-REF: ${GITHUB_BASE_REF:-notset}" +echo " PWD: $(pwd)" +echo " Repo: ${GITHUB_REPOSITORY:-notset}" + +tmpdir=$(mktemp -d -p /build) + +cleanup() { + git remote remove upstream + echo "bye $tmpdir" + rm -rf $tmpdir +} + +trap cleanup EXIT + +# e.g. "git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git" +UPSTREAM_REPO=$1 +# e.g. "master" +UPSTREAM_BRANCH=$2 +# e.g. "master" +ORIGIN_BRANCH=$3 +# e.g. workflow +WORKFLOW_BRANCH=$4 +#e.g. https://github.com/linux-riscv/github-ci.git +CI_REPO=$5 + +echo ">>> Setup repo" +echo "$ git remote set-url origin $GITHUB_REPOSITORY" +git remote set-url origin "https://$GITHUB_ACTOR:$ACTION_TOKEN@github.com/$GITHUB_REPOSITORY" +echo "$ git remote add upstream $UPSTREAM_REPO" +git remote add upstream "$UPSTREAM_REPO" +echo "$ git fetch upstream $UPSTREAM_BRANCH" +git fetch upstream --tags $UPSTREAM_BRANCH + +echo ">>> Check Origin and Upstream" +if git rev-parse --verify --quiet origin/$ORIGIN_BRANCH &>/dev/null; then + ORIGIN_HEAD=$(git log -1 --format=%H origin/$ORIGIN_BRANCH) +else + ORIGIN_HEAD=noneexisting +fi +echo "ORIGIN_HEAD: $ORIGIN_HEAD" +UPSTREAM_HEAD=$(git log -1 --format=%H upstream/$UPSTREAM_BRANCH) +echo "UPSTREAM_HEAD: $UPSTREAM_HEAD" + +if [[ "$ORIGIN_HEAD" != "$UPSTREAM_HEAD" ]]; then + echo "Repos are NOT synced. Need to merge..." + echo ">>> Sync origin with upstream" + echo "$ git remote set-branches origin *" + git remote set-branches origin '*' + echo "$ git fetch origin" + git fetch origin + echo "$ git push -f origin refs/remotes/upstream/$UPSTREAM_BRANCH:refs/heads/$ORIGIN_BRANCH" + git push -f origin "refs/remotes/upstream/$UPSTREAM_BRANCH:refs/heads/$ORIGIN_BRANCH" + echo "$ git push -f origin refs/tags/*" + git push -f origin "refs/tags/*" +fi + +echo ">>> Prepare CI repo for workflow" +echo "$ git clone $CI_REPO $tmpdir/ci" +git clone $CI_REPO $tmpdir/ci + +if ! git rev-parse --verify --quiet origin/$WORKFLOW_BRANCH &>/dev/null; then + echo "$ git checkout -B $ORIGIN_BRANCH origin/$ORIGIN_BRANCH" + git checkout -B $ORIGIN_BRANCH origin/$ORIGIN_BRANCH +else + echo "$ git checkout -B $WORKFLOW_BRANCH origin/$WORKFLOW_BRANCH" + git checkout -B $WORKFLOW_BRANCH origin/$WORKFLOW_BRANCH +fi + +update() { + echo "$ git checkout -B $WORKFLOW_BRANCH origin/$ORIGIN_BRANCH" + git checkout -B $WORKFLOW_BRANCH origin/$ORIGIN_BRANCH + echo "$ cp -R $tmpdir/ci/.github ." + cp -R $tmpdir/ci/.github . + echo "$ git add --all --force .github" + git add --all --force .github + echo "$ git commit --all --message \"Adding CI files\"" + git commit --all --message "Adding CI files" + echo "$ git branch" + git branch + echo "$ git push -f origin $WORKFLOW_BRANCH" + git push -f origin $WORKFLOW_BRANCH +} + +if ! git diff --no-index .github -- $tmpdir/ci/.github &> /dev/null; then + echo ">>> Workflow has changed, pulling in" + update +fi + +master_commit=$(git log -1 --format=%H origin/$ORIGIN_BRANCH) +workflow_commit=$(git log -1 --format=%H origin/${WORKFLOW_BRANCH}^) +echo ">>> Assert master/workflow commits are same: $master_commit $workflow_commit" +if [[ "$master_commit" != "$workflow_commit" ]]; then + echo ">>> Updating workflow" + update +fi + +echo ">>> Done Exit" diff --git a/.github/scripts/sync_patchwork.py b/.github/scripts/sync_patchwork.py new file mode 100755 index 00000000000000..cc8c5d34f4dfd3 --- /dev/null +++ b/.github/scripts/sync_patchwork.py @@ -0,0 +1,452 @@ +#!/usr/bin/env python3 +# -*- coding: utf-8 -*- +import os +import sys +import json +import re +import argparse +import tempfile + +from github import Github + +from libs import init_logger, log_debug, log_error, log_info, pr_get_sid +from libs import Patchwork, GithubTool, RepoTool, EmailTool, Context + +def patch_get_new_file_list(patch): + """ + Parse patch to get the file that is newly added + """ + + file_list = [] + + # If patch has no contents, return empty file + if patch == None: + log_error("WARNING: No file found in patch") + return file_list + + # split patch(in string) to list of string by newline + lines = patch.split('\n') + iter_lines = iter(lines) + for line in iter_lines: + try: + if re.search(r'^\-\-\- ', line): + if line.find('dev/null') >= 0: + # Detect new file. Read next line to get the filename + line2 = next(iter_lines) + file_list.append(line2[line2.find('/')+1:]) + except StopIteration: + # End of iteration or no next line. Nothing to do. Just pass + pass + + log_debug(f"New file in the patch: {file_list}") + + return file_list + +def patch_get_file_list(patch): + """ + Parse patch to get the file list + """ + + file_list = [] + + # If patch has no contents, return empty file + if patch == None: + log_error("WARNING: No file found in patch") + return file_list + + # split patch(in string) to list of string by newline + lines = patch.split('\n') + for line in lines: + # Use --- (before) instead of +++ (after). + # If new file is added, --- is /dev/null and can be ignored + # If file is removed, file in --- still exists in the tree + # The corner case is if the patch adds new files. Even in this case + # even if new files are ignored, Makefile should be changed as well + # so it still can be checked. + if re.search(r'^\-\-\- ', line): + # For new file, it should be dev/null. Ignore the file. + if line.find('dev/null') >= 0: + log_debug("New file is added. Ignore in the file list") + continue + + # Trim the '--- /' + file_list.append(line[line.find('/')+1:]) + + log_debug(f"files found in the patch: {file_list}") + + return file_list + +def series_get_file_list(ci_data, series, ignore_new_file=False): + """ + Get the list of files from the patches in the series. + """ + + file_list = [] + new_file_list = [] + + for patch in series['patches']: + full_patch = ci_data.pw.get_patch(patch['id']) + file_list += patch_get_file_list(full_patch['diff']) + if ignore_new_file: + new_file_list += patch_get_new_file_list(full_patch['diff']) + + if ignore_new_file == False or len(new_file_list) == 0: + return file_list + + log_debug("Check if new file is in the file list") + new_list = [] + for filename in file_list: + if filename in new_file_list: + log_debug(f"file:{filename} is in new_file_list. Don't count.") + continue + new_list.append(filename) + + return new_list + +def filter_repo_space(ci_data, space_details, series, src_dir): + """ + Check if the series belong to this repository + + if the series[name] has exclude string + return False + if the series[name] has include string + return True + get file list from the patch in series + if the file exist + return True + else + return False + """ + + log_debug(f"Check repo space for this series[{series['id']}]") + + # Check Exclude string + for str in space_details['exclude']: + if re.search(str, series['name'], re.IGNORECASE): + log_debug(f"Found EXCLUDE string: {str}") + return False + + # Check Include string + for str in space_details['include']: + if re.search(str, series['name'], re.IGNORECASE): + log_debug(f"Found INCLUDE string: {str}") + return True + + # Skip the rest of the test for now + return True + + # Get file list from the patches in the series + file_list = series_get_file_list(ci_data, series, ignore_new_file=True) + if len(file_list) == 0: + # Something is not right. + log_error("ERROR: No files found in the series/patch") + return False + log_debug(f"Files in series={file_list}") + + # File exist in source tree? + for filename in file_list: + file_path = os.path.join(src_dir, filename) + if not os.path.exists(file_path): + log_error(f"File not found: {filename}") + return False + + # Files exist in the source tree + log_info("Files exist in the source tree.") + return True + +EMAIL_MESSAGE = '''This is an automated email and please do not reply to this email. + +Dear Submitter, + +Thank you for submitting the patches to the Linux RISC-V mailing list. + +While preparing the CI tests, the patches you submitted couldn't be +applied to any of the current repository workflow branches. + +----- Output ----- +{content} + +Please resolve the issue and submit the patches again. + +--- +Regards, +Linux RISC-V bot + +''' + +def is_maintainers_only(email_config): + if 'only-maintainers' in email_config and email_config['only-maintainers']: + return True + return False + +def get_receivers(email_config, submitter): + log_debug("Get the list of email receivers") + + receivers = [] + if is_maintainers_only(email_config): + # Send only to the maintainers + receivers.extend(email_config['maintainers']) + else: + # Send to default-to and submitter + receivers.append(email_config['default-to']) + receivers.append(submitter) + + return receivers + +def send_email(ci_data, series, content): + + headers = {} + email_config = ci_data.config['email'] + + body = EMAIL_MESSAGE.format(content=content) + + patch_1 = series['patches'][0] + headers['In-Reply-To'] = patch_1['msgid'] + headers['References'] = patch_1['msgid'] + + if not is_maintainers_only(email_config): + headers['Reply-To'] = email_config['default-to'] + + receivers = get_receivers(email_config, + series['submitter']['email']) + ci_data.email.set_receivers(receivers) + + ci_data.email.compose(f"Re: {series['name']}", body, headers) + + if ci_data.config['dry_run']: + log_info("Dry-Run: Skip sending email") + return + + log_info("Sending Email...") + ci_data.email.send() + +PR_BODY = '''PR for series {sid} applied to {branch} + +Name: {name} +URL: {url} +Version: {version} +''' + +def series_check_patches(ci_data, series): + + series_dir = os.path.join(ci_data.config['temp_root'], f"{series['id']}") + if not os.path.exists(series_dir): + os.makedirs(series_dir) + + series_mbox = ci_data.pw.get_series_mbox(series['id']) + series_mbox_file = os.path.join(series_dir, "series.mbox") + with open(series_mbox_file, "w") as f: + f.write(series_mbox) + + already_checked = False + patch_1 = ci_data.pw.get_patch(series['patches'][0]['id']) + if patch_1['check'] != 'pending': + already_checked = True + log_info("This series is already checked") + + applied_branch = None + content = "" + for branch in ci_data.config['branch']: + ci_data.src_repo.git_checkout(branch); + ci_data.src_repo.git_checkout(f"pw{series['id']}", create_branch=True) + if ci_data.src_repo.git_am(series_mbox_file): + log_info(f"Failed to apply series {series['id']} to {branch}") + content += f"Failed to apply series {series['id']} to {branch}:\n\n" + content += ci_data.src_repo.stdout + content += ci_data.src_repo.stderr + content += "\n---\n" + ci_data.src_repo.git_am(abort=True) + continue + + log_info(f"Applied series {series['id']} to {branch}") + applied_branch = branch + # git am success + break + + if not applied_branch: + if ci_data.config['dry_run'] or already_checked: + log_info(f"Skip submitting the result to PW") + else: + url = ci_data.gh.create_gist(f"pw{series['id']}", "pre-ci_am-FAILED", content) + for patch in series['patches']: + ci_data.pw.post_check(patch, "pre-ci_am", 3, "Failed to apply series", + url=url) + + log_info("PRE-CI AM failed. Notify the submitter") + if ci_data.config['dry_run'] or already_checked: + log_info(f"Skip sending email: {content}") + return False + + send_email(ci_data, series, content) + return False + + if ci_data.config['disable_pr']: + log_info("Disable PR: Skip creating PR") + return True + + # Create Pull Request + if ci_data.src_repo.git_push(f"pw{series['id']}"): + log_error("Failed to push the source to Github") + return False + + title = f"[PW_SID:{series['id']}] {series['name']}" + + pr_body = PR_BODY.format(sid=series['id'], branch=applied_branch, name=series['name'], + url=series['web_url'], version=series['version']) + log_info(f"Creating PR: {title}") + if (pr := ci_data.gh.create_pr(title, pr_body, applied_branch, f"pw{series['id']}")): + if ci_data.config['dry_run'] or already_checked: + log_info("Skip submitting the result to PW: Success") + else: + for patch in series['patches']: + ci_data.pw.post_check(patch, "pre-ci_am", 1, "Success", url=pr.html_url) + + return True + + return False + +def run_series(ci_data, new_series): + + log_debug("##### Processing Series #####") + + space_details = ci_data.config['space_details'][ci_data.config['space']] + + # Process the series + for series in new_series: + log_info(f"\n### Process Series: {series['id']} ###") + + # If the series subject doesn't have the key-str, ignore it. + # Sometimes, the name have null value. If that's the case, use the + # name from the first patch and update to series name + if series['name'] == None: + patch_1 = series['patches'][0] + series['name'] = patch_1['name'] + log_debug(f"updated series name: {series['name']}") + + if not series['received_all']: + log_info(f"Series is NOT fully received") + continue + + # Filter the series by include/exclude string + if not filter_repo_space(ci_data, space_details, series, + ci_data.src_dir): + log_info(f"Series is NOT for this repo") + continue + + # Check if PR already exist + if ci_data.gh.pr_exist_title(f"PW_SID:{series['id']}"): + log_info("PR exists already") + continue + + # This series is ready to create PR + series_check_patches(ci_data, series) + + log_debug("##### processing Series Done #####") + +def sid_in_series_list(sid, series_list): + + log_debug(f"Search PW SID({sid} in the series list") + for series in series_list: + if int(sid) == series['id']: + log_debug("Found matching PW_SID in series list") + return series + + log_debug("No found matching PW_SID in series list") + + return None + +def cleanup_pullrequest(ci_data, new_series): + + log_debug("##### Clean Up Pull Request #####") + + prs = ci_data.gh.get_prs(force=True) + log_debug(f"Current PR: {prs}") + for pr in prs: + log_debug(f"PR: {pr}") + pw_sid = pr_get_sid(pr.title) + if not pw_sid: + log_debug(f"Not a valid PR title: {pr.title}. Skip PR") + continue + + log_debug(f"PW_SID: {pw_sid}") + + if sid_in_series_list(pw_sid, new_series): + log_debug(f"PW_SID:{pw_sid} found in PR list. Keep PR") + continue + + log_debug(f"PW_SID:{pw_sid} not found in PR list. Close PR") + + ci_data.gh.close_pr(pr.number) + + log_debug("##### Clean Up Pull Request Done #####") + +def check_args(args): + + if not os.path.exists(os.path.abspath(args.config)): + log_error(f"Invalid parameter(config) {args.config}") + return False + + if not os.path.exists(os.path.abspath(args.src_dir)): + log_error(f"Invalid parameter(src_dir) {args.src_dir}") + return False + + args.branch = args.branch or ["workflow"] + return True + +def parse_args(): + ap = argparse.ArgumentParser(description= + "Manage patch series in Patchwork and create PR") + ap.add_argument('-c', '--config', default='./config.json', + help='Configuration file to use') + ap.add_argument("-b", "--branch", default=None, action="append", + help="Name of branch in base_repo where the PR is pushed. " + "Use format. i.e. workflow") + ap.add_argument('-s', '--src-dir', required=True, + help='Source directory') + ap.add_argument('-d', '--dry-run', action='store_true', default=False, + help='Run it without uploading the result') + ap.add_argument('-p', '--disable-pr', action='store_true', default=False, + help='Disable creating pull request') + + ap.add_argument("repo", + help="Name of Github repository. i.e. linux-riscv/linux-riscv") + return ap.parse_args() + +def main(): + + init_logger("SyncPatchwork", verbose=True) + + args = parse_args() + if not check_args(args): + sys.exit(1) + + # Set temp workspace + temp_root = tempfile.TemporaryDirectory().name + log_info(f"Temp Root Dir: {temp_root}") + + ci_data = Context(config_file=os.path.abspath(args.config), + github_repo=args.repo, + src_dir=args.src_dir, + branch=args.branch, + space='kernel', + dry_run=args.dry_run, + disable_pr=args.disable_pr, + temp_root=temp_root) + + + # Process the series, state 1 = NEW + new_series = ci_data.pw.get_series_by_state(1, days_lookback=7) + if len(new_series) == 0: + log_info("No new patches/series found. Done. Exit") + return + + # Process Series + run_series(ci_data, new_series) + + # Cleanup PR + cleanup_pullrequest(ci_data, new_series) + + log_debug("----- DONE -----") + +if __name__ == "__main__": + main() diff --git a/.github/scripts/xfstests.sh b/.github/scripts/xfstests.sh new file mode 100755 index 00000000000000..11555ff4fc760f --- /dev/null +++ b/.github/scripts/xfstests.sh @@ -0,0 +1,43 @@ +#!/bin/bash +# SPDX-FileCopyrightText: 2025 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +set -euox pipefail +d=$(dirname "${BASH_SOURCE[0]}") +. $d/series/utils.sh + +logs=$(get_logs_dir) +f=${logs}/xfstests.log + +KERNEL_PATH=$(find "$1" -name '*vmlinu[zx]*') +mv $KERNEL_PATH $KERNEL_PATH.gz +gunzip $KERNEL_PATH.gz + +ROOTFS_PATH=$(find /rootfs/ -name 'rootfs_rv64_ubuntu*.ext4') + +build_name=$(cat "$1/kernel_version") + +# The Docker image comes with a prebuilt python environment with all tuxrun +# dependencies +source /build/.env/bin/activate + +xfs_tests=( "xfstests-ext4" "xfstests-btrfs" "xfstests-f2fs" "xfstests-xfs" ) + +mkdir -p /build/squad_json/ +parallel_log=$(mktemp -p ${ci_root}) + +for xfs_test in ${xfs_tests[@]}; do + echo "/build/tuxrun/run --runtime null --device qemu-riscv64 --kernel $KERNEL_PATH --tests ${xfs_test} --results /build/squad_json/${xfs_test}.json --log-file-text /build/squad_json/${xfs_test}.log --timeouts ${xfs_test}=480 --overlay /build/xfstests.tar.xz --rootfs $ROOTFS_PATH --boot-args \"rw\" || true" +done | parallel -j $(($(nproc)/4)) --colsep ' ' --joblog ${parallel_log} + +cat ${parallel_log} +rm ${parallel_log} + +for xfs_test in ${xfs_tests[@]}; do + # Convert JSON to squad datamodel + python3 /build/my-linux/.github/scripts/series/tuxrun_to_squad_json.py --result-path /build/squad_json/${xfs_test}.json --testsuite ${xfs_test} + python3 /build/my-linux/.github/scripts/series/generate_metadata.py --logs-path /build/squad_json/ --job-url ${GITHUB_JOB_URL} --branch ${GITHUB_BRANCH_NAME} + + curl --header "Authorization: token $SQUAD_TOKEN" --form tests=@/build/squad_json/${xfs_test}.squad.json --form log=@/build/squad_json/${xfs_test}.log --form metadata=@/build/squad_json/metadata.json https://squad.di.riseproject.dev/api/submit/riscv-linux/linux-all/${build_name}/qemu +done diff --git a/.github/workflows/kselftest.yml b/.github/workflows/kselftest.yml new file mode 100644 index 00000000000000..cf71d6d410b4fe --- /dev/null +++ b/.github/workflows/kselftest.yml @@ -0,0 +1,59 @@ +# SPDX-FileCopyrightText: 2024 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +name: linux-riscv-ci-kselftest + +defaults: + run: + shell: bash -leo pipefail {0} + +on: pull_request + +concurrency: + group: ci-test-${{ github.workflow }}-${{ github.ref_name }} + cancel-in-progress: true + +jobs: + build-series: + if: ${{ startsWith(github.head_ref, 'linus') || endsWith(github.head_ref, '_manual') }} + runs-on: self-hosted + timeout-minutes: 50400 # 35 days + container: + image: ghcr.io/linux-riscv/pw-builder:latest + volumes: + - /home/github/ramdisk/build:/build + - /home/github/ccache:/build/ccache + - /home/github/gitref:/build/gitref + steps: + - name: Configure git + run: | + git config --global --add safe.directory '*' + - name: Checkout git + run: | + mkdir -p /build/my-linux + cd /build/my-linux + git clone --filter=tree:0 --reference /build/gitref https://github.com/${{ github.repository }} . + git fetch origin ${{ github.event.pull_request.head.sha }} + git reset --hard ${{ github.event.pull_request.head.sha }} + git log -1 + - name: Run checks + continue-on-error: true + run: | + cd /build/my-linux && bash .github/scripts/kselftest.sh + - name: Collect logs + uses: actions/upload-artifact@v4 + with: + name: test-logs + path: /build/logs/* + - name: Publish to SQUAD + env: + SQUAD_TOKEN: ${{ secrets.SQUAD_TOKEN }} + GITHUB_JOB_URL: ${{ github.server_url }}/${{ github.repository }}/actions/runs/${{ github.run_id }} + run: | + /build/my-linux/.github/scripts/series/post_to_squad.py \ + --toplevel-log=/build/logs/kselftest.log \ + --selftest-bpf-log=/build/logs/test_kernel___rv64__kselftest__plain__gcc___ubuntu___server64__uboot_uefi__dt__kselftest-bpf.log \ + --selftest-log-dir=/build/logs/ \ + --job-url="${GITHUB_JOB_URL}" \ + --branch="${{ github.head_ref || github.ref_name }}" diff --git a/.github/workflows/patchwork.yml b/.github/workflows/patchwork.yml new file mode 100644 index 00000000000000..593de064624f8d --- /dev/null +++ b/.github/workflows/patchwork.yml @@ -0,0 +1,64 @@ +# SPDX-FileCopyrightText: 2023 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +name: patchwork + +defaults: + run: + shell: bash -leo pipefail {0} + +on: pull_request + +concurrency: + group: ci-test-${{ github.workflow }}-${{ github.ref_name }} + cancel-in-progress: true + +jobs: + patchwork_ci: + if: ${{ startsWith(github.head_ref, 'pw') }} + runs-on: self-hosted + timeout-minutes: 50400 # 35 days + container: + image: ghcr.io/linux-riscv/pw-builder:latest + volumes: + - /home/github/ramdisk/build:/build + - /home/github/ccache:/build/ccache + - /home/github/gitref:/build/gitref + steps: + - name: Configure git + run: | + git config --global --add safe.directory '*' + git config --global user.name "Linux RISC-V bot" + git config --global user.email "linux.riscv.bot@gmail.com" + + - name: Checkout git + run: | + mkdir -p /build/linux + cd /build/linux + git clone --filter=tree:0 --reference /build/gitref https://github.com/${{ github.repository }} . + git fetch origin ${{ github.event.pull_request.head.sha }} + git reset --hard ${{ github.event.pull_request.head.sha }} + git log -1 + + - name: Create and activate virtual environment + run: | + python -m venv venv + source venv/bin/activate + echo "PATH=$PATH" >> $GITHUB_ENV + + - name: Install dependencies + run: | + pip install -r /build/linux/.github/scripts/requirements.txt + + - name: Run checks + env: + GITHUB_TOKEN: ${{ secrets.ACTION_TOKEN }} + GIST_TOKEN: ${{ secrets.GIST_TOKEN }} + PATCHWORK_TOKEN: ${{ secrets.PATCHWORK_TOKEN }} + PATCHWORK_USER: "" + EMAIL_TOKEN: ${{ secrets.EMAIL_TOKEN }} + run: | + cd /build/linux + ./.github/scripts/pw_ci.py -c ./.github/scripts/config.json -s /build/linux linux-riscv/linux + diff --git a/.github/workflows/series.yml b/.github/workflows/series.yml new file mode 100644 index 00000000000000..ba62596b47a899 --- /dev/null +++ b/.github/workflows/series.yml @@ -0,0 +1,52 @@ +# SPDX-FileCopyrightText: 2023 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +name: linux-riscv-ci-series + +defaults: + run: + shell: bash -leo pipefail {0} + +on: pull_request + +concurrency: + group: ci-test-${{ github.workflow }}-${{ github.ref_name }} + cancel-in-progress: true + +jobs: + build-series: + if: ${{ endsWith(github.head_ref, '_test') || endsWith(github.head_ref, '_manual') }} + runs-on: self-hosted + timeout-minutes: 50400 # 35 days + container: + image: ghcr.io/linux-riscv/pw-builder:latest + volumes: + - /home/github/ramdisk/build:/build + - /home/github/ccache:/build/ccache + - /home/github/gitref:/build/gitref + steps: + - name: Configure git + run: | + git config --global --add safe.directory '*' + - name: Checkout git + run: | + mkdir -p /build/my-linux + cd /build/my-linux + git clone --filter=tree:0 --reference /build/gitref https://github.com/${{ github.repository }} . + git fetch origin ${{ github.event.pull_request.head.sha }} + git reset --hard ${{ github.event.pull_request.head.sha }} + git log -1 + - name: Run checks + env: + SQUAD_TOKEN: ${{ secrets.SQUAD_TOKEN }} + GITHUB_JOB_URL: ${{ github.server_url }}/${{ github.repository }}/actions/runs/${{ github.run_id }} + GITHUB_BRANCH_NAME: ${{ github.head_ref || github.ref_name }} + continue-on-error: true + run: | + cd /build/my-linux && bash .github/scripts/series.sh + - name: Collect logs + uses: actions/upload-artifact@v4 + with: + name: test-logs + path: /build/logs/* diff --git a/.github/workflows/sync.yml b/.github/workflows/sync.yml new file mode 100644 index 00000000000000..f787f02e3a866c --- /dev/null +++ b/.github/workflows/sync.yml @@ -0,0 +1,82 @@ +name: sync + +defaults: + run: + shell: bash -leo pipefail {0} + +on: + schedule: + - cron: "*/30 * * * *" + workflow_dispatch: + +concurrency: + group: ci-test-${{ github.workflow }}-${{ github.ref_name }} + +jobs: + sync_repo: + runs-on: ubuntu-latest + container: + image: ghcr.io/linux-riscv/pw-builder:latest + volumes: + - /home/github/ramdisk/build:/build + - /home/github/ccache:/build/ccache + - /home/github/gitref:/build/gitref + steps: + - name: Configure git + run: | + git config --global --add safe.directory '*' + git config --global user.name "Linux RISC-V bot" + git config --global user.email "linux.riscv.bot@gmail.com" + - name: Checkout git + run: | + mkdir -p /build/linux + cd /build/linux + git clone https://github.com/${{ github.repository }} . + git log --oneline -4 + - name: Sync Linus master + env: + ACTION_TOKEN: ${{ secrets.ACTION_TOKEN }} + run: | + cd /build/linux + ./.github/scripts/sync.sh "git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git" master master workflow "https://github.com/linux-riscv/github-ci.git" + - name: Sync RISC-V for-next + env: + ACTION_TOKEN: ${{ secrets.ACTION_TOKEN }} + run: | + cd /build/linux + ./.github/scripts/sync.sh "git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git" for-next master__riscv__for-next workflow__riscv__for-next "https://github.com/linux-riscv/github-ci.git" + - name: Sync RISC-V fixes + env: + ACTION_TOKEN: ${{ secrets.ACTION_TOKEN }} + run: | + cd /build/linux + ./.github/scripts/sync.sh "git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git" fixes master__riscv__fixes workflow__riscv__fixes "https://github.com/linux-riscv/github-ci.git" + + - name: Create and activate virtual environment + run: | + python -m venv venv + source venv/bin/activate + echo "PATH=$PATH" >> $GITHUB_ENV + + - name: Install dependencies + run: | + pip install -r /build/linux/.github/scripts/requirements.txt + + - name: Sync Patchwork + env: + GITHUB_TOKEN: ${{ secrets.ACTION_TOKEN }} + GIST_TOKEN: ${{ secrets.GIST_TOKEN }} + PATCHWORK_TOKEN: ${{ secrets.PATCHWORK_TOKEN }} + PATCHWORK_USER: "" + EMAIL_TOKEN: ${{ secrets.EMAIL_TOKEN }} + run: | + cd /build/linux + ./.github/scripts/sync_patchwork.py -c ./.github/scripts/config.json -s /build/linux -b workflow__riscv__fixes -b workflow__riscv__for-next -b workflow linux-riscv/linux + + - name: Clean PRs + env: + GITHUB_TOKEN: ${{ secrets.ACTION_TOKEN }} + GIST_TOKEN: ${{ secrets.GIST_TOKEN }} + run: | + cd /build/linux + ./.github/scripts/cleanup_pr.py linux-riscv/linux diff --git a/.github/workflows/testsuites.yml b/.github/workflows/testsuites.yml new file mode 100644 index 00000000000000..5844fc7d747cee --- /dev/null +++ b/.github/workflows/testsuites.yml @@ -0,0 +1,174 @@ +# SPDX-FileCopyrightText: 2024 Rivos Inc. +# +# SPDX-License-Identifier: Apache-2.0 + +name: linux-riscv-ci-testsuites + +defaults: + run: + shell: bash -leo pipefail {0} + +on: pull_request + +concurrency: + group: ci-test-${{ github.workflow }}-${{ github.ref_name }} + cancel-in-progress: true + +jobs: + build-kernel: + if: ${{ endsWith(github.head_ref, '_manual') }} + runs-on: self-hosted + timeout-minutes: 50400 # 35 days + container: + image: ghcr.io/linux-riscv/linaro-tuxrun-dispatcher-riscv64:latest + volumes: + - /home/github/ccache:/build/ccache + - /home/github/gitref:/build/gitref + steps: + - name: Configure git + run: | + git config --global --add safe.directory '*' + - name: Checkout git + run: | + mkdir -p /build/my-linux + cd /build/my-linux + git clone --filter=tree:0 --reference /build/gitref https://github.com/${{ github.repository }} . + git fetch origin ${{ github.event.pull_request.head.sha }} + git reset --hard ${{ github.event.pull_request.head.sha }} + git log -1 + - name: Build kernel + continue-on-error: true + run: | + mkdir -p /build/logs/ + cd /build/my-linux && bash .github/scripts/build_ubuntu_defconfig.sh + - name: Collect build log + uses: actions/upload-artifact@v4 + with: + name: test-logs + path: /build/logs/* + - name: Publish kernel + uses: actions/upload-artifact@v4 + # TODO create modules directory and kernel separately + with: + name: test-kernel + path: /build/rv64__testsuites__plain__gcc/* + - name: Publish CI files + uses: actions/upload-artifact@v4 + with: + include-hidden-files: true + name: ci-files + path: /build/my-linux/.github/* + + run-ltp: + needs: build-kernel + if: ${{ endsWith(github.head_ref, '_manual') }} + runs-on: self-hosted + timeout-minutes: 50400 # 35 days + container: + image: ghcr.io/linux-riscv/linaro-tuxrun-dispatcher-riscv64:latest + volumes: + - /home/github/ccache:/build/ccache + - /home/github/gitref:/build/gitref + - /tmp:/tmp + steps: + - name: Download pre-built kernel + uses: actions/download-artifact@v4 + with: + name: test-kernel + path: /build/test-kernel + - name: Download CI files + uses: actions/download-artifact@v4 + with: + name: ci-files + path: /build/my-linux/.github + - name: Run checks + env: + SQUAD_TOKEN: ${{ secrets.SQUAD_TOKEN }} + GITHUB_JOB_URL: ${{ github.server_url }}/${{ github.repository }}/actions/runs/${{ github.run_id }} + GITHUB_BRANCH_NAME: ${{ github.head_ref || github.ref_name }} + run: | + mkdir -p /build/logs/ + cd /build/my-linux && bash .github/scripts/ltp.sh /build/test-kernel | tee -i /build/logs/all.log + - name: Collect logs and json squad + uses: actions/upload-artifact@v4 + with: + name: test-logs-ltp + path: | + /build/logs/* + /build/squad_json/* + + run-libhugetlbfs: + needs: build-kernel + if: ${{ endsWith(github.head_ref, '_manual') }} + runs-on: self-hosted + timeout-minutes: 50400 # 35 days + container: + image: ghcr.io/linux-riscv/linaro-tuxrun-dispatcher-riscv64:latest + volumes: + - /home/github/ccache:/build/ccache + - /home/github/gitref:/build/gitref + - /tmp:/tmp + steps: + - name: Download pre-built kernel + uses: actions/download-artifact@v4 + with: + name: test-kernel + path: /build/test-kernel + - name: Download CI files + uses: actions/download-artifact@v4 + with: + name: ci-files + path: /build/my-linux/.github + - name: Run checks + env: + SQUAD_TOKEN: ${{ secrets.SQUAD_TOKEN }} + GITHUB_JOB_URL: ${{ github.server_url }}/${{ github.repository }}/actions/runs/${{ github.run_id }} + GITHUB_BRANCH_NAME: ${{ github.head_ref || github.ref_name }} + run: | + mkdir -p /build/logs/ + cd /build/my-linux && bash .github/scripts/libhugetlbfs.sh /build/test-kernel | tee -i /build/logs/all.log + - name: Collect logs and json squad + uses: actions/upload-artifact@v4 + with: + name: test-logs-libhugetlbfs + path: | + /build/logs/* + /build/squad_json/* + + run-xfstests: + needs: build-kernel + if: ${{ endsWith(github.head_ref, '_manual') }} + runs-on: self-hosted + timeout-minutes: 50400 # 35 days + container: + image: ghcr.io/linux-riscv/linaro-tuxrun-dispatcher-riscv64:latest + volumes: + - /home/github/ccache:/build/ccache + - /home/github/gitref:/build/gitref + - /tmp:/tmp + steps: + - name: Download pre-built kernel + uses: actions/download-artifact@v4 + with: + name: test-kernel + path: /build/test-kernel + - name: Download CI files + uses: actions/download-artifact@v4 + with: + name: ci-files + path: /build/my-linux/.github + - name: Run checks + env: + SQUAD_TOKEN: ${{ secrets.SQUAD_TOKEN }} + GITHUB_JOB_URL: ${{ github.server_url }}/${{ github.repository }}/actions/runs/${{ github.run_id }} + GITHUB_BRANCH_NAME: ${{ github.head_ref || github.ref_name }} + run: | + mkdir -p /build/logs/ + cd /build/my-linux && bash .github/scripts/xfstests.sh /build/test-kernel | tee -i /build/logs/all.log + - name: Collect logs and json squad + uses: actions/upload-artifact@v4 + with: + name: test-logs-xfstests + path: | + /build/logs/* + /build/squad_json/* From 038898a543a0b403e4aaeabd5ed29d5c4c2fe347 Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Sun, 10 May 2026 22:10:57 -0700 Subject: [PATCH 02/19] dt-bindings: riscv: Add Ssqosid extension description Document the ratified Supervisor-mode Quality of Service ID (Ssqosid) extension v1.0. Link: https://github.com/riscv/riscv-ssqosid/releases/tag/v1.0 Acked-by: Conor Dooley Signed-off-by: Drew Fustini Signed-off-by: Linux RISC-V bot --- Documentation/devicetree/bindings/riscv/extensions.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index 2b0a8a93bb2144..1c6f091518d49a 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -232,6 +232,12 @@ properties: ratified at commit d70011dde6c2 ("Update to ratified state") of riscv-j-extension. + - const: ssqosid + description: | + The standard Ssqosid extension for Quality of Service ID is + ratified as v1.0 in commit d9c616497fde ("Merge pull + request #7 from ved-rivos/Ratified") of riscv-ssqosid. + - const: ssstateen description: | The standard Ssstateen extension for supervisor-mode view of the From 5884e2744d73e60244279f89a7c8a06c4b889b55 Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Sun, 10 May 2026 22:10:58 -0700 Subject: [PATCH 03/19] riscv: detect the Ssqosid extension MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Ssqosid is the RISC-V Quality-of-Service (QoS) Identifiers specification which defines the Supervisor Resource Management Configuration (srmcfg) register. Link: https://github.com/riscv/riscv-ssqosid/releases/tag/v1.0 Co-developed-by: Kornel DulÄ™ba Signed-off-by: Kornel DulÄ™ba Signed-off-by: Drew Fustini Signed-off-by: Linux RISC-V bot --- arch/riscv/include/asm/hwcap.h | 1 + arch/riscv/kernel/cpufeature.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h index 7ef8e5f55c8dcf..b83dae5cebb992 100644 --- a/arch/riscv/include/asm/hwcap.h +++ b/arch/riscv/include/asm/hwcap.h @@ -112,6 +112,7 @@ #define RISCV_ISA_EXT_ZCLSD 103 #define RISCV_ISA_EXT_ZICFILP 104 #define RISCV_ISA_EXT_ZICFISS 105 +#define RISCV_ISA_EXT_SSQOSID 106 #define RISCV_ISA_EXT_XLINUXENVCFG 127 diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index f46aa5602d74d3..668a7e71ff1c64 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -582,6 +582,7 @@ const struct riscv_isa_ext_data riscv_isa_ext[] = { __RISCV_ISA_EXT_DATA(ssaia, RISCV_ISA_EXT_SSAIA), __RISCV_ISA_EXT_DATA(sscofpmf, RISCV_ISA_EXT_SSCOFPMF), __RISCV_ISA_EXT_SUPERSET(ssnpm, RISCV_ISA_EXT_SSNPM, riscv_xlinuxenvcfg_exts), + __RISCV_ISA_EXT_DATA(ssqosid, RISCV_ISA_EXT_SSQOSID), __RISCV_ISA_EXT_DATA(sstc, RISCV_ISA_EXT_SSTC), __RISCV_ISA_EXT_DATA(svade, RISCV_ISA_EXT_SVADE), __RISCV_ISA_EXT_DATA_VALIDATE(svadu, RISCV_ISA_EXT_SVADU, riscv_ext_svadu_validate), From 675434dc3937ae8244402589f58efca8be8f78ed Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Sun, 10 May 2026 22:10:59 -0700 Subject: [PATCH 04/19] riscv: add support for srmcfg CSR from Ssqosid extension MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add support for the srmcfg CSR defined in the Ssqosid ISA extension. The CSR contains two fields: - Resource Control ID (RCID) for resource allocation - Monitoring Counter ID (MCID) for tracking resource usage Requests from a hart to shared resources are tagged with these IDs, allowing resource usage to be associated with the running task. Add a srmcfg field to thread_struct with the same format as the CSR so the scheduler can set the RCID and MCID for each task on context switch. A per-cpu cpu_srmcfg variable mirrors the CSR state to avoid redundant writes. L1D-hot memory access is faster than a CSR read and avoids traps under virtualization. A per-cpu cpu_srmcfg_default holds the default srmcfg for each CPU as set by resctrl CPU group assignment. On context switch, if the next task belongs to the default resource group (srmcfg == 0), the CPU's default value is used instead. This implements resctrl allocation rule 2: default-group tasks on a CPU assigned to a specific group receive that group's allocations. Link: https://github.com/riscv/riscv-ssqosid/releases/tag/v1.0 Assisted-by: Claude:claude-opus-4-7 Co-developed-by: Kornel DulÄ™ba Signed-off-by: Kornel DulÄ™ba Signed-off-by: Drew Fustini Signed-off-by: Linux RISC-V bot --- MAINTAINERS | 8 ++++ arch/riscv/Kconfig | 18 +++++++++ arch/riscv/include/asm/csr.h | 5 +++ arch/riscv/include/asm/processor.h | 3 ++ arch/riscv/include/asm/qos.h | 64 ++++++++++++++++++++++++++++++ arch/riscv/include/asm/switch_to.h | 3 ++ arch/riscv/kernel/Makefile | 2 + arch/riscv/kernel/qos.c | 49 +++++++++++++++++++++++ 8 files changed, 152 insertions(+) create mode 100644 arch/riscv/include/asm/qos.h create mode 100644 arch/riscv/kernel/qos.c diff --git a/MAINTAINERS b/MAINTAINERS index 2fb1c75afd1638..c6534d6efc20ef 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -22972,6 +22972,14 @@ F: drivers/perf/riscv_pmu.c F: drivers/perf/riscv_pmu_legacy.c F: drivers/perf/riscv_pmu_sbi.c +RISC-V QOS RESCTRL SUPPORT +M: Drew Fustini +R: yunhui cui +L: linux-riscv@lists.infradead.org +S: Supported +F: arch/riscv/include/asm/qos.h +F: arch/riscv/kernel/qos.c + RISC-V RPMI AND MPXY DRIVERS M: Rahul Pathak M: Anup Patel diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index d235396c451413..a7e87c49be2192 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -591,6 +591,24 @@ config RISCV_ISA_SVNAPOT If you don't know what to do here, say Y. +config RISCV_ISA_SSQOSID + bool "Ssqosid extension support for supervisor mode Quality of Service ID" + depends on 64BIT + default n + help + Adds support for the Ssqosid ISA extension (Supervisor-mode + Quality of Service ID). + + Ssqosid defines the srmcfg CSR which allows the system to tag the + running process with an RCID (Resource Control ID) and MCID + (Monitoring Counter ID). The RCID is used to determine resource + allocation. The MCID is used to track resource usage in event + counters. + + For example, a cache controller may use the RCID to apply a + cache partitioning scheme and use the MCID to track how much + cache a process, or a group of processes, is using. + config RISCV_ISA_SVPBMT bool "Svpbmt extension support for supervisor mode page-based memory types" depends on 64BIT && MMU diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index 31b8988f4488da..7bce928e5daa09 100644 --- a/arch/riscv/include/asm/csr.h +++ b/arch/riscv/include/asm/csr.h @@ -84,6 +84,10 @@ #define SATP_ASID_MASK _AC(0xFFFF, UL) #endif +/* SRMCFG fields */ +#define SRMCFG_RCID_MASK GENMASK(11, 0) +#define SRMCFG_MCID_MASK GENMASK(27, 16) + /* Exception cause high bit - is an interrupt if set */ #define CAUSE_IRQ_FLAG (_AC(1, UL) << (__riscv_xlen - 1)) @@ -328,6 +332,7 @@ #define CSR_STVAL 0x143 #define CSR_SIP 0x144 #define CSR_SATP 0x180 +#define CSR_SRMCFG 0x181 #define CSR_STIMECMP 0x14D #define CSR_STIMECMPH 0x15D diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h index 812517b2cec135..49a386d74cd3f0 100644 --- a/arch/riscv/include/asm/processor.h +++ b/arch/riscv/include/asm/processor.h @@ -123,6 +123,9 @@ struct thread_struct { /* A forced icache flush is not needed if migrating to the previous cpu. */ unsigned int prev_cpu; #endif +#ifdef CONFIG_RISCV_ISA_SSQOSID + u32 srmcfg; +#endif }; /* Whitelist the fstate from the task_struct for hardened usercopy */ diff --git a/arch/riscv/include/asm/qos.h b/arch/riscv/include/asm/qos.h new file mode 100644 index 00000000000000..6988fe37551eec --- /dev/null +++ b/arch/riscv/include/asm/qos.h @@ -0,0 +1,64 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _ASM_RISCV_QOS_H +#define _ASM_RISCV_QOS_H + +#include + +#ifdef CONFIG_RISCV_ISA_SSQOSID + +#include +#include + +#include +#include +#include + +/* cached value of srmcfg csr for each cpu */ +DECLARE_PER_CPU(u32, cpu_srmcfg); + +/* default srmcfg value for each cpu, set via resctrl cpu assignment */ +DECLARE_PER_CPU(u32, cpu_srmcfg_default); + +static inline void __switch_to_srmcfg(struct task_struct *next) +{ + u32 thread_srmcfg; + + thread_srmcfg = READ_ONCE(next->thread.srmcfg); + + /* Default-group tasks (thread.srmcfg == 0) follow this CPU's default. */ + if (thread_srmcfg == 0) + thread_srmcfg = __this_cpu_read(cpu_srmcfg_default); + + if (thread_srmcfg != __this_cpu_read(cpu_srmcfg)) { + /* + * Drain stores from the outgoing task before the CSR write + * so they retain the previous RCID/MCID tag at the cache + * interconnect. + */ + RISCV_FENCE(rw, o); + + __this_cpu_write(cpu_srmcfg, thread_srmcfg); + csr_write(CSR_SRMCFG, thread_srmcfg); + /* + * Order the csrw before the new task's loads/stores so they + * pick up the new tag. Zicsr 6.1.1 makes CSR writes weakly + * ordered (device-output) vs memory ops. Ssqosid v1.0 is + * silent so honor the general CSR rule. + */ + RISCV_FENCE(o, rw); + } +} + +static __always_inline bool has_srmcfg(void) +{ + return riscv_has_extension_unlikely(RISCV_ISA_EXT_SSQOSID); +} + +#else /* ! CONFIG_RISCV_ISA_SSQOSID */ + +struct task_struct; +static __always_inline bool has_srmcfg(void) { return false; } +static inline void __switch_to_srmcfg(struct task_struct *next) { } + +#endif /* CONFIG_RISCV_ISA_SSQOSID */ +#endif /* _ASM_RISCV_QOS_H */ diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h index 0e71eb82f920ca..1c7ea53ec012ad 100644 --- a/arch/riscv/include/asm/switch_to.h +++ b/arch/riscv/include/asm/switch_to.h @@ -14,6 +14,7 @@ #include #include #include +#include #ifdef CONFIG_FPU extern void __fstate_save(struct task_struct *save_to); @@ -119,6 +120,8 @@ do { \ __switch_to_fpu(__prev, __next); \ if (has_vector() || has_xtheadvector()) \ __switch_to_vector(__prev, __next); \ + if (has_srmcfg()) \ + __switch_to_srmcfg(__next); \ if (switch_to_should_flush_icache(__next)) \ local_flush_icache_all(); \ __switch_to_envcfg(__next); \ diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile index cabb99cadfb6d1..ebe1c3588177b4 100644 --- a/arch/riscv/kernel/Makefile +++ b/arch/riscv/kernel/Makefile @@ -128,3 +128,5 @@ obj-$(CONFIG_ACPI_NUMA) += acpi_numa.o obj-$(CONFIG_GENERIC_CPU_VULNERABILITIES) += bugs.o obj-$(CONFIG_RISCV_USER_CFI) += usercfi.o + +obj-$(CONFIG_RISCV_ISA_SSQOSID) += qos.o diff --git a/arch/riscv/kernel/qos.c b/arch/riscv/kernel/qos.c new file mode 100644 index 00000000000000..75bda2ed89e1fc --- /dev/null +++ b/arch/riscv/kernel/qos.c @@ -0,0 +1,49 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include +#include +#include +#include + +#include +#include +#include + +/* cached value of srmcfg csr for each cpu */ +DEFINE_PER_CPU(u32, cpu_srmcfg); + +/* default srmcfg value for each cpu, set via resctrl cpu assignment */ +DEFINE_PER_CPU(u32, cpu_srmcfg_default); + +/* + * Seed the per-CPU srmcfg cache to a sentinel that no real srmcfg encoding + * can produce (MCID << 16 | RCID, both fields well under 16 bits) so the + * next __switch_to_srmcfg() unconditionally writes the CSR. Ssqosid v1.0 + * leaves CSR state across hart stop/start implementation-defined, so the + * cached value cannot be trusted after online. + */ +static int riscv_srmcfg_online(unsigned int cpu) +{ + per_cpu(cpu_srmcfg, cpu) = U32_MAX; + return 0; +} + +static int __init riscv_srmcfg_init(void) +{ + unsigned int cpu; + int err; + + if (!riscv_has_extension_unlikely(RISCV_ISA_EXT_SSQOSID)) + return 0; + + /* Seed already-online CPUs. The cpuhp callback covers later onlines. */ + for_each_online_cpu(cpu) + per_cpu(cpu_srmcfg, cpu) = U32_MAX; + + err = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "riscv/srmcfg:online", + riscv_srmcfg_online, NULL); + if (err < 0) + pr_warn("srmcfg cpuhp registration failed (%d), cpus brought online after boot will not invalidate the CSR_SRMCFG cache\n", + err); + return err; +} +arch_initcall(riscv_srmcfg_init); From 68bbd14a8c95202e1dbe0dfa99196eb9a9e551b6 Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Sun, 10 May 2026 22:11:00 -0700 Subject: [PATCH 05/19] fs/resctrl: Add resctrl_is_membw() helper Four sites in fs/resctrl distinguish bandwidth resources (MBA, SMBA) from cache resources by explicit rid match: fs/resctrl/ctrlmondata.c parse_line() fs/resctrl/rdtgroup.c rdtgroup_mode_test_exclusive() fs/resctrl/rdtgroup.c rdtgroup_size_show() fs/resctrl/rdtgroup.c rdtgroup_init_alloc() Replace the open-coded MBA/SMBA tests with a single resctrl_is_membw() helper keyed on schema_fmt (RESCTRL_SCHEMA_RANGE). No functional change: every existing RESCTRL_SCHEMA_RANGE resource is MBA or SMBA today. This isolates fs/resctrl from the addition of further bandwidth resource types so the four call sites do not have to be updated for each new rid. Assisted-by: Claude:claude-opus-4-7 Signed-off-by: Drew Fustini Signed-off-by: Linux RISC-V bot --- fs/resctrl/ctrlmondata.c | 3 +-- fs/resctrl/internal.h | 2 ++ fs/resctrl/rdtgroup.c | 14 +++++++++----- 3 files changed, 12 insertions(+), 7 deletions(-) diff --git a/fs/resctrl/ctrlmondata.c b/fs/resctrl/ctrlmondata.c index 9a7dfc48cb2e29..d9f05270094155 100644 --- a/fs/resctrl/ctrlmondata.c +++ b/fs/resctrl/ctrlmondata.c @@ -245,8 +245,7 @@ static int parse_line(char *line, struct resctrl_schema *s, if (WARN_ON_ONCE(!parse_ctrlval)) return -EINVAL; - if (rdtgrp->mode == RDT_MODE_PSEUDO_LOCKSETUP && - (r->rid == RDT_RESOURCE_MBA || r->rid == RDT_RESOURCE_SMBA)) { + if (rdtgrp->mode == RDT_MODE_PSEUDO_LOCKSETUP && resctrl_is_membw(r)) { rdt_last_cmd_puts("Cannot pseudo-lock MBA resource\n"); return -EINVAL; } diff --git a/fs/resctrl/internal.h b/fs/resctrl/internal.h index 1a9b29119f88f8..76187987b2ee46 100644 --- a/fs/resctrl/internal.h +++ b/fs/resctrl/internal.h @@ -397,6 +397,8 @@ void mbm_handle_overflow(struct work_struct *work); bool is_mba_sc(struct rdt_resource *r); +bool resctrl_is_membw(struct rdt_resource *r); + void cqm_setup_limbo_handler(struct rdt_l3_mon_domain *dom, unsigned long delay_ms, int exclude_cpu); diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c index 5dfdaa6f9d8ff6..0f331bf5ce8268 100644 --- a/fs/resctrl/rdtgroup.c +++ b/fs/resctrl/rdtgroup.c @@ -1412,7 +1412,7 @@ static bool rdtgroup_mode_test_exclusive(struct rdtgroup *rdtgrp) list_for_each_entry(s, &resctrl_schema_all, list) { r = s->res; - if (r->rid == RDT_RESOURCE_MBA || r->rid == RDT_RESOURCE_SMBA) + if (resctrl_is_membw(r)) continue; has_cache = true; list_for_each_entry(d, &r->ctrl_domains, hdr.list) { @@ -1555,6 +1555,12 @@ bool is_mba_sc(struct rdt_resource *r) return r->membw.mba_sc; } +/* RANGE schema is bandwidth (MBA/SMBA). BITMAP is cache. */ +bool resctrl_is_membw(struct rdt_resource *r) +{ + return r->schema_fmt == RESCTRL_SCHEMA_RANGE; +} + /* * rdtgroup_size_show - Display size in bytes of allocated regions * @@ -1616,8 +1622,7 @@ static int rdtgroup_size_show(struct kernfs_open_file *of, ctrl = resctrl_arch_get_config(r, d, closid, type); - if (r->rid == RDT_RESOURCE_MBA || - r->rid == RDT_RESOURCE_SMBA) + if (resctrl_is_membw(r)) size = ctrl; else size = rdtgroup_cbm_to_size(r, d, ctrl); @@ -3648,8 +3653,7 @@ static int rdtgroup_init_alloc(struct rdtgroup *rdtgrp) list_for_each_entry(s, &resctrl_schema_all, list) { r = s->res; - if (r->rid == RDT_RESOURCE_MBA || - r->rid == RDT_RESOURCE_SMBA) { + if (resctrl_is_membw(r)) { rdtgroup_init_mba(r, rdtgrp->closid); if (is_mba_sc(r)) continue; From fd86042b0e5f703b1850bc3523c5756c6f5a8047 Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Sun, 10 May 2026 22:11:01 -0700 Subject: [PATCH 06/19] fs/resctrl: Add RDT_RESOURCE_MB_MIN and RDT_RESOURCE_MB_WGHT Introduce bandwidth controls which are semantically different from the throttle-based MB resource: - RDT_RESOURCE_MB_MIN: minimum reserved bandwidth - RDT_RESOURCE_MB_WGHT: weighted share of unreserved bandwidth Assisted-by: Claude:claude-opus-4-7 Signed-off-by: Drew Fustini Signed-off-by: Linux RISC-V bot --- fs/resctrl/rdtgroup.c | 4 +++- include/linux/resctrl.h | 2 ++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c index 0f331bf5ce8268..02733b11e115ea 100644 --- a/fs/resctrl/rdtgroup.c +++ b/fs/resctrl/rdtgroup.c @@ -1555,7 +1555,7 @@ bool is_mba_sc(struct rdt_resource *r) return r->membw.mba_sc; } -/* RANGE schema is bandwidth (MBA/SMBA). BITMAP is cache. */ +/* RANGE schema is bandwidth (MBA/SMBA/MB_MIN/MB_WGHT). BITMAP is cache. */ bool resctrl_is_membw(struct rdt_resource *r) { return r->schema_fmt == RESCTRL_SCHEMA_RANGE; @@ -2402,6 +2402,8 @@ static unsigned long fflags_from_resource(struct rdt_resource *r) return RFTYPE_RES_CACHE; case RDT_RESOURCE_MBA: case RDT_RESOURCE_SMBA: + case RDT_RESOURCE_MB_MIN: + case RDT_RESOURCE_MB_WGHT: return RFTYPE_RES_MB; case RDT_RESOURCE_PERF_PKG: return RFTYPE_RES_PERF_PKG; diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index 006e57fd7ca589..9529ed0d1fdf2c 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -53,6 +53,8 @@ enum resctrl_res_level { RDT_RESOURCE_L2, RDT_RESOURCE_MBA, RDT_RESOURCE_SMBA, + RDT_RESOURCE_MB_MIN, + RDT_RESOURCE_MB_WGHT, RDT_RESOURCE_PERF_PKG, /* Must be the last */ From b5d7604ceb176a14752b5558e9dd091168f1416c Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Sun, 10 May 2026 22:11:02 -0700 Subject: [PATCH 07/19] fs/resctrl: Let bandwidth resources default to min_bw at reset Bandwidth resources reset to max_bw on group creation today, which is the right default for MBA and SMBA. However, it is the wrong default for hardware whose registers form a sum-constrained reservation: defaulting every new group to max_bw would immediately violate the sum on the first mkdir. When default_to_min is set, resctrl_get_default_ctrl() returns min_bw for the resource. The existing MBA and SMBA behavior is not changed. Assisted-by: Claude:claude-opus-4-7 Signed-off-by: Drew Fustini Signed-off-by: Linux RISC-V bot --- include/linux/resctrl.h | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index 9529ed0d1fdf2c..bcbc166412ef13 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -247,7 +247,13 @@ enum membw_throttle_mode { /** * struct resctrl_membw - Memory bandwidth allocation related data * @min_bw: Minimum memory bandwidth percentage user can request - * @max_bw: Maximum memory bandwidth value, used as the reset value + * @max_bw: Maximum memory bandwidth value a group can be + * configured with + * @default_to_min: When true, the default control value for new + * groups and reset is @min_bw instead of @max_bw. + * Drivers whose hardware enforces a sum constraint + * across groups (e.g. CBQRI MB_MIN) set this so + * mkdir does not overflow the sum. * @bw_gran: Granularity at which the memory bandwidth is allocated * @delay_linear: True if memory B/W delay is in linear scale * @arch_needs_linear: True if we can't configure non-linear resources @@ -259,6 +265,7 @@ enum membw_throttle_mode { struct resctrl_membw { u32 min_bw; u32 max_bw; + bool default_to_min; u32 bw_gran; u32 delay_linear; bool arch_needs_linear; @@ -405,7 +412,7 @@ static inline u32 resctrl_get_default_ctrl(struct rdt_resource *r) case RESCTRL_SCHEMA_BITMAP: return BIT_MASK(r->cache.cbm_len) - 1; case RESCTRL_SCHEMA_RANGE: - return r->membw.max_bw; + return r->membw.default_to_min ? r->membw.min_bw : r->membw.max_bw; } return WARN_ON_ONCE(1); From 0a5c8c18634afc27d6b1399b0a15c468e9dc6be1 Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Sun, 10 May 2026 22:11:03 -0700 Subject: [PATCH 08/19] riscv_cbqri: Add capacity controller probe and allocation device ops Add support for the RISC-V CBQRI capacity controller (CC). The firmware discovery layer (ACPI or DT) is responsible for passing the cbqri_controller_info descriptor to riscv_cbqri_register_controller(). The driver resolves the cpumask so callers do not need the cacheinfo topology. Each CC op is a sleeping read-poll-write-verify cycle on cc_alloc_ctl. readq_poll_timeout() keeps preemption enabled so the driver is safe under PREEMPT_RT. A sticky ctrl->faulted short-circuits subsequent ops on a stuck controller. AT-capable controllers with CDP off mirror the cbm into both DATA and CODE halves so the spec's reserved-zero AT field cannot diverge. Assisted-by: Claude:claude-opus-4-7 Co-developed-by: Adrien Ricciardi Signed-off-by: Adrien Ricciardi Signed-off-by: Drew Fustini Signed-off-by: Linux RISC-V bot --- MAINTAINERS | 3 + drivers/resctrl/Kconfig | 28 ++ drivers/resctrl/Makefile | 5 + drivers/resctrl/cbqri_devices.c | 534 +++++++++++++++++++++++++++++++ drivers/resctrl/cbqri_internal.h | 125 ++++++++ include/linux/riscv_cbqri.h | 66 ++++ 6 files changed, 761 insertions(+) create mode 100644 drivers/resctrl/cbqri_devices.c create mode 100644 drivers/resctrl/cbqri_internal.h create mode 100644 include/linux/riscv_cbqri.h diff --git a/MAINTAINERS b/MAINTAINERS index c6534d6efc20ef..86fc6620392b2d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -22979,6 +22979,9 @@ L: linux-riscv@lists.infradead.org S: Supported F: arch/riscv/include/asm/qos.h F: arch/riscv/kernel/qos.c +F: drivers/resctrl/cbqri_devices.c +F: drivers/resctrl/cbqri_internal.h +F: include/linux/riscv_cbqri.h RISC-V RPMI AND MPXY DRIVERS M: Rahul Pathak diff --git a/drivers/resctrl/Kconfig b/drivers/resctrl/Kconfig index 672abea3b03ccb..d578bc7aed8509 100644 --- a/drivers/resctrl/Kconfig +++ b/drivers/resctrl/Kconfig @@ -29,3 +29,31 @@ config ARM64_MPAM_RESCTRL_FS default y if ARM64_MPAM_DRIVER && RESCTRL_FS select RESCTRL_RMID_DEPENDS_ON_CLOSID select RESCTRL_ASSIGN_FIXED + +menuconfig RISCV_CBQRI_DRIVER + bool "RISC-V CBQRI driver" + depends on RISCV && RISCV_ISA_SSQOSID + help + Capacity and Bandwidth QoS Register Interface (CBQRI) driver + for RISC-V cache and memory-controller QoS resources. CBQRI + exposes capacity allocation, bandwidth reservation, weighted + bandwidth share, and per-MCID monitoring counters through the + resctrl filesystem at /sys/fs/resctrl when RESCTRL_FS is also + enabled. + + RISCV_ISA_SSQOSID provides the srmcfg CSR that tags each hart's + memory traffic with the RCID and MCID consumed by CBQRI + controllers. + +if RISCV_CBQRI_DRIVER + +config RISCV_CBQRI_DRIVER_DEBUG + bool "Enable debug messages from the CBQRI driver" + help + Say yes here to enable debug messages from the CBQRI driver. + + This adds pr_debug() output covering controller probe and + per-controller registration steps. Useful when bringing up a + new platform; otherwise leave disabled to avoid log noise. + +endif diff --git a/drivers/resctrl/Makefile b/drivers/resctrl/Makefile index 4f6d0e81f9b8f3..28085036d895cd 100644 --- a/drivers/resctrl/Makefile +++ b/drivers/resctrl/Makefile @@ -3,3 +3,8 @@ mpam-y += mpam_devices.o mpam-$(CONFIG_ARM64_MPAM_RESCTRL_FS) += mpam_resctrl.o ccflags-$(CONFIG_ARM64_MPAM_DRIVER_DEBUG) += -DDEBUG + +obj-$(CONFIG_RISCV_CBQRI_DRIVER) += cbqri.o +cbqri-y += cbqri_devices.o + +ccflags-$(CONFIG_RISCV_CBQRI_DRIVER_DEBUG) += -DDEBUG diff --git a/drivers/resctrl/cbqri_devices.c b/drivers/resctrl/cbqri_devices.c new file mode 100644 index 00000000000000..dc76a146e34df7 --- /dev/null +++ b/drivers/resctrl/cbqri_devices.c @@ -0,0 +1,534 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#define pr_fmt(fmt) "%s:%s: " fmt, KBUILD_MODNAME, __func__ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "cbqri_internal.h" + +LIST_HEAD(cbqri_controllers); + +/* Set capacity block mask (cc_block_mask) */ +static void cbqri_set_cbm(struct cbqri_controller *ctrl, u64 cbm) +{ + iowrite64(cbm, ctrl->base + CBQRI_CC_BLOCK_MASK_OFF); +} + +static int cbqri_wait_busy_flag(struct cbqri_controller *ctrl, int reg_offset, + u64 *regp) +{ + u64 reg; + int ret; + + /* + * Sleeping poll: caller holds ctrl->lock as a sleeping mutex, so + * 10us/1ms is safe under PREEMPT_RT. + */ + ret = readq_poll_timeout(ctrl->base + reg_offset, reg, + !FIELD_GET(CBQRI_CONTROL_REGISTERS_BUSY_MASK, reg), + 10, 1000); + if (ret) { + /* Mark faulted so subsequent ops fail fast instead of repeating the 1ms wait. */ + ctrl->faulted = true; + return ret; + } + /* + * Clear any prior fault: probe-time paths do not gate on ->faulted, + * so a transient early-boot stall self-heals once the controller + * next responds. + */ + ctrl->faulted = false; + if (regp) + *regp = reg; + return 0; +} + +/* + * Perform capacity allocation control operation on capacity controller. + * Caller must hold ctrl->lock. + */ +static int cbqri_cc_alloc_op(struct cbqri_controller *ctrl, int operation, + int rcid, enum cbqri_at at) +{ + int reg_offset = CBQRI_CC_ALLOC_CTL_OFF; + int status; + u64 reg; + + lockdep_assert_held(&ctrl->lock); + + if (ctrl->faulted) + return -EIO; + + if (cbqri_wait_busy_flag(ctrl, reg_offset, ®) < 0) { + pr_err_ratelimited("BUSY timeout before starting operation\n"); + return -EIO; + } + FIELD_MODIFY(CBQRI_CONTROL_REGISTERS_OP_MASK, ®, operation); + FIELD_MODIFY(CBQRI_CONTROL_REGISTERS_RCID_MASK, ®, rcid); + + /* + * CBQRI Table 1: AT 0=Data, 1=Code. Program AT on controllers + * that report supports_alloc_at_code. On controllers that don't, + * AT is reserved-zero and the op acts on both halves. + */ + reg &= ~CBQRI_CONTROL_REGISTERS_AT_MASK; + if (ctrl->cc.supports_alloc_at_code) + reg |= FIELD_PREP(CBQRI_CONTROL_REGISTERS_AT_MASK, at); + + iowrite64(reg, ctrl->base + reg_offset); + + if (cbqri_wait_busy_flag(ctrl, reg_offset, ®) < 0) { + pr_err_ratelimited("BUSY timeout during operation\n"); + return -EIO; + } + + status = FIELD_GET(CBQRI_CONTROL_REGISTERS_STATUS_MASK, reg); + if (status != CBQRI_CC_ALLOC_CTL_STATUS_SUCCESS) { + pr_err_ratelimited("operation %d failed: status=%d\n", operation, status); + return -EIO; + } + + return 0; +} + +/* + * Apply a capacity block mask and verify via CONFIG_LIMIT + READ_LIMIT. + * + * AT-capable controllers with CDP off need a second CONFIG_LIMIT on the + * other AT half (the spec encodes AT only as 0=Data / 1=Code, there is + * no "both halves" value). CDP-on issues separate per-type writes from + * resctrl, so a single CONFIG_LIMIT per call is correct. + */ +int cbqri_apply_cache_config(struct cbqri_controller *ctrl, u32 closid, + const struct cbqri_cc_config *cfg) +{ + bool need_at_mirror; + u64 saved_cbm = 0; + int err = 0; + u64 reg; + + mutex_lock(&ctrl->lock); + + need_at_mirror = ctrl->cc.supports_alloc_at_code && !cfg->cdp_enabled; + + /* + * Capture the cfg->at half CBM before any write so a partial + * AT-mirror failure can revert and keep the two halves consistent. + */ + if (need_at_mirror) { + err = cbqri_cc_alloc_op(ctrl, CBQRI_CC_ALLOC_CTL_OP_READ_LIMIT, + closid, cfg->at); + if (err < 0) + goto out; + saved_cbm = ioread64(ctrl->base + CBQRI_CC_BLOCK_MASK_OFF); + } + + /* Set capacity block mask (cc_block_mask) */ + cbqri_set_cbm(ctrl, cfg->cbm); + + /* Capacity config limit operation for the AT half implied by cfg->at */ + err = cbqri_cc_alloc_op(ctrl, CBQRI_CC_ALLOC_CTL_OP_CONFIG_LIMIT, + closid, cfg->at); + if (err < 0) + goto out; + + /* + * CDP-off mirror: on AT-capable controllers, also program the + * other AT half with the same mask so the two halves stay in sync. + */ + if (need_at_mirror) { + enum cbqri_at other = (cfg->at == CBQRI_AT_CODE) ? + CBQRI_AT_DATA : CBQRI_AT_CODE; + + cbqri_set_cbm(ctrl, cfg->cbm); + err = cbqri_cc_alloc_op(ctrl, + CBQRI_CC_ALLOC_CTL_OP_CONFIG_LIMIT, + closid, other); + if (err < 0) { + int rerr; + + /* + * Best-effort revert of the cfg->at half so the two + * halves stay in sync. A schemata read sees only one + * half, so silent divergence would otherwise report + * the new value as if the write had succeeded. + */ + cbqri_set_cbm(ctrl, saved_cbm); + rerr = cbqri_cc_alloc_op(ctrl, + CBQRI_CC_ALLOC_CTL_OP_CONFIG_LIMIT, + closid, cfg->at); + if (rerr < 0) + pr_err_ratelimited("AT-mirror revert failed (err=%d), AT halves diverged\n", + rerr); + goto out; + } + } + + /* Clear cc_block_mask before read limit to verify op works */ + cbqri_set_cbm(ctrl, 0); + + /* Perform a capacity read limit operation to verify blockmask */ + err = cbqri_cc_alloc_op(ctrl, CBQRI_CC_ALLOC_CTL_OP_READ_LIMIT, + closid, cfg->at); + if (err < 0) + goto out; + + /* + * Read capacity blockmask and narrow to u32 to match resctrl's CBM + * width. cbqri_probe_cc() rejects ncblks > 32 so the upper bits are + * reserved zero. + */ + reg = ioread64(ctrl->base + CBQRI_CC_BLOCK_MASK_OFF); + if (lower_32_bits(reg) != cfg->cbm) { + pr_err_ratelimited("CBM verify mismatch (reg=%llx != cbm=%llx)\n", + reg, cfg->cbm); + err = -EIO; + } + +out: + mutex_unlock(&ctrl->lock); + return err; +} + +/* + * Read the configured CBM for closid on the at half via READ_LIMIT. + * Pre-clears cc_block_mask before the op so a silent firmware no-op + * (status SUCCESS but staging not updated) is detectable in cbm_out. + */ +int cbqri_read_cache_config(struct cbqri_controller *ctrl, u32 closid, + enum cbqri_at at, u32 *cbm_out) +{ + int err; + + mutex_lock(&ctrl->lock); + cbqri_set_cbm(ctrl, 0); + err = cbqri_cc_alloc_op(ctrl, CBQRI_CC_ALLOC_CTL_OP_READ_LIMIT, closid, at); + if (err == 0) { + /* + * cc_block_mask is a 64-bit MMIO register. resctrl exposes the + * CBM as a u32. cbqri_probe_cc() rejects ncblks > 32 so the + * upper 32 bits are reserved zero by the spec. Narrow + * explicitly via lower_32_bits() so the assumption is visible + * at the read site. + */ + *cbm_out = lower_32_bits(ioread64(ctrl->base + CBQRI_CC_BLOCK_MASK_OFF)); + } + mutex_unlock(&ctrl->lock); + return err; +} + +static int cbqri_probe_feature(struct cbqri_controller *ctrl, int reg_offset, + int operation, int *status, bool *access_type_supported) +{ + u64 reg, saved_reg; + int at; + + /* + * Default the output to false so the status==0 (feature not + * implemented) path returns a deterministic value to the caller + * rather than leaving an uninitialized bool. + */ + *access_type_supported = false; + + /* Keep the initial register value to preserve the WPRI fields */ + reg = ioread64(ctrl->base + reg_offset); + saved_reg = reg; + + /* Drain any in-flight firmware op before issuing our own write. */ + if (cbqri_wait_busy_flag(ctrl, reg_offset, &saved_reg) < 0) { + pr_err("BUSY timeout before probe operation\n"); + return -EIO; + } + reg = saved_reg; + + /* Execute the requested operation to find if the register is implemented */ + FIELD_MODIFY(CBQRI_CONTROL_REGISTERS_OP_MASK, ®, operation); + reg &= ~CBQRI_CONTROL_REGISTERS_RCID_MASK; + iowrite64(reg, ctrl->base + reg_offset); + if (cbqri_wait_busy_flag(ctrl, reg_offset, ®) < 0) { + pr_err_ratelimited("BUSY timeout during operation\n"); + return -EIO; + } + + /* Get the operation status */ + *status = FIELD_GET(CBQRI_CONTROL_REGISTERS_STATUS_MASK, reg); + + /* + * Check for the AT support if the register is implemented + * (if not, the status value will remain 0) + */ + if (*status != 0) { + /* + * Re-issue operation with AT=CODE so the controller + * latches AT=CODE on supported hardware (or resets it to 0 + * on hardware that doesn't). OP must be a defined CBQRI op + * here. OP=0 is a no-op and would silently disable CDP. + */ + reg = saved_reg; + FIELD_MODIFY(CBQRI_CONTROL_REGISTERS_OP_MASK, ®, operation); + FIELD_MODIFY(CBQRI_CONTROL_REGISTERS_AT_MASK, ®, + CBQRI_CONTROL_REGISTERS_AT_CODE); + iowrite64(reg, ctrl->base + reg_offset); + if (cbqri_wait_busy_flag(ctrl, reg_offset, ®) < 0) { + pr_err("BUSY timeout setting AT field\n"); + return -EIO; + } + + /* + * If the AT field value has been reset to zero, + * then the AT support is not present + */ + at = FIELD_GET(CBQRI_CONTROL_REGISTERS_AT_MASK, reg); + if (at == CBQRI_CONTROL_REGISTERS_AT_CODE) + *access_type_supported = true; + } + + /* Restore the original register value. Clear OP to avoid re-triggering the probe op. */ + saved_reg &= ~CBQRI_CONTROL_REGISTERS_OP_MASK; + iowrite64(saved_reg, ctrl->base + reg_offset); + if (cbqri_wait_busy_flag(ctrl, reg_offset, NULL) < 0) { + pr_err("BUSY timeout restoring register value\n"); + return -EIO; + } + + return 0; +} + +static int cbqri_probe_cc(struct cbqri_controller *ctrl) +{ + int err, status; + u64 reg; + + reg = ioread64(ctrl->base + CBQRI_CC_CAPABILITIES_OFF); + if (reg == 0) + return -ENODEV; + + ctrl->ver_minor = FIELD_GET(CBQRI_CC_CAPABILITIES_VER_MINOR_MASK, reg); + ctrl->ver_major = FIELD_GET(CBQRI_CC_CAPABILITIES_VER_MAJOR_MASK, reg); + ctrl->cc.ncblks = FIELD_GET(CBQRI_CC_CAPABILITIES_NCBLKS_MASK, reg); + + pr_debug("version=%d.%d ncblks=%d cache_level=%d\n", + ctrl->ver_major, ctrl->ver_minor, + ctrl->cc.ncblks, ctrl->cache.cache_level); + + /* + * NCBLKS == 0 would divide-by-zero in the schemata math while + * ctrl->lock is held. + */ + if (!ctrl->cc.ncblks) { + pr_warn("CC at %pa has 0 capacity blocks, skipping\n", + &ctrl->addr); + return -ENODEV; + } + + if (ctrl->cc.ncblks > 32) { + pr_warn("CC at %pa has ncblks=%u > 32 (resctrl CBM is u32), skipping\n", + &ctrl->addr, ctrl->cc.ncblks); + return -ENODEV; + } + + /* + * Resolve cache_size via cacheinfo. cpus_read_lock satisfies + * lockdep_assert_cpus_held() inside get_cpu_cacheinfo_level(). If + * every cpu_mask member is offline, cache_size stays 0 and the + * controller cannot back occupancy monitoring. + */ + cpus_read_lock(); + if (!ctrl->cache.cache_size) { + int cpu = cpumask_first_and(&ctrl->cache.cpu_mask, cpu_online_mask); + + if (cpu < nr_cpu_ids) { + struct cacheinfo *ci; + + ci = get_cpu_cacheinfo_level(cpu, ctrl->cache.cache_level); + if (ci) + ctrl->cache.cache_size = ci->size; + } + } + cpus_read_unlock(); + + /* Probe allocation features */ + err = cbqri_probe_feature(ctrl, CBQRI_CC_ALLOC_CTL_OFF, + CBQRI_CC_ALLOC_CTL_OP_READ_LIMIT, + &status, &ctrl->cc.supports_alloc_at_code); + if (err) + return err; + + if (status == CBQRI_CC_ALLOC_CTL_STATUS_SUCCESS) + ctrl->alloc_capable = true; + + return 0; +} + +static int cbqri_probe_controller(struct cbqri_controller *ctrl) +{ + int err; + + pr_debug("controller info: type=%d addr=%pa size=%pa max-rcid=%u max-mcid=%u\n", + ctrl->type, &ctrl->addr, &ctrl->size, + ctrl->rcid_count, ctrl->mcid_count); + + if (!ctrl->addr) { + pr_warn("controller has invalid addr=0x0, skipping\n"); + return -EINVAL; + } + + if (ctrl->size < CBQRI_CTRL_MIN_REG_SPAN) { + pr_warn("controller at %pa: size %pa < minimum 0x%x, skipping\n", + &ctrl->addr, &ctrl->size, CBQRI_CTRL_MIN_REG_SPAN); + return -EINVAL; + } + + if (!request_mem_region(ctrl->addr, ctrl->size, "cbqri_controller")) { + pr_err("request_mem_region failed for %pa\n", &ctrl->addr); + return -EBUSY; + } + + ctrl->base = ioremap(ctrl->addr, ctrl->size); + if (!ctrl->base) { + pr_err("ioremap failed for %pa\n", &ctrl->addr); + err = -ENOMEM; + goto err_release; + } + + switch (ctrl->type) { + case CBQRI_CONTROLLER_TYPE_CAPACITY: + err = cbqri_probe_cc(ctrl); + break; + default: + pr_err("unknown controller type %d\n", ctrl->type); + err = -ENODEV; + break; + } + + if (err) + goto err_iounmap; + + return 0; + +err_iounmap: + iounmap(ctrl->base); + ctrl->base = NULL; +err_release: + release_mem_region(ctrl->addr, ctrl->size); + return err; +} + +void cbqri_controller_destroy(struct cbqri_controller *ctrl) +{ + kfree(ctrl); +} + +/* + * Roll back the most recent n successful riscv_cbqri_register_controller() + * calls. Discovery layers use this to undo partial registrations when a + * subsequent table entry turns out to be malformed and the whole parse must + * abort. + * + * Caller serialization: this is intended for boot-time discovery (ACPI + * acpi_arch_init, future DT) which run single-threaded before late_initcall. + * No lock is taken. + */ +void riscv_cbqri_unregister_last(unsigned int n) +{ + while (n--) { + struct cbqri_controller *ctrl; + + if (list_empty(&cbqri_controllers)) + return; + ctrl = list_last_entry(&cbqri_controllers, + struct cbqri_controller, list); + list_del(&ctrl->list); + cbqri_controller_destroy(ctrl); + } +} + +/* + * Allocate, populate, and add to cbqri_controllers a fresh controller + * descriptor based on info supplied by a discovery layer (ACPI RQSC, + * future DT). Resolves the cpumask via PPTT (capacity) so callers do + * not need to know about cacheinfo topology. + */ +int riscv_cbqri_register_controller(const struct cbqri_controller_info *info) +{ + struct cbqri_controller *ctrl; + int err; + + if (!info->addr) { + pr_warn("skipping controller with invalid addr=0x0\n"); + return -EINVAL; + } + + ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); + if (!ctrl) + return -ENOMEM; + + mutex_init(&ctrl->lock); + + ctrl->addr = info->addr; + ctrl->size = info->size; + ctrl->type = info->type; + ctrl->rcid_count = info->rcid_count; + ctrl->mcid_count = info->mcid_count; + + switch (info->type) { + case CBQRI_CONTROLLER_TYPE_CAPACITY: { + int level; + + ctrl->cache.cache_id = info->cache_id; + + level = find_acpi_cache_level_from_id(info->cache_id); + if (level < 0) { + pr_warn("Failed to resolve cache level for cache id 0x%x (%d), skipping\n", + info->cache_id, level); + cbqri_controller_destroy(ctrl); + return level; + } + ctrl->cache.cache_level = level; + + /* + * cache_size stays at 0 here. cacheinfo is not populated + * yet at acpi_arch_init time. Filled lazily during probe + * via get_cpu_cacheinfo_level(). + */ + + err = acpi_pptt_get_cpumask_from_cache_id(info->cache_id, + &ctrl->cache.cpu_mask); + if (err) { + pr_warn("Failed to get cpumask for cache id 0x%x (%d), skipping\n", + info->cache_id, err); + cbqri_controller_destroy(ctrl); + return err; + } + break; + } + default: + pr_warn("controller at %pa: unknown type %u, skipping\n", + &ctrl->addr, info->type); + cbqri_controller_destroy(ctrl); + return -EINVAL; + } + + err = cbqri_probe_controller(ctrl); + if (err) { + cbqri_controller_destroy(ctrl); + return err; + } + + list_add_tail(&ctrl->list, &cbqri_controllers); + return 0; +} diff --git a/drivers/resctrl/cbqri_internal.h b/drivers/resctrl/cbqri_internal.h new file mode 100644 index 00000000000000..6a581a7e417be1 --- /dev/null +++ b/drivers/resctrl/cbqri_internal.h @@ -0,0 +1,125 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef _DRIVERS_RESCTRL_CBQRI_INTERNAL_H +#define _DRIVERS_RESCTRL_CBQRI_INTERNAL_H + +#include +#include +#include +#include +#include +#include + +/* Capacity Controller (CC) MMIO register offsets. */ +#define CBQRI_CC_CAPABILITIES_OFF 0 +#define CBQRI_CC_ALLOC_CTL_OFF 24 +#define CBQRI_CC_BLOCK_MASK_OFF 32 + +/* + * Smallest MMIO span the driver actually accesses: highest defined + * register offset (0x20) plus the 8-byte register width. Used by + * cbqri_probe_controller() to reject undersized firmware-supplied + * mappings before request_mem_region/ioremap, so a u64 access at + * BLOCK_MASK does not walk past the end of the mapping. + */ +#define CBQRI_CTRL_MIN_REG_SPAN 0x28u + +#define CBQRI_CC_CAPABILITIES_VER_MINOR_MASK GENMASK(3, 0) +#define CBQRI_CC_CAPABILITIES_VER_MAJOR_MASK GENMASK(7, 4) +#define CBQRI_CC_CAPABILITIES_NCBLKS_MASK GENMASK(23, 8) + +#define CBQRI_CONTROL_REGISTERS_OP_MASK GENMASK(4, 0) +#define CBQRI_CONTROL_REGISTERS_AT_MASK GENMASK(7, 5) +#define CBQRI_CONTROL_REGISTERS_AT_DATA 0 +#define CBQRI_CONTROL_REGISTERS_AT_CODE 1 +#define CBQRI_CONTROL_REGISTERS_RCID_MASK GENMASK(19, 8) +#define CBQRI_CONTROL_REGISTERS_STATUS_MASK GENMASK_ULL(38, 32) +#define CBQRI_CONTROL_REGISTERS_BUSY_MASK GENMASK_ULL(39, 39) + +#define CBQRI_CC_ALLOC_CTL_OP_CONFIG_LIMIT 1 +#define CBQRI_CC_ALLOC_CTL_OP_READ_LIMIT 2 +#define CBQRI_CC_ALLOC_CTL_STATUS_SUCCESS 1 + +/* Capacity Controller hardware capabilities */ +struct riscv_cbqri_capacity_caps { + u16 ncblks; + bool supports_alloc_at_code; +}; + +/** + * enum cbqri_at - capacity controller access type for CDP + * @CBQRI_AT_DATA: data access (CBQRI Table 1, AT=0) + * @CBQRI_AT_CODE: code access (CBQRI Table 1, AT=1) + * + * Selects between data and code halves on controllers that advertise + * supports_alloc_at_code. The resctrl glue maps from CDP_DATA / CDP_CODE + * to this enum at the boundary so cbqri_devices.c stays free of fs/resctrl + * types. + */ +enum cbqri_at { + CBQRI_AT_DATA = CBQRI_CONTROL_REGISTERS_AT_DATA, + CBQRI_AT_CODE = CBQRI_CONTROL_REGISTERS_AT_CODE, +}; + +/** + * struct cbqri_cc_config - desired capacity allocation state for one rcid + * @cbm: capacity block mask + * @at: AT half (data or code) the @cbm applies to + * @cdp_enabled: when false and the controller supports AT, mirror @cbm + * into the other AT half so both stay in sync + */ +struct cbqri_cc_config { + u64 cbm; + enum cbqri_at at; + bool cdp_enabled; +}; + +struct cbqri_controller { + void __iomem *base; + /* + * Serializes the write-then-poll-busy MMIO sequences on this + * controller. Each CBQRI op may busy-wait up to 1 ms on slow + * firmware, so use a sleeping mutex (paired with the sleeping + * readq_poll_timeout() in cbqri_wait_busy_flag()) to keep + * preemption enabled, which is required for PREEMPT_RT. + * All resctrl-arch entry points run in process context. + */ + struct mutex lock; + /* Sticky -EIO once cbqri_wait_busy_flag() has timed out. */ + bool faulted; + + int ver_major; + int ver_minor; + + struct riscv_cbqri_capacity_caps cc; + + bool alloc_capable; + bool mon_capable; + + phys_addr_t addr; + phys_addr_t size; + enum cbqri_controller_type type; + u32 rcid_count; + u32 mcid_count; + + struct list_head list; + + struct cache_controller { + u32 cache_level; + u32 cache_size; /* in bytes */ + struct cpumask cpu_mask; + /* Unique Cache ID from the PPTT table's Cache Type Structure */ + u32 cache_id; + } cache; +}; + +extern struct list_head cbqri_controllers; + +void cbqri_controller_destroy(struct cbqri_controller *ctrl); + +int cbqri_apply_cache_config(struct cbqri_controller *ctrl, u32 closid, + const struct cbqri_cc_config *cfg); + +int cbqri_read_cache_config(struct cbqri_controller *ctrl, u32 closid, + enum cbqri_at at, u32 *cbm_out); + +#endif /* _DRIVERS_RESCTRL_CBQRI_INTERNAL_H */ diff --git a/include/linux/riscv_cbqri.h b/include/linux/riscv_cbqri.h new file mode 100644 index 00000000000000..18e13893809582 --- /dev/null +++ b/include/linux/riscv_cbqri.h @@ -0,0 +1,66 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Public registration API for the RISC-V Capacity and Bandwidth QoS + * Register Interface (CBQRI) driver. Discovery layers (ACPI RQSC, future + * device tree) call riscv_cbqri_register_controller() to hand a controller + * descriptor to the driver, which owns all subsequent state. + */ +#ifndef _LINUX_RISCV_CBQRI_H +#define _LINUX_RISCV_CBQRI_H + +#include + +enum cbqri_controller_type { + CBQRI_CONTROLLER_TYPE_CAPACITY, + CBQRI_CONTROLLER_TYPE_BANDWIDTH, +}; + +/* + * Sanity caps on per-controller RCID/MCID counts from firmware (RQSC, DT). + * Per-id MMIO init loops busy-wait up to ~1-2 ms each, so a malformed table + * claiming the full u16 range (65535) would block boot long enough to trip + * the soft-lockup watchdog. Real CBQRI hardware advertises tens to a few + * hundred ids. + */ +#define CBQRI_MAX_RCID 1024 +#define CBQRI_MAX_MCID 1024 + +/** + * struct cbqri_controller_info - registration descriptor + * @addr: MMIO base address of the controller's register interface + * @size: size of the MMIO region + * @type: capacity or bandwidth controller + * @rcid_count: number of supported RCIDs (per RQSC table) + * @mcid_count: number of supported MCIDs (per RQSC table) + * @cache_id: PPTT cache id. Only meaningful for CAPACITY controllers + * @prox_dom: SRAT proximity domain. Only meaningful for BANDWIDTH + * controllers + * + * Discovery layers populate one of @cache_id / @prox_dom according to + * @type. The CBQRI driver resolves the matching cpumask internally so + * callers do not need to know about cacheinfo/NUMA topology. + */ +struct cbqri_controller_info { + phys_addr_t addr; + phys_addr_t size; + enum cbqri_controller_type type; + u32 rcid_count; + u32 mcid_count; + u32 cache_id; + u32 prox_dom; +}; + +#if IS_ENABLED(CONFIG_RISCV_CBQRI_DRIVER) +int riscv_cbqri_register_controller(const struct cbqri_controller_info *info); +void riscv_cbqri_unregister_last(unsigned int n); +#else +static inline int +riscv_cbqri_register_controller(const struct cbqri_controller_info *info) +{ + return -ENODEV; +} + +static inline void riscv_cbqri_unregister_last(unsigned int n) { } +#endif + +#endif /* _LINUX_RISCV_CBQRI_H */ From 92c990efb6ca40f9014ccaa9439329841d885d2e Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Sun, 10 May 2026 22:11:04 -0700 Subject: [PATCH 09/19] riscv_cbqri: Add capacity controller monitoring device ops Add the CC monitoring primitives. cbqri_init_mon_counters() pre-arms every MCID with the Occupancy event so a subsequent READ_COUNTER just snapshots the live counter without re-configuring the slot. cbqri_probe_cc() leaves ctrl->mon_capable false when cacheinfo has not given a non-zero cache_size, since the byte conversion would be meaningless. cbqri_mon_op() takes a reg_offset and serves both CC and BC mon_ctl registers, which share an identical layout. Assisted-by: Claude:claude-opus-4-7 Co-developed-by: Adrien Ricciardi Signed-off-by: Adrien Ricciardi Signed-off-by: Drew Fustini Signed-off-by: Linux RISC-V bot --- drivers/resctrl/cbqri_devices.c | 85 ++++++++++++++++++++++++++++++++ drivers/resctrl/cbqri_internal.h | 21 ++++++++ 2 files changed, 106 insertions(+) diff --git a/drivers/resctrl/cbqri_devices.c b/drivers/resctrl/cbqri_devices.c index dc76a146e34df7..e46b02d2c50d7f 100644 --- a/drivers/resctrl/cbqri_devices.c +++ b/drivers/resctrl/cbqri_devices.c @@ -105,6 +105,46 @@ static int cbqri_cc_alloc_op(struct cbqri_controller *ctrl, int operation, return 0; } +/* + * Issue a monitoring op on a CC or BC controller's mon_ctl register at + * reg_offset (CBQRI_CC_MON_CTL_OFF or CBQRI_BC_MON_CTL_OFF). The CC and + * BC mon_ctl registers share an identical OP/MCID/EVT_ID/STATUS layout, so + * one helper covers both. Caller must hold ctrl->lock. + */ +int cbqri_mon_op(struct cbqri_controller *ctrl, int reg_offset, + int operation, int mcid, int evt_id, u64 *out_reg) +{ + u64 reg; + + lockdep_assert_held(&ctrl->lock); + + if (ctrl->faulted) + return -EIO; + + if (cbqri_wait_busy_flag(ctrl, reg_offset, ®) < 0) { + pr_err_ratelimited("BUSY timeout before starting operation\n"); + return -EIO; + } + FIELD_MODIFY(CBQRI_MON_CTL_OP_MASK, ®, operation); + FIELD_MODIFY(CBQRI_MON_CTL_MCID_MASK, ®, mcid); + FIELD_MODIFY(CBQRI_MON_CTL_EVT_ID_MASK, ®, evt_id); + iowrite64(reg, ctrl->base + reg_offset); + + if (cbqri_wait_busy_flag(ctrl, reg_offset, ®) < 0) { + pr_err_ratelimited("BUSY timeout\n"); + return -EIO; + } + + if (FIELD_GET(CBQRI_MON_CTL_STATUS_MASK, reg) != + CBQRI_MON_CTL_STATUS_SUCCESS) + return -EIO; + + if (out_reg) + *out_reg = reg; + + return 0; +} + /* * Apply a capacity block mask and verify via CONFIG_LIMIT + READ_LIMIT. * @@ -310,6 +350,7 @@ static int cbqri_probe_feature(struct cbqri_controller *ctrl, int reg_offset, static int cbqri_probe_cc(struct cbqri_controller *ctrl) { + bool has_mon_at_code = false; int err, status; u64 reg; @@ -361,6 +402,28 @@ static int cbqri_probe_cc(struct cbqri_controller *ctrl) } cpus_read_unlock(); + /* Probe monitoring features */ + err = cbqri_probe_feature(ctrl, CBQRI_CC_MON_CTL_OFF, + CBQRI_CC_MON_CTL_OP_READ_COUNTER, &status, + &has_mon_at_code); + if (err) + return err; + + if (status == CBQRI_MON_CTL_STATUS_SUCCESS) { + /* + * Occupancy is reported to userspace in bytes, computed as + * cache_size * counter / ncblks by the resctrl glue. If + * cacheinfo has no cache_size, leave mon_capable false so + * the file is not exposed at all rather than silently + * returning 0. + */ + if (!ctrl->cache.cache_size) + pr_debug("CC @%pa: cache_size unknown, occupancy monitoring disabled\n", + &ctrl->addr); + else + ctrl->mon_capable = true; + } + /* Probe allocation features */ err = cbqri_probe_feature(ctrl, CBQRI_CC_ALLOC_CTL_OFF, CBQRI_CC_ALLOC_CTL_OP_READ_LIMIT, @@ -428,6 +491,28 @@ static int cbqri_probe_controller(struct cbqri_controller *ctrl) return err; } +/* + * Pre-arm every MCID with the Occupancy event so a subsequent READ_COUNTER + * just snapshots the live counter rather than re-configuring the slot. + * Called once per CC during resctrl-side cpuhp online for the L3 monitoring + * domain. + */ +int cbqri_init_mon_counters(struct cbqri_controller *ctrl) +{ + int i, err; + + for (i = 0; i < ctrl->mcid_count; i++) { + mutex_lock(&ctrl->lock); + err = cbqri_mon_op(ctrl, CBQRI_CC_MON_CTL_OFF, + CBQRI_CC_MON_CTL_OP_CONFIG_EVENT, + i, CBQRI_CC_EVT_ID_OCCUPANCY, NULL); + mutex_unlock(&ctrl->lock); + if (err) + return err; + } + return 0; +} + void cbqri_controller_destroy(struct cbqri_controller *ctrl) { kfree(ctrl); diff --git a/drivers/resctrl/cbqri_internal.h b/drivers/resctrl/cbqri_internal.h index 6a581a7e417be1..b1169ffc599fb6 100644 --- a/drivers/resctrl/cbqri_internal.h +++ b/drivers/resctrl/cbqri_internal.h @@ -11,6 +11,8 @@ /* Capacity Controller (CC) MMIO register offsets. */ #define CBQRI_CC_CAPABILITIES_OFF 0 +#define CBQRI_CC_MON_CTL_OFF 8 +#define CBQRI_CC_MON_CTL_VAL_OFF 16 #define CBQRI_CC_ALLOC_CTL_OFF 24 #define CBQRI_CC_BLOCK_MASK_OFF 32 @@ -39,6 +41,20 @@ #define CBQRI_CC_ALLOC_CTL_OP_READ_LIMIT 2 #define CBQRI_CC_ALLOC_CTL_STATUS_SUCCESS 1 +#define CBQRI_CC_MON_CTL_OP_CONFIG_EVENT 1 +#define CBQRI_CC_MON_CTL_OP_READ_COUNTER 2 + +/* mon_ctl field masks (CC and BC share an identical OP/MCID/EVT_ID/STATUS layout) */ +#define CBQRI_MON_CTL_OP_MASK GENMASK(4, 0) +#define CBQRI_MON_CTL_MCID_MASK GENMASK(19, 8) +#define CBQRI_MON_CTL_EVT_ID_MASK GENMASK(27, 20) +#define CBQRI_MON_CTL_STATUS_MASK GENMASK_ULL(38, 32) +#define CBQRI_MON_CTL_STATUS_SUCCESS 1 + +/* Capacity usage monitoring event IDs (CBQRI spec Table 4) */ +#define CBQRI_CC_EVT_ID_NONE 0 +#define CBQRI_CC_EVT_ID_OCCUPANCY 1 + /* Capacity Controller hardware capabilities */ struct riscv_cbqri_capacity_caps { u16 ncblks; @@ -122,4 +138,9 @@ int cbqri_apply_cache_config(struct cbqri_controller *ctrl, u32 closid, int cbqri_read_cache_config(struct cbqri_controller *ctrl, u32 closid, enum cbqri_at at, u32 *cbm_out); +int cbqri_mon_op(struct cbqri_controller *ctrl, int reg_offset, + int operation, int mcid, int evt_id, u64 *out_reg); + +int cbqri_init_mon_counters(struct cbqri_controller *ctrl); + #endif /* _DRIVERS_RESCTRL_CBQRI_INTERNAL_H */ From 7bf9dc4785ffc89ee929c40266aa1716547875ab Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Sun, 10 May 2026 22:11:05 -0700 Subject: [PATCH 10/19] riscv_cbqri: Add bandwidth controller probe and allocation device ops Add support for CBQRI bandwidth controller (BC) discovery and the two BC allocation control knobs. Rbwb is the number of reserved bandwidth blocks per RCID. Mweight is the weighted share per RCID of the remaining unreserved bandwidth. Both fields share the bc_bw_alloc register, so each write needs READ_LIMIT-modify-CONFIG_LIMIT-verify with a sentinel pre-write to catch silent no-ops (status SUCCESS but the staged field unchanged). cbqri_apply_rbwb() enforces the spec-mandated sum(Rbwb) <= MRBWB (max reserved bw blocks) invariant from a per-RCID software cache rather than per-RCID READ_LIMIT round-trips, which would cost up to 1 ms each while holding the mutex. Assisted-by: Claude:claude-opus-4-7 Co-developed-by: Adrien Ricciardi Signed-off-by: Adrien Ricciardi Signed-off-by: Drew Fustini Signed-off-by: Linux RISC-V bot --- drivers/resctrl/cbqri_devices.c | 322 +++++++++++++++++++++++++++++++ drivers/resctrl/cbqri_internal.h | 59 +++++- 2 files changed, 380 insertions(+), 1 deletion(-) diff --git a/drivers/resctrl/cbqri_devices.c b/drivers/resctrl/cbqri_devices.c index e46b02d2c50d7f..7e5decd7a6b2e0 100644 --- a/drivers/resctrl/cbqri_devices.c +++ b/drivers/resctrl/cbqri_devices.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -28,6 +29,44 @@ static void cbqri_set_cbm(struct cbqri_controller *ctrl, u64 cbm) iowrite64(cbm, ctrl->base + CBQRI_CC_BLOCK_MASK_OFF); } +/* Set the Rbwb (reserved bandwidth blocks) field in bc_bw_alloc */ +static void cbqri_set_rbwb(struct cbqri_controller *ctrl, u64 rbwb) +{ + u64 reg; + + reg = ioread64(ctrl->base + CBQRI_BC_BW_ALLOC_OFF); + FIELD_MODIFY(CBQRI_CONTROL_REGISTERS_RBWB_MASK, ®, rbwb); + iowrite64(reg, ctrl->base + CBQRI_BC_BW_ALLOC_OFF); +} + +/* Get the Rbwb (reserved bandwidth blocks) field in bc_bw_alloc */ +static u64 cbqri_get_rbwb(struct cbqri_controller *ctrl) +{ + u64 reg; + + reg = ioread64(ctrl->base + CBQRI_BC_BW_ALLOC_OFF); + return FIELD_GET(CBQRI_CONTROL_REGISTERS_RBWB_MASK, reg); +} + +/* Set the Mweight (opportunistic weight) field in bc_bw_alloc */ +static void cbqri_set_mweight(struct cbqri_controller *ctrl, u64 mweight) +{ + u64 reg; + + reg = ioread64(ctrl->base + CBQRI_BC_BW_ALLOC_OFF); + FIELD_MODIFY(CBQRI_CONTROL_REGISTERS_MWEIGHT_MASK, ®, mweight); + iowrite64(reg, ctrl->base + CBQRI_BC_BW_ALLOC_OFF); +} + +/* Get the Mweight (opportunistic weight) field in bc_bw_alloc */ +static u64 cbqri_get_mweight(struct cbqri_controller *ctrl) +{ + u64 reg; + + reg = ioread64(ctrl->base + CBQRI_BC_BW_ALLOC_OFF); + return FIELD_GET(CBQRI_CONTROL_REGISTERS_MWEIGHT_MASK, reg); +} + static int cbqri_wait_busy_flag(struct cbqri_controller *ctrl, int reg_offset, u64 *regp) { @@ -145,6 +184,44 @@ int cbqri_mon_op(struct cbqri_controller *ctrl, int reg_offset, return 0; } +/* + * Perform bandwidth allocation control operation on bandwidth controller. + * Caller must hold ctrl->lock. + */ +static int cbqri_bc_alloc_op(struct cbqri_controller *ctrl, int operation, int rcid) +{ + int reg_offset = CBQRI_BC_ALLOC_CTL_OFF; + int status; + u64 reg; + + lockdep_assert_held(&ctrl->lock); + + if (ctrl->faulted) + return -EIO; + + if (cbqri_wait_busy_flag(ctrl, reg_offset, ®) < 0) { + pr_err_ratelimited("BUSY timeout before starting operation\n"); + return -EIO; + } + FIELD_MODIFY(CBQRI_CONTROL_REGISTERS_OP_MASK, ®, operation); + FIELD_MODIFY(CBQRI_CONTROL_REGISTERS_RCID_MASK, ®, rcid); + iowrite64(reg, ctrl->base + reg_offset); + + if (cbqri_wait_busy_flag(ctrl, reg_offset, ®) < 0) { + pr_err_ratelimited("BUSY timeout during operation\n"); + return -EIO; + } + + status = FIELD_GET(CBQRI_CONTROL_REGISTERS_STATUS_MASK, reg); + if (status != CBQRI_BC_ALLOC_CTL_STATUS_SUCCESS) { + pr_err_ratelimited("BC alloc op %d failed: status=%d\n", + operation, status); + return -EIO; + } + + return 0; +} + /* * Apply a capacity block mask and verify via CONFIG_LIMIT + READ_LIMIT. * @@ -271,6 +348,156 @@ int cbqri_read_cache_config(struct cbqri_controller *ctrl, u32 closid, return err; } +/* + * Write one field (Rbwb or Mweight) of the bc_bw_alloc staging register for + * closid and verify hardware accepted it. bc_bw_alloc packs both fields, so + * READ_LIMIT first loads the RCID's current state to preserve the unmodified + * field across the subsequent CONFIG_LIMIT. + * + * Caller must hold ctrl->lock. + */ +static int cbqri_apply_bc_field(struct cbqri_controller *ctrl, u32 closid, + void (*set)(struct cbqri_controller *, u64), + u64 (*get)(struct cbqri_controller *), + u64 val, bool *committed) +{ + int ret; + u64 reg; + + lockdep_assert_held(&ctrl->lock); + + /* Load current RCID state so the unmodified field is preserved */ + ret = cbqri_bc_alloc_op(ctrl, CBQRI_BC_ALLOC_CTL_OP_READ_LIMIT, closid); + if (ret < 0) + return ret; + + set(ctrl, val); + + ret = cbqri_bc_alloc_op(ctrl, CBQRI_BC_ALLOC_CTL_OP_CONFIG_LIMIT, closid); + if (ret < 0) + return ret; + + /* + * CONFIG_LIMIT committed. The per-CLOSID software cache must + * track hardware regardless of whether the verify below passes. + */ + if (committed) + *committed = true; + + /* + * Pre-write a sentinel that cannot equal val so a silent + * READ_LIMIT (status SUCCESS but no staging update) is detectable + * in the readback. ~val works for any N-bit field width, and a + * fixed-zero sentinel would collide with val == 0 (legal Mweight). + */ + set(ctrl, ~val); + + ret = cbqri_bc_alloc_op(ctrl, CBQRI_BC_ALLOC_CTL_OP_READ_LIMIT, closid); + if (ret < 0) + return ret; + + reg = get(ctrl); + if (reg != val) { + pr_err_ratelimited("BC field verify mismatch (reg=0x%llx != val=%llu)\n", + reg, val); + return -EIO; + } + + return 0; +} + +/* + * Apply an Rbwb update for closid, optionally enforcing CBQRI section 4.5 + * sum(Rbwb) <= MRBWB. check_sum=false is used by coordinated init/reset + * walks where intermediate sums may transiently exceed MRBWB. + */ +int cbqri_apply_rbwb(struct cbqri_controller *ctrl, u32 closid, + u64 rbwb, bool check_sum) +{ + bool committed = false; + u32 i; + int ret; + + if (rbwb > U16_MAX) + return -EINVAL; + + mutex_lock(&ctrl->lock); + + if (check_sum && rbwb > 0) { + u64 sum = rbwb; + + for (i = 0; i < ctrl->rcid_count; i++) { + if (i == closid) + continue; + sum += ctrl->rbwb_cache[i]; + } + if (sum > ctrl->bc.mrbwb) { + /* Ratelimited: a userspace loop should not fill dmesg. */ + pr_err_ratelimited("RBWB sum %llu exceeds MRBWB %u\n", + sum, ctrl->bc.mrbwb); + ret = -EINVAL; + goto out; + } + } + + ret = cbqri_apply_bc_field(ctrl, closid, + cbqri_set_rbwb, cbqri_get_rbwb, rbwb, + &committed); + /* + * Update the cache once CONFIG_LIMIT has committed. A stale + * cache entry would let a future sum check pass a write that + * exceeds MRBWB. + */ + if (committed) + ctrl->rbwb_cache[closid] = rbwb; +out: + mutex_unlock(&ctrl->lock); + return ret; +} + +int cbqri_apply_mweight_config(struct cbqri_controller *ctrl, u32 closid, + u64 mweight) +{ + int ret; + + mutex_lock(&ctrl->lock); + ret = cbqri_apply_bc_field(ctrl, closid, + cbqri_set_mweight, cbqri_get_mweight, + mweight, NULL); + mutex_unlock(&ctrl->lock); + return ret; +} + +/* + * Read the Rbwb (reserved bandwidth blocks) for closid via READ_LIMIT. + */ +int cbqri_read_rbwb(struct cbqri_controller *ctrl, u32 closid, u64 *rbwb_out) +{ + int err; + + mutex_lock(&ctrl->lock); + err = cbqri_bc_alloc_op(ctrl, CBQRI_BC_ALLOC_CTL_OP_READ_LIMIT, closid); + if (err == 0) + *rbwb_out = cbqri_get_rbwb(ctrl); + mutex_unlock(&ctrl->lock); + return err; +} + +/* + * Read the Mweight (opportunistic weight) for closid via READ_LIMIT. + */ +int cbqri_read_mweight(struct cbqri_controller *ctrl, u32 closid, u64 *mweight_out) +{ + int err; + + mutex_lock(&ctrl->lock); + err = cbqri_bc_alloc_op(ctrl, CBQRI_BC_ALLOC_CTL_OP_READ_LIMIT, closid); + if (err == 0) + *mweight_out = cbqri_get_mweight(ctrl); + mutex_unlock(&ctrl->lock); + return err; +} + static int cbqri_probe_feature(struct cbqri_controller *ctrl, int reg_offset, int operation, int *status, bool *access_type_supported) { @@ -437,6 +664,83 @@ static int cbqri_probe_cc(struct cbqri_controller *ctrl) return 0; } +static int cbqri_probe_bc(struct cbqri_controller *ctrl) +{ + bool has_mon_at_code = false; + int err, status; + u64 reg; + + reg = ioread64(ctrl->base + CBQRI_BC_CAPABILITIES_OFF); + if (reg == 0) + return -ENODEV; + + ctrl->ver_minor = FIELD_GET(CBQRI_BC_CAPABILITIES_VER_MINOR_MASK, reg); + ctrl->ver_major = FIELD_GET(CBQRI_BC_CAPABILITIES_VER_MAJOR_MASK, reg); + ctrl->bc.nbwblks = FIELD_GET(CBQRI_BC_CAPABILITIES_NBWBLKS_MASK, reg); + ctrl->bc.mrbwb = FIELD_GET(CBQRI_BC_CAPABILITIES_MRBWB_MASK, reg); + + if (!ctrl->bc.nbwblks) { + pr_err("bandwidth controller has nbwblks=0\n"); + return -EINVAL; + } + + /* + * rcid_count == 0 is malformed: kcalloc(0) returns ZERO_SIZE_PTR + * which passes the NULL check, and the first apply oopses. + */ + if (!ctrl->rcid_count) { + pr_err("bandwidth controller has rcid_count=0\n"); + return -EINVAL; + } + + /* + * Reset seeds RCID 0 with mrbwb - (rcid_count - 1). Reject a + * controller that would underflow that arithmetic. + */ + if (ctrl->bc.mrbwb < ctrl->rcid_count) { + pr_err("bandwidth controller has mrbwb=%u < rcid_count=%u, rejecting\n", + ctrl->bc.mrbwb, ctrl->rcid_count); + return -EINVAL; + } + + pr_debug("version=%d.%d nbwblks=%d mrbwb=%d\n", + ctrl->ver_major, ctrl->ver_minor, + ctrl->bc.nbwblks, ctrl->bc.mrbwb); + + /* Probe monitoring features */ + err = cbqri_probe_feature(ctrl, CBQRI_BC_MON_CTL_OFF, + CBQRI_BC_MON_CTL_OP_READ_COUNTER, &status, + &has_mon_at_code); + if (err) + return err; + + if (status == CBQRI_MON_CTL_STATUS_SUCCESS) + ctrl->mon_capable = true; + + /* Probe allocation features */ + err = cbqri_probe_feature(ctrl, CBQRI_BC_ALLOC_CTL_OFF, + CBQRI_BC_ALLOC_CTL_OP_READ_LIMIT, + &status, &ctrl->bc.supports_alloc_at_code); + if (err) + return err; + + if (status == CBQRI_BC_ALLOC_CTL_STATUS_SUCCESS) { + ctrl->alloc_capable = true; + + /* + * Per-RCID Rbwb cache: lets cbqri_apply_rbwb() validate + * sum(Rbwb) <= MRBWB without re-reading every RCID. + */ + ctrl->rbwb_cache = kcalloc(ctrl->rcid_count, + sizeof(*ctrl->rbwb_cache), + GFP_KERNEL); + if (!ctrl->rbwb_cache) + return -ENOMEM; + } + + return 0; +} + static int cbqri_probe_controller(struct cbqri_controller *ctrl) { int err; @@ -472,6 +776,9 @@ static int cbqri_probe_controller(struct cbqri_controller *ctrl) case CBQRI_CONTROLLER_TYPE_CAPACITY: err = cbqri_probe_cc(ctrl); break; + case CBQRI_CONTROLLER_TYPE_BANDWIDTH: + err = cbqri_probe_bc(ctrl); + break; default: pr_err("unknown controller type %d\n", ctrl->type); err = -ENODEV; @@ -515,6 +822,7 @@ int cbqri_init_mon_counters(struct cbqri_controller *ctrl) void cbqri_controller_destroy(struct cbqri_controller *ctrl) { + kfree(ctrl->rbwb_cache); kfree(ctrl); } @@ -601,6 +909,20 @@ int riscv_cbqri_register_controller(const struct cbqri_controller_info *info) } break; } + case CBQRI_CONTROLLER_TYPE_BANDWIDTH: { + int node_id; + + ctrl->mem.prox_dom = info->prox_dom; + node_id = pxm_to_node(info->prox_dom); + if (node_id == NUMA_NO_NODE) { + pr_warn("controller at %pa: proximity domain %u has no NUMA node, skipping\n", + &ctrl->addr, info->prox_dom); + cbqri_controller_destroy(ctrl); + return -ENODEV; + } + cpumask_copy(&ctrl->mem.cpu_mask, cpumask_of_node(node_id)); + break; + } default: pr_warn("controller at %pa: unknown type %u, skipping\n", &ctrl->addr, info->type); diff --git a/drivers/resctrl/cbqri_internal.h b/drivers/resctrl/cbqri_internal.h index b1169ffc599fb6..11a00f8e743681 100644 --- a/drivers/resctrl/cbqri_internal.h +++ b/drivers/resctrl/cbqri_internal.h @@ -9,13 +9,22 @@ #include #include -/* Capacity Controller (CC) MMIO register offsets. */ +/* + * Capacity Controller (CC) and Bandwidth Controller (BC) MMIO register + * offsets. + */ #define CBQRI_CC_CAPABILITIES_OFF 0 #define CBQRI_CC_MON_CTL_OFF 8 #define CBQRI_CC_MON_CTL_VAL_OFF 16 #define CBQRI_CC_ALLOC_CTL_OFF 24 #define CBQRI_CC_BLOCK_MASK_OFF 32 +#define CBQRI_BC_CAPABILITIES_OFF 0 +#define CBQRI_BC_MON_CTL_OFF 8 +#define CBQRI_BC_MON_CTR_VAL_OFF 16 +#define CBQRI_BC_ALLOC_CTL_OFF 24 +#define CBQRI_BC_BW_ALLOC_OFF 32 + /* * Smallest MMIO span the driver actually accesses: highest defined * register offset (0x20) plus the 8-byte register width. Used by @@ -29,6 +38,11 @@ #define CBQRI_CC_CAPABILITIES_VER_MAJOR_MASK GENMASK(7, 4) #define CBQRI_CC_CAPABILITIES_NCBLKS_MASK GENMASK(23, 8) +#define CBQRI_BC_CAPABILITIES_VER_MINOR_MASK GENMASK(3, 0) +#define CBQRI_BC_CAPABILITIES_VER_MAJOR_MASK GENMASK(7, 4) +#define CBQRI_BC_CAPABILITIES_NBWBLKS_MASK GENMASK(23, 8) +#define CBQRI_BC_CAPABILITIES_MRBWB_MASK GENMASK_ULL(47, 32) + #define CBQRI_CONTROL_REGISTERS_OP_MASK GENMASK(4, 0) #define CBQRI_CONTROL_REGISTERS_AT_MASK GENMASK(7, 5) #define CBQRI_CONTROL_REGISTERS_AT_DATA 0 @@ -36,14 +50,22 @@ #define CBQRI_CONTROL_REGISTERS_RCID_MASK GENMASK(19, 8) #define CBQRI_CONTROL_REGISTERS_STATUS_MASK GENMASK_ULL(38, 32) #define CBQRI_CONTROL_REGISTERS_BUSY_MASK GENMASK_ULL(39, 39) +#define CBQRI_CONTROL_REGISTERS_RBWB_MASK GENMASK(15, 0) +#define CBQRI_CONTROL_REGISTERS_MWEIGHT_MASK GENMASK(27, 20) #define CBQRI_CC_ALLOC_CTL_OP_CONFIG_LIMIT 1 #define CBQRI_CC_ALLOC_CTL_OP_READ_LIMIT 2 #define CBQRI_CC_ALLOC_CTL_STATUS_SUCCESS 1 +#define CBQRI_BC_ALLOC_CTL_OP_CONFIG_LIMIT 1 +#define CBQRI_BC_ALLOC_CTL_OP_READ_LIMIT 2 +#define CBQRI_BC_ALLOC_CTL_STATUS_SUCCESS 1 + #define CBQRI_CC_MON_CTL_OP_CONFIG_EVENT 1 #define CBQRI_CC_MON_CTL_OP_READ_COUNTER 2 +#define CBQRI_BC_MON_CTL_OP_READ_COUNTER 2 + /* mon_ctl field masks (CC and BC share an identical OP/MCID/EVT_ID/STATUS layout) */ #define CBQRI_MON_CTL_OP_MASK GENMASK(4, 0) #define CBQRI_MON_CTL_MCID_MASK GENMASK(19, 8) @@ -61,6 +83,14 @@ struct riscv_cbqri_capacity_caps { bool supports_alloc_at_code; }; +/* Bandwidth Controller hardware capabilities */ +struct riscv_cbqri_bandwidth_caps { + u16 nbwblks; /* number of bandwidth blocks */ + u16 mrbwb; /* max reserved bw blocks */ + + bool supports_alloc_at_code; +}; + /** * enum cbqri_at - capacity controller access type for CDP * @CBQRI_AT_DATA: data access (CBQRI Table 1, AT=0) @@ -106,6 +136,7 @@ struct cbqri_controller { int ver_major; int ver_minor; + struct riscv_cbqri_bandwidth_caps bc; struct riscv_cbqri_capacity_caps cc; bool alloc_capable; @@ -117,6 +148,16 @@ struct cbqri_controller { u32 rcid_count; u32 mcid_count; + /* + * Per-RCID cache of the most recent Rbwb value applied via + * CONFIG_LIMIT. Lets cbqri_apply_rbwb() validate the + * sum(Rbwb) <= MRBWB invariant in O(rcid_count) memory accesses + * instead of O(rcid_count) READ_LIMIT round trips, each of which + * spends up to 1 ms in cbqri_wait_busy_flag() under ->lock. + * Allocated by cbqri_probe_bc(). NULL on capacity controllers. + */ + u16 *rbwb_cache; + struct list_head list; struct cache_controller { @@ -126,6 +167,12 @@ struct cbqri_controller { /* Unique Cache ID from the PPTT table's Cache Type Structure */ u32 cache_id; } cache; + + struct mem_controller { + /* Proximity Domain from SRAT table Memory Affinity Controller */ + u32 prox_dom; + struct cpumask cpu_mask; + } mem; }; extern struct list_head cbqri_controllers; @@ -143,4 +190,14 @@ int cbqri_mon_op(struct cbqri_controller *ctrl, int reg_offset, int cbqri_init_mon_counters(struct cbqri_controller *ctrl); +int cbqri_apply_rbwb(struct cbqri_controller *ctrl, u32 closid, + u64 rbwb, bool check_sum); + +int cbqri_apply_mweight_config(struct cbqri_controller *ctrl, u32 closid, + u64 mweight); + +int cbqri_read_rbwb(struct cbqri_controller *ctrl, u32 closid, u64 *rbwb_out); + +int cbqri_read_mweight(struct cbqri_controller *ctrl, u32 closid, u64 *mweight_out); + #endif /* _DRIVERS_RESCTRL_CBQRI_INTERNAL_H */ From e1a074a1f17ad58d6dc801e44006fb5bd82afdd6 Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Sun, 10 May 2026 22:11:06 -0700 Subject: [PATCH 11/19] riscv_cbqri: Add bandwidth controller monitoring device ops Add the BC monitoring primitives. cbqri_init_bc_mon_counters() pre- arms each MCID with the TOTAL_READ_WRITE event and allocates the per-MCID software accumulator (struct cbqri_bc_mon_state) so subsequent reads can extend the 62-bit hardware counter to the 64-bit byte total resctrl expects. cbqri_bc_mon_overflow() recovers a single-wrap delta. The OVF bit signals multi-wrap and is the caller's concern. cbqri_find_only_mon_bc() returns NULL when zero or more than one mon-capable BC is present. A BC's counter can only accurately back L3 mbm_total_bytes when every memory request flows through that BC. Assisted-by: Claude:claude-opus-4-7 Co-developed-by: Adrien Ricciardi Signed-off-by: Adrien Ricciardi Signed-off-by: Drew Fustini Signed-off-by: Linux RISC-V bot --- drivers/resctrl/cbqri_devices.c | 75 ++++++++++++++++++++++++++++++++ drivers/resctrl/cbqri_internal.h | 37 ++++++++++++++++ 2 files changed, 112 insertions(+) diff --git a/drivers/resctrl/cbqri_devices.c b/drivers/resctrl/cbqri_devices.c index 7e5decd7a6b2e0..0b17a25b009cda 100644 --- a/drivers/resctrl/cbqri_devices.c +++ b/drivers/resctrl/cbqri_devices.c @@ -820,8 +820,83 @@ int cbqri_init_mon_counters(struct cbqri_controller *ctrl) return 0; } +/* + * 62-bit BC counter delta. Inputs must be pre-masked to + * CBQRI_BC_MON_CTR_VAL_CTR_MASK. The shift promotes the modular + * subtraction into 64-bit so a single wrap (cur < prev) yields the + * correct delta. Multi-wrap is handled by the caller via the + * hardware OVF bit (CBQRI 4.3). This function only needs to recover + * from at most one wrap. + */ +u64 cbqri_bc_mon_overflow(u64 prev_ctr, u64 cur_ctr) +{ + const unsigned int shift = 64 - 62; + u64 chunks = (cur_ctr << shift) - (prev_ctr << shift); + + return chunks >> shift; +} + +/* + * Allocate the per-MCID software accumulator and pre-arm every MCID + * with TOTAL_READ_WRITE so subsequent reads just snapshot the live + * counter. + * + * Caller responsibility: serialize concurrent invocations on the same + * single mon-capable BC (cbqri_resctrl uses cbqri_domain_list_lock for + * this). + */ +int cbqri_init_bc_mon_counters(struct cbqri_controller *bc) +{ + int i, err; + + if (bc->mbm_total_states) + return 0; + + bc->mbm_total_states = kcalloc(bc->mcid_count, + sizeof(*bc->mbm_total_states), + GFP_KERNEL); + if (!bc->mbm_total_states) + return -ENOMEM; + + for (i = 0; i < bc->mcid_count; i++) { + mutex_lock(&bc->lock); + err = cbqri_mon_op(bc, CBQRI_BC_MON_CTL_OFF, + CBQRI_BC_MON_CTL_OP_CONFIG_EVENT, + i, CBQRI_BC_EVT_ID_TOTAL_READ_WRITE, NULL); + mutex_unlock(&bc->lock); + if (err) { + kfree(bc->mbm_total_states); + bc->mbm_total_states = NULL; + return err; + } + } + return 0; +} + +/* + * Return the single mon-capable BC, NULL if zero or more than one. BC + * counters can only honestly surface as L3 mbm_total_bytes if every memory + * request flows through the same BC. + */ +struct cbqri_controller *cbqri_find_only_mon_bc(void) +{ + struct cbqri_controller *ctrl, *only_bc = NULL; + + list_for_each_entry(ctrl, &cbqri_controllers, list) { + if (ctrl->type != CBQRI_CONTROLLER_TYPE_BANDWIDTH) + continue; + if (!ctrl->mon_capable) + continue; + if (only_bc) + return NULL; + only_bc = ctrl; + } + return only_bc; +} + void cbqri_controller_destroy(struct cbqri_controller *ctrl) { + kfree(ctrl->mbm_total_states); kfree(ctrl->rbwb_cache); kfree(ctrl); } diff --git a/drivers/resctrl/cbqri_internal.h b/drivers/resctrl/cbqri_internal.h index 11a00f8e743681..1e5dd742273d5c 100644 --- a/drivers/resctrl/cbqri_internal.h +++ b/drivers/resctrl/cbqri_internal.h @@ -64,8 +64,17 @@ #define CBQRI_CC_MON_CTL_OP_CONFIG_EVENT 1 #define CBQRI_CC_MON_CTL_OP_READ_COUNTER 2 +#define CBQRI_BC_MON_CTL_OP_CONFIG_EVENT 1 #define CBQRI_BC_MON_CTL_OP_READ_COUNTER 2 +/* Bandwidth usage monitoring event IDs (CBQRI spec Table 10) */ +#define CBQRI_BC_EVT_ID_TOTAL_READ_WRITE 1 + +/* bc_mon_ctr_val layout (CBQRI spec section 4.3, Figure 7) */ +#define CBQRI_BC_MON_CTR_VAL_CTR_MASK GENMASK_ULL(61, 0) +#define CBQRI_BC_MON_CTR_VAL_INVALID BIT_ULL(62) +#define CBQRI_BC_MON_CTR_VAL_OVF BIT_ULL(63) + /* mon_ctl field masks (CC and BC share an identical OP/MCID/EVT_ID/STATUS layout) */ #define CBQRI_MON_CTL_OP_MASK GENMASK(4, 0) #define CBQRI_MON_CTL_MCID_MASK GENMASK(19, 8) @@ -91,6 +100,19 @@ struct riscv_cbqri_bandwidth_caps { bool supports_alloc_at_code; }; +/** + * struct cbqri_bc_mon_state - per-MCID software accumulator for BC bandwidth + * @prev_ctr: previous 62-bit hardware snapshot (already masked to CTR field) + * @chunks: accumulated 64-bit byte total across hardware wraparounds + * + * Updated in resctrl_arch_rmid_read() under cbqri_controller::lock and + * zeroed by resctrl_arch_reset_rmid(). + */ +struct cbqri_bc_mon_state { + u64 prev_ctr; + u64 chunks; +}; + /** * enum cbqri_at - capacity controller access type for CDP * @CBQRI_AT_DATA: data access (CBQRI Table 1, AT=0) @@ -158,6 +180,15 @@ struct cbqri_controller { */ u16 *rbwb_cache; + /* + * Per-MCID 64-bit software accumulator for the BC's mbm_total_bytes + * event. Allocated by cbqri_init_bc_mon_counters() when this BC is + * paired with an L3 monitoring domain, sized by ->mcid_count. NULL + * on capacity controllers and on BCs that are not mon-paired. + * Protected by ->lock along with the surrounding MMIO sequence. + */ + struct cbqri_bc_mon_state *mbm_total_states; + struct list_head list; struct cache_controller { @@ -200,4 +231,10 @@ int cbqri_read_rbwb(struct cbqri_controller *ctrl, u32 closid, u64 *rbwb_out); int cbqri_read_mweight(struct cbqri_controller *ctrl, u32 closid, u64 *mweight_out); +u64 cbqri_bc_mon_overflow(u64 prev_ctr, u64 cur_ctr); + +int cbqri_init_bc_mon_counters(struct cbqri_controller *bc); + +struct cbqri_controller *cbqri_find_only_mon_bc(void); + #endif /* _DRIVERS_RESCTRL_CBQRI_INTERNAL_H */ From b7295b142420a9cff93c07daa176068058c0e7f1 Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Sun, 10 May 2026 22:11:07 -0700 Subject: [PATCH 12/19] riscv_cbqri: resctrl: Add cache allocation via capacity block mask Wire CBQRI capacity controllers into resctrl as RDT_RESOURCE_L2 and RDT_RESOURCE_L3 schemata. Mismatched CC caps at the same cache level are treated as a fatal configuration error since fs/resctrl exposes a single per-rid cap set. Domains are created lazily in the cpuhp online callback so cpu_mask reflects only currently online CPUs. Assisted-by: Claude:claude-opus-4-7 Co-developed-by: Adrien Ricciardi Signed-off-by: Adrien Ricciardi Signed-off-by: Drew Fustini Signed-off-by: Linux RISC-V bot --- MAINTAINERS | 2 + arch/riscv/Kconfig | 1 + arch/riscv/include/asm/resctrl.h | 152 ++++++ drivers/resctrl/Kconfig | 11 +- drivers/resctrl/Makefile | 1 + drivers/resctrl/cbqri_resctrl.c | 771 +++++++++++++++++++++++++++++++ 6 files changed, 935 insertions(+), 3 deletions(-) create mode 100644 arch/riscv/include/asm/resctrl.h create mode 100644 drivers/resctrl/cbqri_resctrl.c diff --git a/MAINTAINERS b/MAINTAINERS index 86fc6620392b2d..3142ffc876c0d8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -22978,9 +22978,11 @@ R: yunhui cui L: linux-riscv@lists.infradead.org S: Supported F: arch/riscv/include/asm/qos.h +F: arch/riscv/include/asm/resctrl.h F: arch/riscv/kernel/qos.c F: drivers/resctrl/cbqri_devices.c F: drivers/resctrl/cbqri_internal.h +F: drivers/resctrl/cbqri_resctrl.c F: include/linux/riscv_cbqri.h RISC-V RPMI AND MPXY DRIVERS diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index a7e87c49be2192..a0c73edbe73447 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -595,6 +595,7 @@ config RISCV_ISA_SSQOSID bool "Ssqosid extension support for supervisor mode Quality of Service ID" depends on 64BIT default n + select ARCH_HAS_CPU_RESCTRL help Adds support for the Ssqosid ISA extension (Supervisor-mode Quality of Service ID). diff --git a/arch/riscv/include/asm/resctrl.h b/arch/riscv/include/asm/resctrl.h new file mode 100644 index 00000000000000..282b5b59e3ee87 --- /dev/null +++ b/arch/riscv/include/asm/resctrl.h @@ -0,0 +1,152 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef _ASM_RISCV_RESCTRL_H +#define _ASM_RISCV_RESCTRL_H + +#include +#include +#include + +#include + +struct rdt_resource; + +/* + * Sentinel "no CLOSID assigned" used by resctrl_arch_rmid_idx_decode(). + * fs/resctrl treats this opaquely. CBQRI uses MCID directly as the linear + * rmid index, so closid is unused on decode. + */ +#define RISCV_RESCTRL_EMPTY_CLOSID ((u32)~0) + +/* + * Terminology mapping between x86 (Intel RDT/AMD QoS) and RISC-V: + * + * CLOSID on x86 is RCID on RISC-V + * RMID on x86 is MCID on RISC-V + * CDP on x86 is AT (access type) on RISC-V + * + * Each fast-path arch entry point below is the RISC-V realization of the + * generic contract documented in . Comments here describe + * only the RISC-V-specific behavior (srmcfg encoding, CBQRI controller + * lookup, MCID-as-index policy). + */ + +/** + * resctrl_arch_alloc_capable() - any CBQRI controller exposes resctrl alloc + * + * Returns true once at least one CBQRI controller has successfully probed for + * a resctrl-exposed allocation feature (cache capacity or memory bandwidth). + * Only meaningful after cbqri_resctrl_setup() runs at late_initcall. + */ +bool resctrl_arch_alloc_capable(void); + +/** + * resctrl_arch_mon_capable() - any CBQRI controller exposes resctrl monitoring + * + * Returns true once at least one CBQRI controller has successfully probed a + * monitoring event wired through resctrl (L3 occupancy or L3 mbm_total_bytes). + */ +bool resctrl_arch_mon_capable(void); + +/** + * resctrl_arch_rmid_idx_encode() - encode (RCID, MCID) into a linear index + * @closid: RCID (resource control id) + * @rmid: MCID (monitoring counter id) + * + * RISC-V uses MCID directly as the linear index into per-RMID arrays + * managed by fs/resctrl, since CBQRI controllers admit any MCID for any + * RCID. closid is unused here. CDP is encoded via the AT field on each + * CBQRI op rather than via the index. + */ +u32 resctrl_arch_rmid_idx_encode(u32 closid, u32 rmid); + +/** + * resctrl_arch_rmid_idx_decode() - inverse of resctrl_arch_rmid_idx_encode() + * @idx: linear index + * @closid: out: always RISCV_RESCTRL_EMPTY_CLOSID + * @rmid: out: the MCID that @idx encodes + */ +void resctrl_arch_rmid_idx_decode(u32 idx, u32 *closid, u32 *rmid); + +/** + * resctrl_arch_set_cpu_default_closid_rmid() - install per-CPU srmcfg default + * @cpu: CPU number + * @closid: RCID to use when no task is matched + * @rmid: MCID to use when no task is matched + * + * Sets the per-CPU cpu_srmcfg_default so __switch_to_srmcfg() can fall back + * to the CPU's default RCID/MCID for default-group tasks (those whose + * thread.srmcfg encodes to 0, i.e. closid == RESCTRL_RESERVED_CLOSID and + * rmid == RESCTRL_RESERVED_RMID). Implements resctrl allocation rule 2 + * ("CPU default") on RISC-V. + */ +void resctrl_arch_set_cpu_default_closid_rmid(int cpu, u32 closid, u32 rmid); + +/** + * resctrl_arch_sched_in() - context-switch hook to install task RCID/MCID + * @tsk: the task being scheduled in + * + * Called from finish_task_switch() to write tsk->thread.srmcfg into the + * srmcfg CSR. Tasks tagged with RISCV_RESCTRL_EMPTY_CLOSID inherit the + * per-CPU default set via resctrl_arch_set_cpu_default_closid_rmid(). + */ +void resctrl_arch_sched_in(struct task_struct *tsk); + +/** + * resctrl_arch_set_closid_rmid() - tag a task with an RCID/MCID + * @tsk: task to tag + * @closid: RCID to install + * @rmid: MCID to install + * + * Updates tsk->thread.srmcfg with the encoded (RCID, MCID) pair. The new + * value takes effect on the next resctrl_arch_sched_in() for this task. + */ +void resctrl_arch_set_closid_rmid(struct task_struct *tsk, u32 closid, u32 rmid); + +/** + * resctrl_arch_match_closid() - test whether a task carries a given RCID + * @tsk: task + * @closid: RCID + */ +bool resctrl_arch_match_closid(struct task_struct *tsk, u32 closid); + +/** + * resctrl_arch_match_rmid() - test whether a task carries a given (RCID, MCID) + * @tsk: task + * @closid: RCID + * @rmid: MCID + */ +bool resctrl_arch_match_rmid(struct task_struct *tsk, u32 closid, u32 rmid); + +/** + * resctrl_arch_mon_ctx_alloc() - allocate per-monitor-event arch context + * @r: resctrl resource being monitored + * @evtid: which monitor event needs context + * + * Returns an opaque pointer that resctrl_arch_rmid_read() can use to find the + * CBQRI controller backing this event. CBQRI's BC bandwidth context is + * keyed off the resource's L3 monitoring domain rather than per-event state, + * so this implementation returns NULL. + */ +void *resctrl_arch_mon_ctx_alloc(struct rdt_resource *r, enum resctrl_event_id evtid); + +/** + * resctrl_arch_mon_ctx_free() - release context returned by mon_ctx_alloc() + * @r: resctrl resource + * @evtid: monitor event id + * @arch_mon_ctx: pointer returned by resctrl_arch_mon_ctx_alloc() + */ +void resctrl_arch_mon_ctx_free(struct rdt_resource *r, enum resctrl_event_id evtid, + void *arch_mon_ctx); + +static inline unsigned int resctrl_arch_round_mon_val(unsigned int val) +{ + return val; +} + +/* Not needed for RISC-V */ +static inline void resctrl_arch_enable_mon(void) { } +static inline void resctrl_arch_disable_mon(void) { } +static inline void resctrl_arch_enable_alloc(void) { } +static inline void resctrl_arch_disable_alloc(void) { } + +#endif /* _ASM_RISCV_RESCTRL_H */ diff --git a/drivers/resctrl/Kconfig b/drivers/resctrl/Kconfig index d578bc7aed8509..7f8c1257e0b3e8 100644 --- a/drivers/resctrl/Kconfig +++ b/drivers/resctrl/Kconfig @@ -52,8 +52,13 @@ config RISCV_CBQRI_DRIVER_DEBUG help Say yes here to enable debug messages from the CBQRI driver. - This adds pr_debug() output covering controller probe and - per-controller registration steps. Useful when bringing up a - new platform; otherwise leave disabled to avoid log noise. + This adds pr_debug() output covering controller probe, + resctrl resource pick decisions, and per-domain registration + steps. Useful when bringing up a new platform; otherwise + leave disabled to avoid log noise. endif + +config RISCV_CBQRI_RESCTRL_FS + bool + default y if RISCV_CBQRI_DRIVER && RESCTRL_FS diff --git a/drivers/resctrl/Makefile b/drivers/resctrl/Makefile index 28085036d895cd..ed737b4461b975 100644 --- a/drivers/resctrl/Makefile +++ b/drivers/resctrl/Makefile @@ -6,5 +6,6 @@ ccflags-$(CONFIG_ARM64_MPAM_DRIVER_DEBUG) += -DDEBUG obj-$(CONFIG_RISCV_CBQRI_DRIVER) += cbqri.o cbqri-y += cbqri_devices.o +cbqri-$(CONFIG_RISCV_CBQRI_RESCTRL_FS) += cbqri_resctrl.o ccflags-$(CONFIG_RISCV_CBQRI_DRIVER_DEBUG) += -DDEBUG diff --git a/drivers/resctrl/cbqri_resctrl.c b/drivers/resctrl/cbqri_resctrl.c new file mode 100644 index 00000000000000..82b157d35576bf --- /dev/null +++ b/drivers/resctrl/cbqri_resctrl.c @@ -0,0 +1,771 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#define pr_fmt(fmt) "%s:%s: " fmt, KBUILD_MODNAME, __func__ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "cbqri_internal.h" + +struct cbqri_resctrl_res { + struct cbqri_controller *ctrl; + struct rdt_resource resctrl_res; + bool cdp_enabled; +}; + +struct cbqri_resctrl_dom { + struct rdt_ctrl_domain resctrl_ctrl_dom; + struct cbqri_controller *hw_ctrl; +}; + +static struct cbqri_resctrl_res cbqri_resctrl_resources[RDT_NUM_RESOURCES]; + +/* + * cacheinfo populates the cache id <-> cpumask mapping from a + * device_initcall(). cbqri_resctrl_setup() runs at late_initcall, which + * already happens after device_initcall_sync, but synchronize explicitly + * so future initcall-order shifts (or a switch to platform-driver style) + * cannot break it. + */ +static bool cacheinfo_ready; +static DECLARE_WAIT_QUEUE_HEAD(wait_cacheinfo_ready); + +static bool exposed_alloc_capable; + +/* Protects ctrl_domain list mutations across CPU hotplug. */ +static DEFINE_MUTEX(cbqri_domain_list_lock); + +static struct rdt_ctrl_domain * +cbqri_find_ctrl_domain(struct list_head *h, int id) +{ + struct rdt_domain_hdr *hdr = resctrl_find_domain(h, id, NULL); + + return hdr ? container_of(hdr, struct rdt_ctrl_domain, hdr) : NULL; +} + +/* + * Resctrl-side wrapper around the device-side cbqri_apply_cache_config(). + * Builds the hardware config struct from resctrl-side state (cdp flag, AT + * type) and delegates the MMIO sequence to cbqri_devices.c. + */ +static int cbqri_apply_cache_config_dom(struct cbqri_resctrl_dom *hw_dom, + struct rdt_resource *r, + u32 closid, enum resctrl_conf_type t, + u64 cbm) +{ + struct cbqri_resctrl_res *hw_res = + container_of(r, struct cbqri_resctrl_res, resctrl_res); + struct cbqri_cc_config cfg = { + .cbm = cbm, + .at = (t == CDP_CODE) ? CBQRI_AT_CODE : CBQRI_AT_DATA, + .cdp_enabled = hw_res->cdp_enabled, + }; + + return cbqri_apply_cache_config(hw_dom->hw_ctrl, closid, &cfg); +} + +bool resctrl_arch_alloc_capable(void) +{ + return exposed_alloc_capable; +} + +bool resctrl_arch_mon_capable(void) +{ + return false; +} + +bool resctrl_arch_get_cdp_enabled(enum resctrl_res_level rid) +{ + if (rid != RDT_RESOURCE_L2 && rid != RDT_RESOURCE_L3) + return false; + return cbqri_resctrl_resources[rid].cdp_enabled; +} + +int resctrl_arch_set_cdp_enabled(enum resctrl_res_level rid, bool enable) +{ + struct cbqri_resctrl_res *cbqri_res; + + if (rid != RDT_RESOURCE_L2 && rid != RDT_RESOURCE_L3) + return -ENODEV; + + cbqri_res = &cbqri_resctrl_resources[rid]; + if (!cbqri_res->resctrl_res.cdp_capable) + return -ENODEV; + + cbqri_res->cdp_enabled = enable; + return 0; +} + +struct rdt_resource *resctrl_arch_get_resource(enum resctrl_res_level l) +{ + if (l >= RDT_NUM_RESOURCES) + return NULL; + + return &cbqri_resctrl_resources[l].resctrl_res; +} + +/* + * fs/resctrl unconditionally references the symbols below before checking + * mon_capable. They are stubs for features CBQRI does not yet support + * (counter assignment, I/O allocation, event configuration). + */ +bool resctrl_arch_is_evt_configurable(enum resctrl_event_id evt) +{ + return false; +} + +void *resctrl_arch_mon_ctx_alloc(struct rdt_resource *r, + enum resctrl_event_id evtid) +{ + return NULL; +} + +void resctrl_arch_mon_ctx_free(struct rdt_resource *r, + enum resctrl_event_id evtid, void *arch_mon_ctx) +{ +} + +void resctrl_arch_config_cntr(struct rdt_resource *r, struct rdt_l3_mon_domain *d, + enum resctrl_event_id evtid, u32 rmid, u32 closid, + u32 cntr_id, bool assign) +{ +} + +int resctrl_arch_cntr_read(struct rdt_resource *r, struct rdt_l3_mon_domain *d, + u32 unused, u32 rmid, int cntr_id, + enum resctrl_event_id eventid, u64 *val) +{ + return -EOPNOTSUPP; +} + +bool resctrl_arch_mbm_cntr_assign_enabled(struct rdt_resource *r) +{ + return false; +} + +int resctrl_arch_mbm_cntr_assign_set(struct rdt_resource *r, bool enable) +{ + return -EOPNOTSUPP; +} + +void resctrl_arch_reset_cntr(struct rdt_resource *r, struct rdt_l3_mon_domain *d, + u32 unused, u32 rmid, int cntr_id, + enum resctrl_event_id eventid) +{ +} + +bool resctrl_arch_get_io_alloc_enabled(struct rdt_resource *r) +{ + return false; +} + +int resctrl_arch_io_alloc_enable(struct rdt_resource *r, bool enable) +{ + return -EOPNOTSUPP; +} + +void resctrl_arch_mon_event_config_read(void *info) +{ +} + +void resctrl_arch_mon_event_config_write(void *info) +{ +} + +void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_l3_mon_domain *d) +{ +} + +void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_l3_mon_domain *d, + u32 unused, u32 rmid, enum resctrl_event_id eventid) +{ +} + +int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_domain_hdr *hdr, + u32 closid, u32 rmid, enum resctrl_event_id eventid, + void *arch_priv, u64 *val, void *arch_mon_ctx) +{ + return -ENODATA; +} + +/* + * Note about terminology between x86 (Intel RDT/AMD QoS) and RISC-V: + * CLOSID on x86 is RCID on RISC-V + * RMID on x86 is MCID on RISC-V + */ +u32 resctrl_arch_get_num_closid(struct rdt_resource *res) +{ + struct cbqri_resctrl_res *hw_res; + + hw_res = container_of(res, struct cbqri_resctrl_res, resctrl_res); + + /* + * fs/resctrl calls this for resctrl-defined rids that CBQRI may not + * back (e.g. RDT_RESOURCE_MBA from set_mba_sc() during unmount). + * Unpicked rids have ctrl == NULL. Report no closids. + */ + if (!hw_res->ctrl) + return 0; + + return hw_res->ctrl->rcid_count; +} + +u32 resctrl_arch_system_num_rmid_idx(void) +{ + return 1; +} + +u32 resctrl_arch_rmid_idx_encode(u32 closid, u32 rmid) +{ + return rmid; +} + +void resctrl_arch_rmid_idx_decode(u32 idx, u32 *closid, u32 *rmid) +{ + *closid = RISCV_RESCTRL_EMPTY_CLOSID; + *rmid = idx; +} + +void resctrl_arch_set_cpu_default_closid_rmid(int cpu, u32 closid, u32 rmid) +{ + u32 srmcfg = FIELD_PREP(SRMCFG_RCID_MASK, closid) | + FIELD_PREP(SRMCFG_MCID_MASK, rmid); + + WRITE_ONCE(per_cpu(cpu_srmcfg_default, cpu), srmcfg); +} + +void resctrl_arch_sched_in(struct task_struct *tsk) +{ + __switch_to_srmcfg(tsk); +} + +void resctrl_arch_set_closid_rmid(struct task_struct *tsk, u32 closid, u32 rmid) +{ + u32 srmcfg = FIELD_PREP(SRMCFG_RCID_MASK, closid) | + FIELD_PREP(SRMCFG_MCID_MASK, rmid); + + WRITE_ONCE(tsk->thread.srmcfg, srmcfg); +} + +void resctrl_arch_sync_cpu_closid_rmid(void *info) +{ + struct resctrl_cpu_defaults *r = info; + + lockdep_assert_preemption_disabled(); + + if (r) { + resctrl_arch_set_cpu_default_closid_rmid(smp_processor_id(), + r->closid, r->rmid); + } + + resctrl_arch_sched_in(current); +} + +bool resctrl_arch_match_closid(struct task_struct *tsk, u32 closid) +{ + return FIELD_GET(SRMCFG_RCID_MASK, READ_ONCE(tsk->thread.srmcfg)) == closid; +} + +bool resctrl_arch_match_rmid(struct task_struct *tsk, u32 closid, u32 rmid) +{ + return FIELD_GET(SRMCFG_MCID_MASK, READ_ONCE(tsk->thread.srmcfg)) == rmid; +} + +void resctrl_arch_pre_mount(void) +{ + /* All controllers discovered at boot via late_initcall. Nothing to do. */ +} + +int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_ctrl_domain *d, + u32 closid, enum resctrl_conf_type t, u32 cfg_val) +{ + struct cbqri_resctrl_dom *dom; + + dom = container_of(d, struct cbqri_resctrl_dom, resctrl_ctrl_dom); + + if (!r->alloc_capable) + return -EINVAL; + + switch (r->rid) { + case RDT_RESOURCE_L2: + case RDT_RESOURCE_L3: + return cbqri_apply_cache_config_dom(dom, r, closid, t, cfg_val); + default: + return -EINVAL; + } +} + +int resctrl_arch_update_domains(struct rdt_resource *r, u32 closid) +{ + struct resctrl_staged_config *cfg; + enum resctrl_conf_type t; + struct rdt_ctrl_domain *d; + int err = 0; + + /* Walking r->ctrl_domains, ensure it can't race with cpuhp */ + lockdep_assert_cpus_held(); + + list_for_each_entry(d, &r->ctrl_domains, hdr.list) { + for (t = 0; t < CDP_NUM_TYPES; t++) { + cfg = &d->staged_config[t]; + if (!cfg->have_new_ctrl) + continue; + err = resctrl_arch_update_one(r, d, closid, t, cfg->new_ctrl); + if (err) + return err; + } + } + return err; +} + +u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_ctrl_domain *d, + u32 closid, enum resctrl_conf_type type) +{ + struct cbqri_resctrl_dom *hw_dom; + struct cbqri_controller *ctrl; + enum cbqri_at at; + u32 val; + int err; + + hw_dom = container_of(d, struct cbqri_resctrl_dom, resctrl_ctrl_dom); + ctrl = hw_dom->hw_ctrl; + val = resctrl_get_default_ctrl(r); + + if (!r->alloc_capable) + return val; + + switch (r->rid) { + case RDT_RESOURCE_L2: + case RDT_RESOURCE_L3: + at = (type == CDP_CODE) ? CBQRI_AT_CODE : CBQRI_AT_DATA; + err = cbqri_read_cache_config(ctrl, closid, at, &val); + if (err < 0) + val = resctrl_get_default_ctrl(r); + break; + default: + break; + } + + return val; +} + +void resctrl_arch_reset_all_ctrls(struct rdt_resource *r) +{ + struct cbqri_resctrl_res *hw_res; + struct rdt_ctrl_domain *d; + enum resctrl_conf_type t; + u32 default_ctrl; + int i; + + lockdep_assert_cpus_held(); + + hw_res = container_of(r, struct cbqri_resctrl_res, resctrl_res); + default_ctrl = resctrl_get_default_ctrl(r); + + if (!hw_res->ctrl) + return; + + list_for_each_entry(d, &r->ctrl_domains, hdr.list) { + for (i = 0; i < hw_res->ctrl->rcid_count; i++) { + for (t = 0; t < CDP_NUM_TYPES; t++) { + int rerr; + + rerr = resctrl_arch_update_one(r, d, i, t, default_ctrl); + if (rerr) + pr_err_ratelimited("rid=%d reset RCID %u type %u failed (%d)\n", + r->rid, i, t, rerr); + } + } + } +} + +static struct rdt_ctrl_domain *cbqri_new_domain(struct cbqri_controller *ctrl) +{ + struct cbqri_resctrl_dom *hw_dom; + struct rdt_ctrl_domain *domain; + + hw_dom = kzalloc_obj(*hw_dom, GFP_KERNEL); + if (!hw_dom) + return NULL; + + hw_dom->hw_ctrl = ctrl; + domain = &hw_dom->resctrl_ctrl_dom; + + INIT_LIST_HEAD(&domain->hdr.list); + + return domain; +} + +static int cbqri_init_domain_ctrlval(struct rdt_resource *r, struct rdt_ctrl_domain *d) +{ + struct cbqri_resctrl_res *hw_res; + enum resctrl_conf_type t; + int err = 0; + int i; + + hw_res = container_of(r, struct cbqri_resctrl_res, resctrl_res); + + for (i = 0; i < hw_res->ctrl->rcid_count; i++) { + /* + * Seed both DATA and CODE staged slots so a later mount + * with -o cdp does not see stale CODE values. + * CDP_NUM_TYPES is 1 on non-CDP controllers. + */ + for (t = 0; t < CDP_NUM_TYPES; t++) { + err = resctrl_arch_update_one(r, d, i, t, + resctrl_get_default_ctrl(r)); + if (err) + return err; + } + } + return 0; +} + +/* + * Walk cbqri_controllers and pick one capacity controller (CC) per cache + * level (L2/L3) to back the corresponding RDT_RESOURCE_L*. When more than + * one CC sits at the same level (e.g. one per socket), they must agree on + * rcid_count / ncblks / alloc_capable. A mismatch is fatal because resctrl + * exposes a single set of caps per rid. The first matching controller wins. + */ +static int cbqri_resctrl_pick_caches(void) +{ + struct cbqri_controller *ctrl; + + list_for_each_entry(ctrl, &cbqri_controllers, list) { + struct cbqri_resctrl_res *cbqri_res; + enum resctrl_res_level rid; + + if (ctrl->type != CBQRI_CONTROLLER_TYPE_CAPACITY) + continue; + if (!ctrl->alloc_capable) + continue; + + if (ctrl->cache.cache_level == 2) { + rid = RDT_RESOURCE_L2; + } else if (ctrl->cache.cache_level == 3) { + rid = RDT_RESOURCE_L3; + } else { + pr_err("unknown cache level %d\n", + ctrl->cache.cache_level); + return -ENODEV; + } + + cbqri_res = &cbqri_resctrl_resources[rid]; + if (cbqri_res->ctrl) { + /* + * CCs at the same cache level must agree on every cap + * resctrl exposes globally. Reject mismatches at pick + * time so the inconsistency is visible at boot. + */ + if (cbqri_res->ctrl->rcid_count != ctrl->rcid_count || + cbqri_res->ctrl->cc.ncblks != ctrl->cc.ncblks || + cbqri_res->ctrl->cc.supports_alloc_at_code != + ctrl->cc.supports_alloc_at_code || + cbqri_res->ctrl->alloc_capable != ctrl->alloc_capable) { + pr_err("L%d controllers have mismatched capabilities\n", + ctrl->cache.cache_level); + return -EINVAL; + } + continue; + } + + cbqri_res->ctrl = ctrl; + } + + return 0; +} + +/* + * Fill the rdt_resource fields for one picked rid. An rid with no picked + * controller is left untouched so it stays out of resctrl_arch_get_resource(). + */ +static int cbqri_resctrl_control_init(struct cbqri_resctrl_res *cbqri_res) +{ + struct cbqri_controller *ctrl = cbqri_res->ctrl; + struct rdt_resource *res = &cbqri_res->resctrl_res; + + if (!ctrl) + return 0; + + switch (res->rid) { + case RDT_RESOURCE_L2: + case RDT_RESOURCE_L3: + res->name = (res->rid == RDT_RESOURCE_L2) ? "L2" : "L3"; + res->schema_fmt = RESCTRL_SCHEMA_BITMAP; + res->ctrl_scope = (res->rid == RDT_RESOURCE_L2) ? + RESCTRL_L2_CACHE : RESCTRL_L3_CACHE; + res->cache.cbm_len = ctrl->cc.ncblks; + /* No external uncore agents claim CBM bits, so the full mask is available. */ + res->cache.shareable_bits = 0; + res->cache.min_cbm_bits = 1; + res->cache.arch_has_sparse_bitmasks = false; + res->cdp_capable = ctrl->cc.supports_alloc_at_code; + res->alloc_capable = ctrl->alloc_capable; + INIT_LIST_HEAD(&res->ctrl_domains); + INIT_LIST_HEAD(&res->mon_domains); + break; + default: + break; + } + + return 0; +} + +static void cbqri_resctrl_accumulate_caps(void) +{ + int rid; + + for (rid = 0; rid < RDT_NUM_RESOURCES; rid++) { + struct cbqri_resctrl_res *hw_res = &cbqri_resctrl_resources[rid]; + + if (!hw_res->ctrl) + continue; + if (hw_res->ctrl->alloc_capable) + exposed_alloc_capable = true; + } +} + +/* + * Create, list-insert, and online a fresh ctrl_domain backing ctrl on + * resource res, seeded with cpu and identified by dom_id. Caller must + * hold cbqri_domain_list_lock and must have already verified that no + * existing ctrl_domain on res carries this id. + */ +static struct rdt_ctrl_domain *cbqri_create_ctrl_domain(struct cbqri_controller *ctrl, + struct rdt_resource *res, + unsigned int cpu, int dom_id) +{ + struct rdt_ctrl_domain *domain; + struct list_head *pos = NULL; + int err; + + domain = cbqri_new_domain(ctrl); + if (!domain) + return ERR_PTR(-ENOMEM); + + cpumask_set_cpu(cpu, &domain->hdr.cpu_mask); + domain->hdr.id = dom_id; + domain->hdr.type = RESCTRL_CTRL_DOMAIN; + + err = cbqri_init_domain_ctrlval(res, domain); + if (err) { + kfree(container_of(domain, struct cbqri_resctrl_dom, + resctrl_ctrl_dom)); + return ERR_PTR(err); + } + + /* Insert sorted by id so user-visible ordering is deterministic. */ + resctrl_find_domain(&res->ctrl_domains, dom_id, &pos); + list_add_tail_rcu(&domain->hdr.list, pos); + + resctrl_online_ctrl_domain(res, domain); + + return domain; +} + +static int cbqri_attach_cpu_to_cap_ctrl(struct cbqri_controller *ctrl, + unsigned int cpu) +{ + struct cbqri_resctrl_res *hw_res; + struct rdt_ctrl_domain *domain; + struct rdt_resource *res; + int dom_id; + + if (ctrl->cache.cache_level == 2) + hw_res = &cbqri_resctrl_resources[RDT_RESOURCE_L2]; + else if (ctrl->cache.cache_level == 3) + hw_res = &cbqri_resctrl_resources[RDT_RESOURCE_L3]; + else + return 0; + + if (!hw_res->ctrl) + return 0; + + res = &hw_res->resctrl_res; + dom_id = ctrl->cache.cache_id; + + domain = cbqri_find_ctrl_domain(&res->ctrl_domains, dom_id); + if (domain) { + cpumask_set_cpu(cpu, &domain->hdr.cpu_mask); + return 0; + } + + domain = cbqri_create_ctrl_domain(ctrl, res, cpu, dom_id); + if (IS_ERR(domain)) + return PTR_ERR(domain); + + return 0; +} + +static void cbqri_detach_cpu_from_ctrl_domains(struct rdt_resource *res, + unsigned int cpu) +{ + struct rdt_ctrl_domain *domain, *tmp; + + list_for_each_entry_safe(domain, tmp, &res->ctrl_domains, hdr.list) { + if (!cpumask_test_cpu(cpu, &domain->hdr.cpu_mask)) + continue; + cpumask_clear_cpu(cpu, &domain->hdr.cpu_mask); + if (cpumask_empty(&domain->hdr.cpu_mask)) { + resctrl_offline_ctrl_domain(res, domain); + list_del_rcu(&domain->hdr.list); + synchronize_rcu(); + kfree(container_of(domain, struct cbqri_resctrl_dom, + resctrl_ctrl_dom)); + } + } +} + +static bool cbqri_resctrl_inited; + +static void cbqri_resctrl_teardown(void) +{ + int rid; + + if (!cbqri_resctrl_inited) + return; + + resctrl_exit(); + + for (rid = 0; rid < RDT_NUM_RESOURCES; rid++) { + struct cbqri_resctrl_res *hw_res = &cbqri_resctrl_resources[rid]; + + hw_res->ctrl = NULL; + hw_res->cdp_enabled = false; + } + exposed_alloc_capable = false; + cbqri_resctrl_inited = false; +} + +static int cbqri_resctrl_setup(void) +{ + int rid; + int err; + + /* Wait for cacheinfo so cbqri_probe_cc()'s lazy fill has data. */ + wait_event(wait_cacheinfo_ready, cacheinfo_ready); + + for (rid = 0; rid < RDT_NUM_RESOURCES; rid++) + cbqri_resctrl_resources[rid].resctrl_res.rid = rid; + + err = cbqri_resctrl_pick_caches(); + if (err) + return err; + + for (rid = 0; rid < RDT_NUM_RESOURCES; rid++) { + err = cbqri_resctrl_control_init(&cbqri_resctrl_resources[rid]); + if (err) + return err; + } + + cbqri_resctrl_accumulate_caps(); + + if (!exposed_alloc_capable) { + pr_debug("no resctrl-capable CBQRI controllers found\n"); + return -ENODEV; + } + + err = resctrl_init(); + if (err) + return err; + + cbqri_resctrl_inited = true; + return 0; +} + +static int cbqri_resctrl_online_cpu(unsigned int cpu) +{ + struct cbqri_controller *ctrl; + int err = 0; + + mutex_lock(&cbqri_domain_list_lock); + + list_for_each_entry(ctrl, &cbqri_controllers, list) { + if (ctrl->type != CBQRI_CONTROLLER_TYPE_CAPACITY) + continue; + if (!cpumask_test_cpu(cpu, &ctrl->cache.cpu_mask)) + continue; + if (!ctrl->alloc_capable) + continue; + + err = cbqri_attach_cpu_to_cap_ctrl(ctrl, cpu); + if (err) + break; + } + + mutex_unlock(&cbqri_domain_list_lock); + return err; +} + +static int cbqri_resctrl_offline_cpu(unsigned int cpu) +{ + int rid; + + mutex_lock(&cbqri_domain_list_lock); + + for (rid = 0; rid < RDT_NUM_RESOURCES; rid++) { + struct cbqri_resctrl_res *hw_res = &cbqri_resctrl_resources[rid]; + + if (!hw_res->ctrl) + continue; + cbqri_detach_cpu_from_ctrl_domains(&hw_res->resctrl_res, cpu); + } + + mutex_unlock(&cbqri_domain_list_lock); + return 0; +} + +static int __init __cacheinfo_ready(void) +{ + cacheinfo_ready = true; + wake_up(&wait_cacheinfo_ready); + return 0; +} +device_initcall_sync(__cacheinfo_ready); + +/* Saved cpuhp slot from cpuhp_setup_state() for symmetric removal. */ +static enum cpuhp_state cbqri_cpuhp_state; + +static int __init cbqri_arch_late_init(void) +{ + int err; + + if (!riscv_isa_extension_available(NULL, SSQOSID)) + return -ENODEV; + + /* + * cbqri_resctrl_setup() is responsible for its own cleanup on any + * failure path, including the resctrl_init() that happens inside it, + * via cbqri_resctrl_teardown(). Don't call resctrl_exit() here, it + * might run before resctrl_init() did. + */ + err = cbqri_resctrl_setup(); + if (err) + return err; + + err = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "cbqri:online", + cbqri_resctrl_online_cpu, + cbqri_resctrl_offline_cpu); + if (err < 0) { + cbqri_resctrl_teardown(); + return err; + } + cbqri_cpuhp_state = err; + + return 0; +} +late_initcall(cbqri_arch_late_init); From 2ce6be1dc7977d845091a5ea81fb2a73fc147eb3 Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Sun, 10 May 2026 22:11:08 -0700 Subject: [PATCH 13/19] riscv_cbqri: resctrl: Add L3 cache occupancy monitoring Expose QOS_L3_OCCUP_EVENT_ID so userspace can read per-MCID llc_occupancy. The result is converted from capacity blocks to bytes using cache_size and ncblks. resctrl_arch_reset_rmid() re-arms CONFIG_EVENT with EVT_ID=Occupancy. CONFIG_EVENT both resets the counter to 0 and selects the event, so re-arming with the same event keeps the MCID counting after reset rather than relying on sticky-last-event semantics that the CBQRI register definition does not guarantee. The L3 mon_domain is created lazily on the first CPU of a cache_id and linked to the paired ctrl_domain. Assisted-by: Claude:claude-opus-4-7 Co-developed-by: Adrien Ricciardi Signed-off-by: Adrien Ricciardi Signed-off-by: Drew Fustini Signed-off-by: Linux RISC-V bot --- drivers/resctrl/cbqri_resctrl.c | 272 ++++++++++++++++++++++++++++++-- 1 file changed, 260 insertions(+), 12 deletions(-) diff --git a/drivers/resctrl/cbqri_resctrl.c b/drivers/resctrl/cbqri_resctrl.c index 82b157d35576bf..d8fd9b06703faf 100644 --- a/drivers/resctrl/cbqri_resctrl.c +++ b/drivers/resctrl/cbqri_resctrl.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -33,6 +34,13 @@ struct cbqri_resctrl_dom { static struct cbqri_resctrl_res cbqri_resctrl_resources[RDT_NUM_RESOURCES]; +/* + * Per-event controller table. Only events CBQRI can back occupy a + * slot, so other events do not bloat the array. + */ +#define CBQRI_MAX_EVENT QOS_L3_OCCUP_EVENT_ID +static struct cbqri_controller *cbqri_resctrl_counters[CBQRI_MAX_EVENT + 1]; + /* * cacheinfo populates the cache id <-> cpumask mapping from a * device_initcall(). cbqri_resctrl_setup() runs at late_initcall, which @@ -44,6 +52,10 @@ static bool cacheinfo_ready; static DECLARE_WAIT_QUEUE_HEAD(wait_cacheinfo_ready); static bool exposed_alloc_capable; +static bool exposed_mon_capable; + +/* Used by resctrl_arch_system_num_rmid_idx(). Narrowed by accumulate_caps. */ +static u32 max_rmid = U32_MAX; /* Protects ctrl_domain list mutations across CPU hotplug. */ static DEFINE_MUTEX(cbqri_domain_list_lock); @@ -56,6 +68,14 @@ cbqri_find_ctrl_domain(struct list_head *h, int id) return hdr ? container_of(hdr, struct rdt_ctrl_domain, hdr) : NULL; } +static struct rdt_l3_mon_domain * +cbqri_find_l3_mon_domain(struct list_head *h, int id) +{ + struct rdt_domain_hdr *hdr = resctrl_find_domain(h, id, NULL); + + return hdr ? container_of(hdr, struct rdt_l3_mon_domain, hdr) : NULL; +} + /* * Resctrl-side wrapper around the device-side cbqri_apply_cache_config(). * Builds the hardware config struct from resctrl-side state (cdp flag, AT @@ -84,7 +104,7 @@ bool resctrl_arch_alloc_capable(void) bool resctrl_arch_mon_capable(void) { - return false; + return exposed_mon_capable; } bool resctrl_arch_get_cdp_enabled(enum resctrl_res_level rid) @@ -185,20 +205,112 @@ void resctrl_arch_mon_event_config_write(void *info) { } -void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_l3_mon_domain *d) +void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_l3_mon_domain *d, + u32 unused, u32 rmid, enum resctrl_event_id eventid) { + struct cbqri_resctrl_dom *hw_dom; + struct cbqri_controller *ctrl; + struct rdt_ctrl_domain *cd; + + /* Don't sleep with IRQs disabled. */ + if (irqs_disabled()) + return; + + switch (eventid) { + case QOS_L3_OCCUP_EVENT_ID: + cd = cbqri_find_ctrl_domain(&r->ctrl_domains, d->hdr.id); + if (!cd) + return; + + hw_dom = container_of(cd, struct cbqri_resctrl_dom, resctrl_ctrl_dom); + ctrl = hw_dom->hw_ctrl; + + mutex_lock(&ctrl->lock); + /* + * Re-arm with EVT_ID=OCCUPANCY (not None) on RMID recycle: + * this both zeros the counter and keeps the MCID counting, + * since cbqri_init_mon_counters() only runs once. + */ + if (cbqri_mon_op(ctrl, CBQRI_CC_MON_CTL_OFF, + CBQRI_CC_MON_CTL_OP_CONFIG_EVENT, + rmid, CBQRI_CC_EVT_ID_OCCUPANCY, NULL)) + pr_warn_ratelimited("CC@%pa MCID %u: occupancy reset failed\n", + &ctrl->addr, rmid); + mutex_unlock(&ctrl->lock); + return; + + default: + return; + } } -void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_l3_mon_domain *d, - u32 unused, u32 rmid, enum resctrl_event_id eventid) +void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_l3_mon_domain *d) { + int i; + + /* Bound by max_rmid (system-wide minimum mcid_count). */ + for (i = 0; i < max_rmid; i++) + resctrl_arch_reset_rmid(r, d, 0, i, QOS_L3_OCCUP_EVENT_ID); } int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_domain_hdr *hdr, u32 closid, u32 rmid, enum resctrl_event_id eventid, void *arch_priv, u64 *val, void *arch_mon_ctx) { - return -ENODATA; + struct cbqri_resctrl_dom *hw_dom; + struct cbqri_controller *ctrl; + struct rdt_ctrl_domain *d; + u64 ctr_val; + int err; + + resctrl_arch_rmid_read_context_check(); + + /* + * Each branch takes a sleeping mutex. Bail if called with IRQs + * disabled (e.g. smp_call_function_any() from nohz_full CPUs). + */ + if (irqs_disabled()) + return -EIO; + + switch (eventid) { + case QOS_L3_OCCUP_EVENT_ID: + /* Mon domain id matches the ctrl_domain id. Look up to get hw_ctrl. */ + d = cbqri_find_ctrl_domain(&r->ctrl_domains, hdr->id); + if (!d) + return -ENOENT; + + hw_dom = container_of(d, struct cbqri_resctrl_dom, resctrl_ctrl_dom); + ctrl = hw_dom->hw_ctrl; + + mutex_lock(&ctrl->lock); + + /* + * MCIDs are armed with Occupancy at init and re-armed on + * RMID recycle. Pass EVT_ID explicitly: the CBQRI spec + * does not guarantee sticky-last-configured-event for + * READ_COUNTER. + */ + err = cbqri_mon_op(ctrl, CBQRI_CC_MON_CTL_OFF, + CBQRI_CC_MON_CTL_OP_READ_COUNTER, + rmid, CBQRI_CC_EVT_ID_OCCUPANCY, NULL); + if (err) + goto out_cc; + + ctr_val = ioread64(ctrl->base + CBQRI_CC_MON_CTL_VAL_OFF); + + /* + * Capacity blocks to bytes. Multiply before divide so a + * non-power-of-2 ncblks doesn't truncate. Both terms fit + * in u64 with room to spare. + */ + *val = (u64)ctrl->cache.cache_size * ctr_val / ctrl->cc.ncblks; +out_cc: + mutex_unlock(&ctrl->lock); + return err; + + default: + return -EINVAL; + } } /* @@ -225,7 +337,7 @@ u32 resctrl_arch_get_num_closid(struct rdt_resource *res) u32 resctrl_arch_system_num_rmid_idx(void) { - return 1; + return max_rmid; } u32 resctrl_arch_rmid_idx_encode(u32 closid, u32 rmid) @@ -517,6 +629,14 @@ static int cbqri_resctrl_control_init(struct cbqri_resctrl_res *cbqri_res) res->alloc_capable = ctrl->alloc_capable; INIT_LIST_HEAD(&res->ctrl_domains); INIT_LIST_HEAD(&res->mon_domains); + + if (ctrl->mon_capable && res->rid == RDT_RESOURCE_L3) { + res->mon_scope = RESCTRL_L3_CACHE; + res->mon.num_rmid = ctrl->mcid_count; + resctrl_enable_mon_event(QOS_L3_OCCUP_EVENT_ID, + false, 0, NULL); + res->mon_capable = true; + } break; default: break; @@ -525,8 +645,21 @@ static int cbqri_resctrl_control_init(struct cbqri_resctrl_res *cbqri_res) return 0; } +/* + * Pick one controller per monitoring event. L3 OCCUP comes from the + * picked L3 CC (if mon_capable). + */ +static void cbqri_resctrl_pick_counters(void) +{ + struct cbqri_resctrl_res *l3 = &cbqri_resctrl_resources[RDT_RESOURCE_L3]; + + if (l3->ctrl && l3->ctrl->mon_capable) + cbqri_resctrl_counters[QOS_L3_OCCUP_EVENT_ID] = l3->ctrl; +} + static void cbqri_resctrl_accumulate_caps(void) { + struct cbqri_controller *ctrl; int rid; for (rid = 0; rid < RDT_NUM_RESOURCES; rid++) { @@ -536,7 +669,22 @@ static void cbqri_resctrl_accumulate_caps(void) continue; if (hw_res->ctrl->alloc_capable) exposed_alloc_capable = true; + if (hw_res->ctrl->mon_capable) + exposed_mon_capable = true; } + + /* + * Narrow max_rmid against mon-capable controllers only. RQSC may + * report mcid_count for non-mon-capable ones. Clamping the global + * minimum against those would shrink the rmid space unnecessarily. + */ + list_for_each_entry(ctrl, &cbqri_controllers, list) + if (ctrl->mon_capable) + max_rmid = min(max_rmid, ctrl->mcid_count); + + /* No mon-capable controller picked: leave max_rmid sentinel-narrowed. */ + if (!exposed_mon_capable) + max_rmid = 1; } /* @@ -577,6 +725,71 @@ static struct rdt_ctrl_domain *cbqri_create_ctrl_domain(struct cbqri_controller return domain; } +static int cbqri_attach_cpu_to_l3_mon(struct cbqri_controller *ctrl, + struct rdt_resource *res, unsigned int cpu) +{ + struct rdt_l3_mon_domain *mon_dom; + struct rdt_ctrl_domain *ctrl_dom; + struct list_head *mon_pos = NULL; + int dom_id = ctrl->cache.cache_id; + int err; + + lockdep_assert_held(&cbqri_domain_list_lock); + + mon_dom = cbqri_find_l3_mon_domain(&res->mon_domains, dom_id); + if (mon_dom) { + cpumask_set_cpu(cpu, &mon_dom->hdr.cpu_mask); + return 0; + } + + ctrl_dom = cbqri_find_ctrl_domain(&res->ctrl_domains, dom_id); + if (!ctrl_dom) { + pr_err("L3 mon attach for cpu %u: no ctrl_domain id %d\n", + cpu, dom_id); + return -EINVAL; + } + + mon_dom = kzalloc_obj(*mon_dom, GFP_KERNEL); + if (!mon_dom) + return -ENOMEM; + + mon_dom->hdr.id = dom_id; + mon_dom->hdr.type = RESCTRL_MON_DOMAIN; + mon_dom->hdr.rid = RDT_RESOURCE_L3; + cpumask_set_cpu(cpu, &mon_dom->hdr.cpu_mask); + INIT_LIST_HEAD(&mon_dom->hdr.list); + + if (resctrl_find_domain(&res->mon_domains, dom_id, &mon_pos)) { + pr_err("duplicate L3 mon_domain id %d\n", dom_id); + err = -EEXIST; + goto err_free; + } + if (mon_pos) + list_add_tail(&mon_dom->hdr.list, mon_pos); + else + list_add_tail(&mon_dom->hdr.list, &res->mon_domains); + + err = resctrl_online_mon_domain(res, &mon_dom->hdr); + if (err) + goto err_listdel; + + err = cbqri_init_mon_counters(ctrl); + if (err) + goto err_offline; + + return 0; + +err_offline: + cancel_delayed_work_sync(&mon_dom->cqm_limbo); + cancel_delayed_work_sync(&mon_dom->mbm_over); + resctrl_offline_mon_domain(res, &mon_dom->hdr); +err_listdel: + list_del(&mon_dom->hdr.list); +err_free: + kfree(mon_dom); + return err; +} + static int cbqri_attach_cpu_to_cap_ctrl(struct cbqri_controller *ctrl, unsigned int cpu) { @@ -584,6 +797,7 @@ static int cbqri_attach_cpu_to_cap_ctrl(struct cbqri_controller *ctrl, struct rdt_ctrl_domain *domain; struct rdt_resource *res; int dom_id; + int err; if (ctrl->cache.cache_level == 2) hw_res = &cbqri_resctrl_resources[RDT_RESOURCE_L2]; @@ -601,16 +815,42 @@ static int cbqri_attach_cpu_to_cap_ctrl(struct cbqri_controller *ctrl, domain = cbqri_find_ctrl_domain(&res->ctrl_domains, dom_id); if (domain) { cpumask_set_cpu(cpu, &domain->hdr.cpu_mask); - return 0; + } else { + domain = cbqri_create_ctrl_domain(ctrl, res, cpu, dom_id); + if (IS_ERR(domain)) + return PTR_ERR(domain); } - domain = cbqri_create_ctrl_domain(ctrl, res, cpu, dom_id); - if (IS_ERR(domain)) - return PTR_ERR(domain); + if (ctrl->mon_capable && ctrl->cache.cache_level == 3) { + err = cbqri_attach_cpu_to_l3_mon(ctrl, res, cpu); + if (err) + return err; + } return 0; } +static void cbqri_detach_cpu_from_l3_mon(struct rdt_resource *res, + unsigned int cpu) +{ + struct rdt_l3_mon_domain *mon_dom, *tmp; + + lockdep_assert_held(&cbqri_domain_list_lock); + + list_for_each_entry_safe(mon_dom, tmp, &res->mon_domains, hdr.list) { + if (!cpumask_test_cpu(cpu, &mon_dom->hdr.cpu_mask)) + continue; + cpumask_clear_cpu(cpu, &mon_dom->hdr.cpu_mask); + if (cpumask_empty(&mon_dom->hdr.cpu_mask)) { + cancel_delayed_work_sync(&mon_dom->cqm_limbo); + cancel_delayed_work_sync(&mon_dom->mbm_over); + resctrl_offline_mon_domain(res, &mon_dom->hdr); + list_del(&mon_dom->hdr.list); + kfree(mon_dom); + } + } +} + static void cbqri_detach_cpu_from_ctrl_domains(struct rdt_resource *res, unsigned int cpu) { @@ -634,7 +874,7 @@ static bool cbqri_resctrl_inited; static void cbqri_resctrl_teardown(void) { - int rid; + int rid, evt; if (!cbqri_resctrl_inited) return; @@ -647,7 +887,11 @@ static void cbqri_resctrl_teardown(void) hw_res->ctrl = NULL; hw_res->cdp_enabled = false; } + for (evt = 0; evt <= CBQRI_MAX_EVENT; evt++) + cbqri_resctrl_counters[evt] = NULL; exposed_alloc_capable = false; + exposed_mon_capable = false; + max_rmid = U32_MAX; cbqri_resctrl_inited = false; } @@ -666,6 +910,8 @@ static int cbqri_resctrl_setup(void) if (err) return err; + cbqri_resctrl_pick_counters(); + for (rid = 0; rid < RDT_NUM_RESOURCES; rid++) { err = cbqri_resctrl_control_init(&cbqri_resctrl_resources[rid]); if (err) @@ -674,7 +920,7 @@ static int cbqri_resctrl_setup(void) cbqri_resctrl_accumulate_caps(); - if (!exposed_alloc_capable) { + if (!exposed_alloc_capable && !exposed_mon_capable) { pr_debug("no resctrl-capable CBQRI controllers found\n"); return -ENODEV; } @@ -723,6 +969,8 @@ static int cbqri_resctrl_offline_cpu(unsigned int cpu) if (!hw_res->ctrl) continue; cbqri_detach_cpu_from_ctrl_domains(&hw_res->resctrl_res, cpu); + if (rid == RDT_RESOURCE_L3 && hw_res->ctrl->mon_capable) + cbqri_detach_cpu_from_l3_mon(&hw_res->resctrl_res, cpu); } mutex_unlock(&cbqri_domain_list_lock); From a4b54fb84f04c0a2667219fbf2ac069c533c794f Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Sun, 10 May 2026 22:11:09 -0700 Subject: [PATCH 14/19] riscv_cbqri: resctrl: Add MB_MIN bandwidth allocation via Rbwb Add bandwidth allocation through Rbwb (reserved bandwidth blocks) exposed as the MB_MIN resource. Rbwb's sum constraint does not fit MBA's percentage cap, so MB_MIN lands as a new RDT_RESOURCE_* rather than masquerading as MBA. The sum(Rbwb) <= MRBWB (max resv bw blocks) invariant from the CBQRI spec is enforced at schemata-write time using a per-RCID software cache under ctrl->lock. -EINVAL on overflow, matching the existing schemata-write rejection convention. Reset gives RCID 0 the remaining MRBWB budget after reserving 1 block per other RCID. default_to_min=true on MB_MIN so mkdir cannot overflow the sum constraint. Assisted-by: Claude:claude-opus-4-7 Co-developed-by: Adrien Ricciardi Signed-off-by: Adrien Ricciardi Signed-off-by: Drew Fustini Signed-off-by: Linux RISC-V bot --- drivers/resctrl/cbqri_resctrl.c | 209 +++++++++++++++++++++++++++++--- 1 file changed, 189 insertions(+), 20 deletions(-) diff --git a/drivers/resctrl/cbqri_resctrl.c b/drivers/resctrl/cbqri_resctrl.c index d8fd9b06703faf..bcd9367e3555cf 100644 --- a/drivers/resctrl/cbqri_resctrl.c +++ b/drivers/resctrl/cbqri_resctrl.c @@ -415,6 +415,9 @@ int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_ctrl_domain *d, case RDT_RESOURCE_L2: case RDT_RESOURCE_L3: return cbqri_apply_cache_config_dom(dom, r, closid, t, cfg_val); + case RDT_RESOURCE_MB_MIN: + /* sum(Rbwb) <= MRBWB validation runs inside cbqri_apply_rbwb(). */ + return cbqri_apply_rbwb(dom->hw_ctrl, closid, cfg_val, true); default: return -EINVAL; } @@ -467,6 +470,14 @@ u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_ctrl_domain *d, if (err < 0) val = resctrl_get_default_ctrl(r); break; + case RDT_RESOURCE_MB_MIN: { + u64 rbwb; + + err = cbqri_read_rbwb(ctrl, closid, &rbwb); + if (err == 0) + val = (u32)rbwb; + break; + } default: break; } @@ -477,6 +488,7 @@ u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_ctrl_domain *d, void resctrl_arch_reset_all_ctrls(struct rdt_resource *r) { struct cbqri_resctrl_res *hw_res; + struct cbqri_resctrl_dom *dom; struct rdt_ctrl_domain *d; enum resctrl_conf_type t; u32 default_ctrl; @@ -491,15 +503,42 @@ void resctrl_arch_reset_all_ctrls(struct rdt_resource *r) return; list_for_each_entry(d, &r->ctrl_domains, hdr.list) { - for (i = 0; i < hw_res->ctrl->rcid_count; i++) { - for (t = 0; t < CDP_NUM_TYPES; t++) { + dom = container_of(d, struct cbqri_resctrl_dom, + resctrl_ctrl_dom); + + switch (r->rid) { + case RDT_RESOURCE_MB_MIN: + /* + * CBQRI section 4.5: Rbwb >= 1, sum(Rbwb) <= MRBWB. + * Walk N-1..1 first so the final sum lands at + * MRBWB. Use the unchecked helper since the + * intermediate sum may exceed MRBWB. + */ + for (i = 0; i < hw_res->ctrl->rcid_count; i++) { + u32 rcid = (i + 1) % hw_res->ctrl->rcid_count; + u64 rbwb = (rcid == 0) ? + dom->hw_ctrl->bc.mrbwb - (hw_res->ctrl->rcid_count - 1) : 1; int rerr; - rerr = resctrl_arch_update_one(r, d, i, t, default_ctrl); + rerr = cbqri_apply_rbwb(dom->hw_ctrl, rcid, rbwb, false); if (rerr) - pr_err_ratelimited("rid=%d reset RCID %u type %u failed (%d)\n", - r->rid, i, t, rerr); + pr_err_ratelimited("RBWB reset RCID %u failed (%d)\n", + rcid, rerr); + } + break; + default: + for (i = 0; i < hw_res->ctrl->rcid_count; i++) { + for (t = 0; t < CDP_NUM_TYPES; t++) { + int rerr; + + rerr = resctrl_arch_update_one(r, d, i, t, + default_ctrl); + if (rerr) + pr_err_ratelimited("rid=%d reset RCID %u type %u failed (%d)\n", + r->rid, i, t, rerr); + } } + break; } } } @@ -524,24 +563,53 @@ static struct rdt_ctrl_domain *cbqri_new_domain(struct cbqri_controller *ctrl) static int cbqri_init_domain_ctrlval(struct rdt_resource *r, struct rdt_ctrl_domain *d) { struct cbqri_resctrl_res *hw_res; + struct cbqri_resctrl_dom *dom; enum resctrl_conf_type t; int err = 0; int i; hw_res = container_of(r, struct cbqri_resctrl_res, resctrl_res); + dom = container_of(d, struct cbqri_resctrl_dom, resctrl_ctrl_dom); for (i = 0; i < hw_res->ctrl->rcid_count; i++) { /* - * Seed both DATA and CODE staged slots so a later mount - * with -o cdp does not see stale CODE values. - * CDP_NUM_TYPES is 1 on non-CDP controllers. + * For MB_MIN walk RCIDs 1..N-1 then RCID 0 last so the sum + * trends toward MRBWB during the walk. Other rids iterate + * in natural order. */ - for (t = 0; t < CDP_NUM_TYPES; t++) { - err = resctrl_arch_update_one(r, d, i, t, - resctrl_get_default_ctrl(r)); - if (err) - return err; + u32 rcid = (r->rid == RDT_RESOURCE_MB_MIN) ? + ((i + 1) % hw_res->ctrl->rcid_count) : i; + + switch (r->rid) { + case RDT_RESOURCE_MB_MIN: { + /* + * CBQRI section 4.5: Rbwb >= 1, sum(Rbwb) <= MRBWB. + * RCID 0 gets the remaining budget. Use the + * unchecked helper since intermediate states + * transiently exceed MRBWB. + */ + u64 rbwb = (rcid == 0) ? + dom->hw_ctrl->bc.mrbwb - (hw_res->ctrl->rcid_count - 1) : 1; + + err = cbqri_apply_rbwb(dom->hw_ctrl, rcid, rbwb, false); + break; } + default: + /* + * Seed both DATA and CODE staged slots so a later + * mount with -o cdp does not see stale CODE values. + * CDP_NUM_TYPES is 1 on non-CDP controllers. + */ + for (t = 0; t < CDP_NUM_TYPES; t++) { + err = resctrl_arch_update_one(r, d, i, t, + resctrl_get_default_ctrl(r)); + if (err) + break; + } + break; + } + if (err) + return err; } return 0; } @@ -638,6 +706,31 @@ static int cbqri_resctrl_control_init(struct cbqri_resctrl_res *cbqri_res) res->mon_capable = true; } break; + + case RDT_RESOURCE_MB_MIN: + res->name = "MB_MIN"; + res->schema_fmt = RESCTRL_SCHEMA_RANGE; + /* + * resctrl requires a cache scope for MBA-style domains. + * Use L3 as a proxy until the framework supports non-cache + * scopes for bandwidth resources. + */ + res->ctrl_scope = RESCTRL_L3_CACHE; + /* Rbwb is an integer block count, not a percentage. No MBA delay_linear. */ + res->membw.throttle_mode = THREAD_THROTTLE_UNDEFINED; + res->membw.min_bw = 1; + res->membw.max_bw = ctrl->bc.mrbwb; + res->membw.bw_gran = 1; + /* + * CBQRI section 4.5 caps sum(Rbwb) <= MRBWB. Default new + * groups to min_bw so mkdir cannot overflow that sum. + */ + res->membw.default_to_min = true; + res->alloc_capable = ctrl->alloc_capable; + INIT_LIST_HEAD(&res->ctrl_domains); + INIT_LIST_HEAD(&res->mon_domains); + break; + default: break; } @@ -645,6 +738,37 @@ static int cbqri_resctrl_control_init(struct cbqri_resctrl_res *cbqri_res) return 0; } +/* + * Pick one BC to back MB_MIN. Multiple BCs must agree on rcid_count + * and mrbwb. Mismatch is fatal because resctrl exposes a single set + * of caps per rid. + */ +static int cbqri_resctrl_pick_bw_alloc(void) +{ + struct cbqri_resctrl_res *mb_min = &cbqri_resctrl_resources[RDT_RESOURCE_MB_MIN]; + struct cbqri_controller *ctrl; + + list_for_each_entry(ctrl, &cbqri_controllers, list) { + if (ctrl->type != CBQRI_CONTROLLER_TYPE_BANDWIDTH) + continue; + if (!ctrl->alloc_capable) + continue; + + if (mb_min->ctrl) { + if (mb_min->ctrl->rcid_count != ctrl->rcid_count || + mb_min->ctrl->bc.mrbwb != ctrl->bc.mrbwb) { + pr_err("BW controllers have mismatched capabilities\n"); + return -EINVAL; + } + continue; + } + + mb_min->ctrl = ctrl; + } + + return 0; +} + /* * Pick one controller per monitoring event. L3 OCCUP comes from the * picked L3 CC (if mon_capable). @@ -830,6 +954,37 @@ static int cbqri_attach_cpu_to_cap_ctrl(struct cbqri_controller *ctrl, return 0; } +static int cbqri_attach_cpu_to_one_bw_res(struct cbqri_controller *ctrl, + enum resctrl_res_level rid, + unsigned int cpu) +{ + struct cbqri_resctrl_res *hw_res = &cbqri_resctrl_resources[rid]; + struct rdt_resource *res = &hw_res->resctrl_res; + struct rdt_ctrl_domain *domain; + int dom_id = ctrl->mem.prox_dom; + + if (!hw_res->ctrl) + return 0; + + domain = cbqri_find_ctrl_domain(&res->ctrl_domains, dom_id); + if (domain) { + cpumask_set_cpu(cpu, &domain->hdr.cpu_mask); + return 0; + } + + domain = cbqri_create_ctrl_domain(ctrl, res, cpu, dom_id); + if (IS_ERR(domain)) + return PTR_ERR(domain); + + return 0; +} + +static int cbqri_attach_cpu_to_bw_ctrl(struct cbqri_controller *ctrl, + unsigned int cpu) +{ + return cbqri_attach_cpu_to_one_bw_res(ctrl, RDT_RESOURCE_MB_MIN, cpu); +} + static void cbqri_detach_cpu_from_l3_mon(struct rdt_resource *res, unsigned int cpu) { @@ -910,6 +1065,10 @@ static int cbqri_resctrl_setup(void) if (err) return err; + err = cbqri_resctrl_pick_bw_alloc(); + if (err) + return err; + cbqri_resctrl_pick_counters(); for (rid = 0; rid < RDT_NUM_RESOURCES; rid++) { @@ -941,14 +1100,24 @@ static int cbqri_resctrl_online_cpu(unsigned int cpu) mutex_lock(&cbqri_domain_list_lock); list_for_each_entry(ctrl, &cbqri_controllers, list) { - if (ctrl->type != CBQRI_CONTROLLER_TYPE_CAPACITY) - continue; - if (!cpumask_test_cpu(cpu, &ctrl->cache.cpu_mask)) - continue; - if (!ctrl->alloc_capable) + switch (ctrl->type) { + case CBQRI_CONTROLLER_TYPE_CAPACITY: + if (!cpumask_test_cpu(cpu, &ctrl->cache.cpu_mask)) + continue; + if (!ctrl->alloc_capable) + continue; + err = cbqri_attach_cpu_to_cap_ctrl(ctrl, cpu); + break; + case CBQRI_CONTROLLER_TYPE_BANDWIDTH: + if (!cpumask_test_cpu(cpu, &ctrl->mem.cpu_mask)) + continue; + if (!ctrl->alloc_capable) + continue; + err = cbqri_attach_cpu_to_bw_ctrl(ctrl, cpu); + break; + default: continue; - - err = cbqri_attach_cpu_to_cap_ctrl(ctrl, cpu); + } if (err) break; } From ab15d1858813bccff232a0439f92fbcf32556fd8 Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Sun, 10 May 2026 22:11:10 -0700 Subject: [PATCH 15/19] riscv_cbqri: resctrl: Add MB_WGHT bandwidth allocation via Mweight Add bandwidth allocation through Mweight (shared weight for unreserved bandwidth) exposed as the MB_WGHT resource. Mweight has no MBA equivalent, so it lands as a new RDT_RESOURCE_*. Mweight is an integer in [0, 255]. A value of 0 disables work- conserving sharing for the group, capping its bandwidth at the MB_MIN reservation. Values 1..255 compete for the leftover pool in proportion to the weight. The same BC backs both MB_MIN and MB_WGHT and bc_bw_alloc packs Rbwb and Mweight in one register. cbqri_attach_cpu_to_bw_ctrl() attaches both rids to the picked BC. Reset gives every RCID the new-group default (max_bw = 255) for equal opportunistic shares. Assisted-by: Claude:claude-opus-4-7 Co-developed-by: Adrien Ricciardi Signed-off-by: Adrien Ricciardi Signed-off-by: Drew Fustini Signed-off-by: Linux RISC-V bot --- drivers/resctrl/cbqri_resctrl.c | 62 ++++++++++++++++++++++++++++++--- 1 file changed, 58 insertions(+), 4 deletions(-) diff --git a/drivers/resctrl/cbqri_resctrl.c b/drivers/resctrl/cbqri_resctrl.c index bcd9367e3555cf..71ee8e6107571e 100644 --- a/drivers/resctrl/cbqri_resctrl.c +++ b/drivers/resctrl/cbqri_resctrl.c @@ -418,6 +418,8 @@ int resctrl_arch_update_one(struct rdt_resource *r, struct rdt_ctrl_domain *d, case RDT_RESOURCE_MB_MIN: /* sum(Rbwb) <= MRBWB validation runs inside cbqri_apply_rbwb(). */ return cbqri_apply_rbwb(dom->hw_ctrl, closid, cfg_val, true); + case RDT_RESOURCE_MB_WGHT: + return cbqri_apply_mweight_config(dom->hw_ctrl, closid, cfg_val); default: return -EINVAL; } @@ -478,6 +480,14 @@ u32 resctrl_arch_get_config(struct rdt_resource *r, struct rdt_ctrl_domain *d, val = (u32)rbwb; break; } + case RDT_RESOURCE_MB_WGHT: { + u64 mweight; + + err = cbqri_read_mweight(ctrl, closid, &mweight); + if (err == 0) + val = (u32)mweight; + break; + } default: break; } @@ -526,6 +536,18 @@ void resctrl_arch_reset_all_ctrls(struct rdt_resource *r) rcid, rerr); } break; + case RDT_RESOURCE_MB_WGHT: + /* All RCIDs start at max weight (the new-group default). */ + for (i = 0; i < hw_res->ctrl->rcid_count; i++) { + int rerr; + + rerr = cbqri_apply_mweight_config(dom->hw_ctrl, i, + default_ctrl); + if (rerr) + pr_err_ratelimited("Mweight reset RCID %u failed (%d)\n", + i, rerr); + } + break; default: for (i = 0; i < hw_res->ctrl->rcid_count; i++) { for (t = 0; t < CDP_NUM_TYPES; t++) { @@ -594,6 +616,11 @@ static int cbqri_init_domain_ctrlval(struct rdt_resource *r, struct rdt_ctrl_dom err = cbqri_apply_rbwb(dom->hw_ctrl, rcid, rbwb, false); break; } + case RDT_RESOURCE_MB_WGHT: + /* Match the new-group default: equal weights across RCIDs. */ + err = cbqri_apply_mweight_config(dom->hw_ctrl, i, + resctrl_get_default_ctrl(r)); + break; default: /* * Seed both DATA and CODE staged slots so a later @@ -731,6 +758,25 @@ static int cbqri_resctrl_control_init(struct cbqri_resctrl_res *cbqri_res) INIT_LIST_HEAD(&res->mon_domains); break; + case RDT_RESOURCE_MB_WGHT: + res->name = "MB_WGHT"; + res->schema_fmt = RESCTRL_SCHEMA_RANGE; + res->ctrl_scope = RESCTRL_L3_CACHE; + /* Mweight is a dimensionless ratio. No delay/linear concept. */ + res->membw.throttle_mode = THREAD_THROTTLE_UNDEFINED; + /* + * CBQRI section 4.5: Mweight is 0-255 (0 disables + * work-conserving). No sum constraint, so leave + * default_to_min false: groups default to max_bw. + */ + res->membw.min_bw = 0; + res->membw.max_bw = 255; + res->membw.bw_gran = 1; + res->alloc_capable = ctrl->alloc_capable; + INIT_LIST_HEAD(&res->ctrl_domains); + INIT_LIST_HEAD(&res->mon_domains); + break; + default: break; } @@ -739,13 +785,14 @@ static int cbqri_resctrl_control_init(struct cbqri_resctrl_res *cbqri_res) } /* - * Pick one BC to back MB_MIN. Multiple BCs must agree on rcid_count - * and mrbwb. Mismatch is fatal because resctrl exposes a single set - * of caps per rid. + * Pick one BC to back both MB_MIN and MB_WGHT (they share a controller). + * Multiple BCs must agree on rcid_count and mrbwb. Mismatch is fatal + * because resctrl exposes a single set of caps per rid. */ static int cbqri_resctrl_pick_bw_alloc(void) { struct cbqri_resctrl_res *mb_min = &cbqri_resctrl_resources[RDT_RESOURCE_MB_MIN]; + struct cbqri_resctrl_res *mb_wght = &cbqri_resctrl_resources[RDT_RESOURCE_MB_WGHT]; struct cbqri_controller *ctrl; list_for_each_entry(ctrl, &cbqri_controllers, list) { @@ -764,6 +811,7 @@ static int cbqri_resctrl_pick_bw_alloc(void) } mb_min->ctrl = ctrl; + mb_wght->ctrl = ctrl; } return 0; @@ -982,7 +1030,13 @@ static int cbqri_attach_cpu_to_one_bw_res(struct cbqri_controller *ctrl, static int cbqri_attach_cpu_to_bw_ctrl(struct cbqri_controller *ctrl, unsigned int cpu) { - return cbqri_attach_cpu_to_one_bw_res(ctrl, RDT_RESOURCE_MB_MIN, cpu); + int err; + + err = cbqri_attach_cpu_to_one_bw_res(ctrl, RDT_RESOURCE_MB_MIN, cpu); + if (err) + return err; + + return cbqri_attach_cpu_to_one_bw_res(ctrl, RDT_RESOURCE_MB_WGHT, cpu); } static void cbqri_detach_cpu_from_l3_mon(struct rdt_resource *res, From 90eacabb8c70220267a6160409180831f614a181 Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Sun, 10 May 2026 22:11:11 -0700 Subject: [PATCH 16/19] riscv_cbqri: resctrl: Add mbm_total_bytes bandwidth monitoring Expose CBQRI bandwidth controller's combined read+write counter as the L3 mbm_total_bytes event. A software accumulator keeps the 64-bit byte total monotonic across the 62-bit hardware counter wrap. mbm_local_bytes is not supported because the CBQRI spec has no way to distinguish total versus local. Bandwidth monitoring is disabled on platforms with more than one CBQRI bandwidth controller, since the counter could not accurately attribute traffic across L3 domains. Assisted-by: Claude:claude-opus-4-7 Co-developed-by: Adrien Ricciardi Signed-off-by: Adrien Ricciardi Signed-off-by: Drew Fustini Signed-off-by: Linux RISC-V bot --- drivers/resctrl/cbqri_resctrl.c | 154 +++++++++++++++++++++++++++++++- 1 file changed, 150 insertions(+), 4 deletions(-) diff --git a/drivers/resctrl/cbqri_resctrl.c b/drivers/resctrl/cbqri_resctrl.c index 71ee8e6107571e..ccd48cac7ccdeb 100644 --- a/drivers/resctrl/cbqri_resctrl.c +++ b/drivers/resctrl/cbqri_resctrl.c @@ -30,6 +30,13 @@ struct cbqri_resctrl_res { struct cbqri_resctrl_dom { struct rdt_ctrl_domain resctrl_ctrl_dom; struct cbqri_controller *hw_ctrl; + /* + * For an L3 capacity controller paired with a bandwidth controller + * of matching topology, paired_bc caches that BC so mbm_total_bytes + * reads / resets don't have to walk cbqri_controllers on every hit. + * NULL for non-L3 domains and L3s without a paired BC. + */ + struct cbqri_controller *paired_bc; }; static struct cbqri_resctrl_res cbqri_resctrl_resources[RDT_NUM_RESOURCES]; @@ -38,7 +45,7 @@ static struct cbqri_resctrl_res cbqri_resctrl_resources[RDT_NUM_RESOURCES]; * Per-event controller table. Only events CBQRI can back occupy a * slot, so other events do not bloat the array. */ -#define CBQRI_MAX_EVENT QOS_L3_OCCUP_EVENT_ID +#define CBQRI_MAX_EVENT QOS_L3_MBM_TOTAL_EVENT_ID static struct cbqri_controller *cbqri_resctrl_counters[CBQRI_MAX_EVENT + 1]; /* @@ -239,6 +246,36 @@ void resctrl_arch_reset_rmid(struct rdt_resource *r, struct rdt_l3_mon_domain *d mutex_unlock(&ctrl->lock); return; + case QOS_L3_MBM_TOTAL_EVENT_ID: { + struct cbqri_controller *bc; + + cd = cbqri_find_ctrl_domain(&r->ctrl_domains, d->hdr.id); + if (!cd) + return; + hw_dom = container_of(cd, struct cbqri_resctrl_dom, resctrl_ctrl_dom); + bc = hw_dom->paired_bc; + if (!bc) + return; + if (WARN_ON_ONCE(!bc->mbm_total_states)) + return; + if (rmid >= bc->mcid_count) + return; + + mutex_lock(&bc->lock); + /* + * CONFIG_EVENT both resets and re-arms. Skip the accumulator + * memset on failure. A stale hardware counter X with + * prev_ctr=0 would inject overflow(0, X) on the next read. + */ + if (!cbqri_mon_op(bc, CBQRI_BC_MON_CTL_OFF, + CBQRI_BC_MON_CTL_OP_CONFIG_EVENT, rmid, + CBQRI_BC_EVT_ID_TOTAL_READ_WRITE, NULL)) + memset(&bc->mbm_total_states[rmid], 0, + sizeof(*bc->mbm_total_states)); + mutex_unlock(&bc->lock); + return; + } + default: return; } @@ -249,8 +286,11 @@ void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_l3_mon_domai int i; /* Bound by max_rmid (system-wide minimum mcid_count). */ - for (i = 0; i < max_rmid; i++) + for (i = 0; i < max_rmid; i++) { resctrl_arch_reset_rmid(r, d, 0, i, QOS_L3_OCCUP_EVENT_ID); + /* mbm_total_bytes reset is a no-op for L3s without a paired BC. */ + resctrl_arch_reset_rmid(r, d, 0, i, QOS_L3_MBM_TOTAL_EVENT_ID); + } } int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_domain_hdr *hdr, @@ -308,6 +348,76 @@ int resctrl_arch_rmid_read(struct rdt_resource *r, struct rdt_domain_hdr *hdr, mutex_unlock(&ctrl->lock); return err; + case QOS_L3_MBM_TOTAL_EVENT_ID: { + struct cbqri_controller *bc; + + /* + * The L3 monitoring domain's id is the L3 cache id. The + * matching ctrl domain's hw_dom->paired_bc was cached at + * add time to avoid walking cbqri_controllers on every read. + */ + d = cbqri_find_ctrl_domain(&r->ctrl_domains, hdr->id); + if (!d) + return -ENOENT; + hw_dom = container_of(d, struct cbqri_resctrl_dom, resctrl_ctrl_dom); + bc = hw_dom->paired_bc; + if (!bc) + return -ENOENT; + if (WARN_ON_ONCE(!bc->mbm_total_states)) + return -EIO; + if (rmid >= bc->mcid_count) + return -ERANGE; + + mutex_lock(&bc->lock); + /* Pass EVT_ID explicitly. Same reason as the CC path above. */ + err = cbqri_mon_op(bc, CBQRI_BC_MON_CTL_OFF, + CBQRI_BC_MON_CTL_OP_READ_COUNTER, rmid, + CBQRI_BC_EVT_ID_TOTAL_READ_WRITE, NULL); + if (err) + goto out_bc; + + ctr_val = ioread64(bc->base + CBQRI_BC_MON_CTR_VAL_OFF); + + if (ctr_val & CBQRI_BC_MON_CTR_VAL_INVALID) { + /* + * Hardware marked the counter invalid (CBQRI 4.3: + * controller could not establish an accurate count). + * Return the last good total and leave prev_ctr so + * the next valid sample resumes from there. + */ + *val = bc->mbm_total_states[rmid].chunks; + } else if (ctr_val & CBQRI_BC_MON_CTR_VAL_OVF) { + /* + * CBQRI 4.3: OVF is sticky until next CONFIG_EVENT. + * cbqri_bc_mon_overflow() can recover at most one + * wrap. With OVF set the count is unknown, so re-arm + * and re-anchor prev_ctr=0, losing one wrap-period. + */ + struct cbqri_bc_mon_state *s = &bc->mbm_total_states[rmid]; + + pr_warn_ratelimited("BC@%pa MCID %u: CTR overflow, bandwidth count loses ~one wrap-period; consider a wider CTR or a faster poll cadence\n", + &bc->addr, rmid); + err = cbqri_mon_op(bc, CBQRI_BC_MON_CTL_OFF, + CBQRI_BC_MON_CTL_OP_CONFIG_EVENT, rmid, + CBQRI_BC_EVT_ID_TOTAL_READ_WRITE, NULL); + if (err) + goto out_bc; + + s->prev_ctr = 0; + *val = s->chunks; + } else { + struct cbqri_bc_mon_state *s = &bc->mbm_total_states[rmid]; + u64 cur = ctr_val & CBQRI_BC_MON_CTR_VAL_CTR_MASK; + + s->chunks += cbqri_bc_mon_overflow(s->prev_ctr, cur); + s->prev_ctr = cur; + *val = s->chunks; + } +out_bc: + mutex_unlock(&bc->lock); + return err; + } + default: return -EINVAL; } @@ -730,6 +840,16 @@ static int cbqri_resctrl_control_init(struct cbqri_resctrl_res *cbqri_res) res->mon.num_rmid = ctrl->mcid_count; resctrl_enable_mon_event(QOS_L3_OCCUP_EVENT_ID, false, 0, NULL); + + /* + * Expose BC bandwidth monitoring as the L3's + * mbm_total_bytes when a BC shares topology with this + * L3 (MPAM "MB on L3" mapping). + */ + if (cbqri_resctrl_counters[QOS_L3_MBM_TOTAL_EVENT_ID]) + resctrl_enable_mon_event(QOS_L3_MBM_TOTAL_EVENT_ID, + false, 0, NULL); + res->mon_capable = true; } break; @@ -818,8 +938,8 @@ static int cbqri_resctrl_pick_bw_alloc(void) } /* - * Pick one controller per monitoring event. L3 OCCUP comes from the - * picked L3 CC (if mon_capable). + * Pick one controller per monitoring event. L3 OCCUP comes from the + * picked L3 CC (if mon_capable). MBM_TOTAL from the only mon-capable BC. */ static void cbqri_resctrl_pick_counters(void) { @@ -827,6 +947,9 @@ static void cbqri_resctrl_pick_counters(void) if (l3->ctrl && l3->ctrl->mon_capable) cbqri_resctrl_counters[QOS_L3_OCCUP_EVENT_ID] = l3->ctrl; + + cbqri_resctrl_counters[QOS_L3_MBM_TOTAL_EVENT_ID] = + cbqri_find_only_mon_bc(); } static void cbqri_resctrl_accumulate_caps(void) @@ -949,6 +1072,29 @@ static int cbqri_attach_cpu_to_l3_mon(struct cbqri_controller *ctrl, if (err) goto err_offline; + /* + * Pair this L3 domain with the system's mon-capable BC. The + * cached pointer is consulted by every rmid_read / reset_rmid. + * BC mon init is system-wide. Failure here means mbm_total_bytes + * is unusable for any domain, so fail the attach. + */ + { + struct cbqri_resctrl_dom *hw_dom = container_of(ctrl_dom, + struct cbqri_resctrl_dom, + resctrl_ctrl_dom); + + hw_dom->paired_bc = cbqri_find_only_mon_bc(); + if (hw_dom->paired_bc) { + err = cbqri_init_bc_mon_counters(hw_dom->paired_bc); + if (err) { + pr_err("BC @%pa: mon init failed (%d)\n", + &hw_dom->paired_bc->addr, err); + hw_dom->paired_bc = NULL; + goto err_offline; + } + } + } + return 0; err_offline: From c92e994576905e55a3d06df7c7f4976949f5c893 Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Sun, 10 May 2026 22:11:12 -0700 Subject: [PATCH 17/19] ACPI: RISC-V: Parse RISC-V Quality of Service Controller (RQSC) table Add a parser for the ACPI RQSC table, which describes the CBQRI controllers in a system. For each table entry, populate a cbqri_controller_info descriptor and hand it to the CBQRI driver via riscv_cbqri_register_controller(). The driver owns all subsequent state, including cpumask resolution at cbqri_resctrl_setup() time. Link: https://github.com/riscv-non-isa/riscv-rqsc/blob/main/src/ Link: https://github.com/riscv-non-isa/riscv-cbqri/releases/tag/v1.0 Assisted-by: Claude:claude-opus-4-7 Signed-off-by: Drew Fustini Signed-off-by: Linux RISC-V bot --- MAINTAINERS | 2 + arch/riscv/include/asm/acpi.h | 10 +++ drivers/acpi/riscv/Makefile | 1 + drivers/acpi/riscv/rqsc.c | 147 ++++++++++++++++++++++++++++++++++ drivers/acpi/riscv/rqsc.h | 52 ++++++++++++ 5 files changed, 212 insertions(+) create mode 100644 drivers/acpi/riscv/rqsc.c create mode 100644 drivers/acpi/riscv/rqsc.h diff --git a/MAINTAINERS b/MAINTAINERS index 3142ffc876c0d8..71912f76c0bffc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -22980,6 +22980,8 @@ S: Supported F: arch/riscv/include/asm/qos.h F: arch/riscv/include/asm/resctrl.h F: arch/riscv/kernel/qos.c +F: drivers/acpi/riscv/rqsc.c +F: drivers/acpi/riscv/rqsc.h F: drivers/resctrl/cbqri_devices.c F: drivers/resctrl/cbqri_internal.h F: drivers/resctrl/cbqri_resctrl.c diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h index 26ab37c171bcf6..3cfd0102085ee9 100644 --- a/arch/riscv/include/asm/acpi.h +++ b/arch/riscv/include/asm/acpi.h @@ -67,6 +67,16 @@ int acpi_get_riscv_isa(struct acpi_table_header *table, void acpi_get_cbo_block_size(struct acpi_table_header *table, u32 *cbom_size, u32 *cboz_size, u32 *cbop_size); + +#ifdef CONFIG_RISCV_CBQRI_DRIVER +int __init acpi_parse_rqsc(struct acpi_table_header *table); +#else +static inline int acpi_parse_rqsc(struct acpi_table_header *table) +{ + return -EINVAL; +} +#endif /* CONFIG_RISCV_CBQRI_DRIVER */ + #else static inline void acpi_init_rintc_map(void) { } static inline struct acpi_madt_rintc *acpi_cpu_get_madt_rintc(int cpu) diff --git a/drivers/acpi/riscv/Makefile b/drivers/acpi/riscv/Makefile index 1284a076fa8887..77f8f0101b7e8d 100644 --- a/drivers/acpi/riscv/Makefile +++ b/drivers/acpi/riscv/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only obj-y += rhct.o init.o irq.o +obj-$(CONFIG_RISCV_CBQRI_DRIVER) += rqsc.o obj-$(CONFIG_ACPI_PROCESSOR_IDLE) += cpuidle.o obj-$(CONFIG_ACPI_CPPC_LIB) += cppc.o obj-$(CONFIG_ACPI_RIMT) += rimt.o diff --git a/drivers/acpi/riscv/rqsc.c b/drivers/acpi/riscv/rqsc.c new file mode 100644 index 00000000000000..ac3d43b13f3bea --- /dev/null +++ b/drivers/acpi/riscv/rqsc.c @@ -0,0 +1,147 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#define pr_fmt(fmt) "ACPI: RQSC: " fmt + +#include +#include +#include + +#include "rqsc.h" + +#define CBQRI_CTRL_SIZE 0x1000 + +int __init acpi_parse_rqsc(struct acpi_table_header *table) +{ + struct acpi_table_rqsc *rqsc = (struct acpi_table_rqsc *)table; + struct acpi_rqsc_node *end, *node; + int num_controllers = 0; + + /* Reject tables shorter than the fixed RQSC header. */ + if (rqsc->header.length < sizeof(struct acpi_table_rqsc)) { + pr_err("RQSC table truncated: length %u < %zu, aborting\n", + rqsc->header.length, sizeof(struct acpi_table_rqsc)); + return -EINVAL; + } + + end = ACPI_ADD_PTR(struct acpi_rqsc_node, rqsc, rqsc->header.length); + + for (node = ACPI_ADD_PTR(struct acpi_rqsc_node, rqsc, + sizeof(struct acpi_table_rqsc)); + node < end; + node = ACPI_ADD_PTR(struct acpi_rqsc_node, node, node->length) + ) { + const struct acpi_rqsc_resource *res0; + struct cbqri_controller_info info = {}; + int ret; + + if ((void *)node + sizeof(*node) > (void *)end) { + pr_err("truncated entry at end of table, aborting\n"); + riscv_cbqri_unregister_last(num_controllers); + return -EINVAL; + } + + if (node->length < sizeof(*node)) { + pr_err("malformed RQSC entry: length %u < %zu, aborting\n", + node->length, sizeof(*node)); + riscv_cbqri_unregister_last(num_controllers); + return -EINVAL; + } + + /* GAS must describe system memory. ioremap() consumes it later. */ + if (node->reg.space_id != ACPI_ADR_SPACE_SYSTEM_MEMORY) { + pr_warn("controller has unsupported address space_id=%u, skipping\n", + node->reg.space_id); + continue; + } + + /* Address 0 would map page 0 (reset vectors, SBI, boot ROM). */ + if (!node->reg.address) { + pr_warn("controller has zero address, skipping\n"); + continue; + } + + info.type = node->type; + /* RQSC v0.9.2 section 2 Table 2: 12-byte GAS-format register interface address */ + info.addr = node->reg.address; + info.size = CBQRI_CTRL_SIZE; + info.rcid_count = node->rcid; + info.mcid_count = node->mcid; + + /* See CBQRI_MAX_RCID/MCID in for the rationale. */ + if (info.rcid_count > CBQRI_MAX_RCID) { + pr_warn("controller at %pa: rcid_count %u exceeds CBQRI_MAX_RCID %u, skipping\n", + &info.addr, info.rcid_count, CBQRI_MAX_RCID); + continue; + } + + if (info.mcid_count > CBQRI_MAX_MCID) { + pr_warn("controller at %pa: mcid_count %u exceeds CBQRI_MAX_MCID %u, skipping\n", + &info.addr, info.mcid_count, CBQRI_MAX_MCID); + continue; + } + + if (node->nres == 0) { + pr_warn("controller at %pa has no resource descriptors, skipping\n", + &info.addr); + continue; + } + + /* + * Resources follow the node header in-line. Only res[0] is + * consumed. Bound it against end before reading its prefix so + * a table that ends partway through a resource subtable is + * rejected rather than read past the mapping. + */ + res0 = (const struct acpi_rqsc_resource *) + ((const u8 *)node + sizeof(*node)); + if ((void *)res0 + sizeof(*res0) > (void *)end || + node->length < sizeof(*node) + sizeof(*res0) || + res0->length < sizeof(*res0)) { + pr_warn("controller at %pa: node too short for resource descriptor, skipping\n", + &info.addr); + continue; + } + + if (node->nres > 1) + pr_warn("controller at %pa has %u resource descriptors, using first\n", + &info.addr, node->nres); + + /* + * id1 is u64 on the wire but cache_id and prox_dom are u32 + * downstream (PPTT cache_id, ACPI proximity domain). Reject + * rather than truncate, so a too-large id is not silently + * mapped to the wrong PPTT entry or NUMA node. + */ + if (res0->id1 > U32_MAX) { + pr_warn("controller at %pa: id1 0x%llx exceeds u32, skipping\n", + &info.addr, res0->id1); + continue; + } + + switch (info.type) { + case CBQRI_CONTROLLER_TYPE_CAPACITY: + info.cache_id = (u32)res0->id1; + break; + case CBQRI_CONTROLLER_TYPE_BANDWIDTH: + info.prox_dom = (u32)res0->id1; + break; + default: + pr_warn("controller at %pa: unknown type %u, skipping\n", + &info.addr, info.type); + continue; + } + + pr_debug("registering controller type=%u addr=%pa rcid=%u mcid=%u\n", + info.type, &info.addr, info.rcid_count, info.mcid_count); + + ret = riscv_cbqri_register_controller(&info); + if (ret == 0) + num_controllers++; + else + pr_warn("controller at %pa: registration failed (%d), skipping\n", + &info.addr, ret); + } + + pr_info("found %d CBQRI controllers\n", num_controllers); + return 0; +} diff --git a/drivers/acpi/riscv/rqsc.h b/drivers/acpi/riscv/rqsc.h new file mode 100644 index 00000000000000..7bea15cb26d891 --- /dev/null +++ b/drivers/acpi/riscv/rqsc.h @@ -0,0 +1,52 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Local definitions for the RISC-V Quality of Service Controller (RQSC) + * ACPI table. Will move to ACPICA's include/acpi/actbl2.h once the spec + * is ratified. + */ +#ifndef _DRIVERS_ACPI_RISCV_RQSC_H +#define _DRIVERS_ACPI_RISCV_RQSC_H + +#include +#include + +#define ACPI_SIG_RQSC "RQSC" /* RISC-V Quality of Service Controller */ + +/* + * Byte-packed: u64 id1 would otherwise pad to 8-byte alignment and inflate + * sizeof(*res) from the spec's 20 bytes to 24, mis-sizing resource subtables. + */ +struct acpi_rqsc_resource { + u8 type; + u8 resv; + u16 length; + u16 flags; + u8 resv2; + u8 id_type; + u64 id1; + u32 id2; +} __packed; + +struct acpi_rqsc_node { + u8 type; + u8 resv; + u16 length; + /* RQSC v0.9.2 section 2 Table 2: 12-byte GAS-format register interface address */ + struct acpi_generic_address reg; + u16 rcid; + u16 mcid; + u16 flags; + u16 nres; + /* + * Followed by nres acpi_rqsc_resource subtables. Walk them via + * each resource's own length field so a future RQSC revision that + * extends the resource layout cannot misalign older parsers. + */ +} __packed; + +struct acpi_table_rqsc { + struct acpi_table_header header; /* Common ACPI table header */ + u32 num; +} __packed; + +#endif /* _DRIVERS_ACPI_RISCV_RQSC_H */ From fd07870dfb9a826fbdadd3f81fc30717c96afad0 Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Sun, 10 May 2026 22:11:13 -0700 Subject: [PATCH 18/19] ACPI: RISC-V: Add support for RISC-V Quality of Service Controller (RQSC) Call acpi_parse_rqsc() from acpi_arch_init() to discover CBQRI controllers when an RQSC table is present. Gate on CONFIG_RISCV_CBQRI_DRIVER rather than CONFIG_RISCV_ISA_SSQOSID so a kernel built with the ISA extension but without the driver (e.g. RESCTRL_FS=n) does not walk the table and print a misleading "found 0 CBQRI controllers" line on every boot. Link: https://github.com/riscv-non-isa/riscv-cbqri/releases/tag/v1.0 Link: https://github.com/riscv-non-isa/riscv-rqsc/blob/main/src/ Assisted-by: Claude:claude-opus-4-7 Signed-off-by: Drew Fustini Signed-off-by: Linux RISC-V bot --- drivers/acpi/riscv/init.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/drivers/acpi/riscv/init.c b/drivers/acpi/riscv/init.c index 7c00f7995e866d..129ebfae28be3d 100644 --- a/drivers/acpi/riscv/init.c +++ b/drivers/acpi/riscv/init.c @@ -5,11 +5,32 @@ */ #include +#include #include "init.h" +#include "rqsc.h" void __init acpi_arch_init(void) { riscv_acpi_init_gsi_mapping(); + if (IS_ENABLED(CONFIG_ACPI_RIMT)) riscv_acpi_rimt_init(); + + if (IS_ENABLED(CONFIG_RISCV_CBQRI_DRIVER)) { + struct acpi_table_header *rqsc __free(acpi_put_table) = NULL; + acpi_status status = acpi_get_table(ACPI_SIG_RQSC, 0, &rqsc); + + if (status == AE_NOT_FOUND) { + /* RQSC is optional. Silence on systems without it. */ + } else if (ACPI_FAILURE(status)) { + pr_err("RQSC: failed to get table: %s\n", + acpi_format_exception(status)); + } else { + int rc = acpi_parse_rqsc(rqsc); + + if (rc < 0) + pr_err("RQSC: failed to parse table: %d\n", + rc); + } + } } From 55f3e718788a7748847a75bb1e386c282a289fc9 Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Sun, 10 May 2026 22:11:14 -0700 Subject: [PATCH 19/19] riscv: enable resctrl filesystem for Ssqosid RISCV_ISA_SSQOSID selects RISCV_CBQRI_DRIVER, which in turn depends on RESCTRL_FS. Enabling the resctrl filesystem itself stays a user choice via the standard fs/Kconfig MISC_FILESYSTEMS menu. Signed-off-by: Drew Fustini Signed-off-by: Linux RISC-V bot --- arch/riscv/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index a0c73edbe73447..ea430b4a3aabfb 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -596,6 +596,7 @@ config RISCV_ISA_SSQOSID depends on 64BIT default n select ARCH_HAS_CPU_RESCTRL + select RISCV_CBQRI_DRIVER if RESCTRL_FS help Adds support for the Ssqosid ISA extension (Supervisor-mode Quality of Service ID).