From 13e9cd25f67410543fa06d132e91c7d95eb2fe4f Mon Sep 17 00:00:00 2001 From: Guodong Xu Date: Sun, 20 Apr 2025 15:02:46 +0800 Subject: [PATCH 1/6] dt-bindings: pwm: marvell,pxa-pwm: Add SpacemiT K1 PWM support The SpacemiT K1 SoC reuses the Marvell PXA910-compatible PWM controller with one notable difference: the addition of a resets property. To make the device tree pass schema validation (make dtbs_check W=3), this patch updates the binding to accept spacemit,k1-pwm as a compatible string, when used in conjunction with the fallback marvell,pxa910-pwm. Support for the optional resets property is also added, as it is required by the K1 integration but was not present in the original Marvell bindings. Since the PWM reset line may be deasserted during the early bootloader stage, making the resets property optional avoids potential double-deassertion, which could otherwise cause flickering on displays that use PWM for backlight control. Signed-off-by: Guodong Xu Signed-off-by: Linux RISC-V bot --- .../bindings/pwm/marvell,pxa-pwm.yaml | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml b/Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml index 9ee1946dc2e120..0d97333c7fee0e 100644 --- a/Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/marvell,pxa-pwm.yaml @@ -14,11 +14,15 @@ allOf: properties: compatible: - enum: - - marvell,pxa250-pwm - - marvell,pxa270-pwm - - marvell,pxa168-pwm - - marvell,pxa910-pwm + oneOf: + - enum: + - marvell,pxa250-pwm + - marvell,pxa270-pwm + - marvell,pxa168-pwm + - marvell,pxa910-pwm + - items: + - const: spacemit,k1-pwm + - const: marvell,pxa910-pwm reg: # Length should be 0x10 @@ -31,6 +35,9 @@ properties: clocks: maxItems: 1 + resets: + maxItems: 1 + required: - compatible - reg From f7f4aa0991c8bbe33a1d7df2bb08f1cd5f9bc79f Mon Sep 17 00:00:00 2001 From: Guodong Xu Date: Sun, 20 Apr 2025 15:02:47 +0800 Subject: [PATCH 2/6] pwm: pxa: add optional reset control Support optional reset control for the PWM PXA driver. During the probe, it acquires the reset controller using devm_reset_control_get_optional_exclusive_deasserted() to get and deassert the reset controller to enable the PWM channel. Signed-off-by: Guodong Xu Signed-off-by: Linux RISC-V bot --- drivers/pwm/pwm-pxa.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/pwm/pwm-pxa.c b/drivers/pwm/pwm-pxa.c index 430bd6a709e94c..dd9c6af0f672c3 100644 --- a/drivers/pwm/pwm-pxa.c +++ b/drivers/pwm/pwm-pxa.c @@ -25,6 +25,7 @@ #include #include #include +#include #include @@ -49,10 +50,10 @@ MODULE_DEVICE_TABLE(platform, pwm_id_table); #define PWMDCR_FD (1 << 10) struct pxa_pwm_chip { - struct device *dev; - - struct clk *clk; - void __iomem *mmio_base; + struct device *dev; + struct clk *clk; + void __iomem *mmio_base; + struct reset_control *reset; }; static inline struct pxa_pwm_chip *to_pxa_pwm_chip(struct pwm_chip *chip) @@ -179,6 +180,11 @@ static int pwm_probe(struct platform_device *pdev) if (IS_ERR(pc->clk)) return PTR_ERR(pc->clk); + pc->reset = devm_reset_control_get_optional_exclusive_deasserted( + &pdev->dev, NULL); + if (IS_ERR(pc->reset)) + return PTR_ERR(pc->reset); + chip->ops = &pxa_pwm_ops; if (IS_ENABLED(CONFIG_OF)) From 5e982eff1e27f672745fe703c2d20d31a197b2c6 Mon Sep 17 00:00:00 2001 From: Guodong Xu Date: Sun, 20 Apr 2025 15:02:48 +0800 Subject: [PATCH 3/6] riscv: dts: spacemit: add PWM support for K1 SoC The SpacemiT K1 SoC features a PWM controller with 20 independent channels. Add the corresponding 20 PWM nodes to the device tree. Signed-off-by: Guodong Xu Signed-off-by: Linux RISC-V bot --- arch/riscv/boot/dts/spacemit/k1.dtsi | 180 +++++++++++++++++++++++++++ 1 file changed, 180 insertions(+) diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi index c670ebf8fa1291..3b9df17a0723c6 100644 --- a/arch/riscv/boot/dts/spacemit/k1.dtsi +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi @@ -448,5 +448,185 @@ reg-io-width = <4>; status = "reserved"; /* for TEE usage */ }; + + pwm0: pwm@d401a000 { + compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm"; + reg = <0x0 0xd401a000 0x0 0x10>; + #pwm-cells = <1>; + clocks = <&syscon_apbc CLK_PWM0>; + resets = <&syscon_apbc RESET_PWM0>; + status = "disabled"; + }; + + pwm1: pwm@d401a400 { + compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm"; + reg = <0x0 0xd401a400 0x0 0x10>; + #pwm-cells = <1>; + clocks = <&syscon_apbc CLK_PWM1>; + resets = <&syscon_apbc RESET_PWM1>; + status = "disabled"; + }; + + pwm2: pwm@d401a800 { + compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm"; + reg = <0x0 0xd401a800 0x0 0x10>; + #pwm-cells = <1>; + clocks = <&syscon_apbc CLK_PWM2>; + resets = <&syscon_apbc RESET_PWM2>; + status = "disabled"; + }; + + pwm3: pwm@d401ac00 { + compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm"; + reg = <0x0 0xd401ac00 0x0 0x10>; + #pwm-cells = <1>; + clocks = <&syscon_apbc CLK_PWM3>; + resets = <&syscon_apbc RESET_PWM3>; + status = "disabled"; + }; + + pwm4: pwm@d401b000 { + compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm"; + reg = <0x0 0xd401b000 0x0 0x10>; + #pwm-cells = <1>; + clocks = <&syscon_apbc CLK_PWM4>; + resets = <&syscon_apbc RESET_PWM4>; + status = "disabled"; + }; + + pwm5: pwm@d401b400 { + compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm"; + reg = <0x0 0xd401b400 0x0 0x10>; + #pwm-cells = <1>; + clocks = <&syscon_apbc CLK_PWM5>; + resets = <&syscon_apbc RESET_PWM5>; + status = "disabled"; + }; + + pwm6: pwm@d401b800 { + compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm"; + reg = <0x0 0xd401b800 0x0 0x10>; + #pwm-cells = <1>; + clocks = <&syscon_apbc CLK_PWM6>; + resets = <&syscon_apbc RESET_PWM6>; + status = "disabled"; + }; + + pwm7: pwm@d401bc00 { + compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm"; + reg = <0x0 0xd401bc00 0x0 0x10>; + #pwm-cells = <1>; + clocks = <&syscon_apbc CLK_PWM7>; + resets = <&syscon_apbc RESET_PWM7>; + status = "disabled"; + }; + + pwm8: pwm@d4020000 { + compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm"; + reg = <0x0 0xd4020000 0x0 0x10>; + #pwm-cells = <1>; + clocks = <&syscon_apbc CLK_PWM8>; + resets = <&syscon_apbc RESET_PWM8>; + status = "disabled"; + }; + + pwm9: pwm@d4020400 { + compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm"; + reg = <0x0 0xd4020400 0x0 0x10>; + #pwm-cells = <1>; + clocks = <&syscon_apbc CLK_PWM9>; + resets = <&syscon_apbc RESET_PWM9>; + status = "disabled"; + }; + + pwm10: pwm@d4020800 { + compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm"; + reg = <0x0 0xd4020800 0x0 0x10>; + #pwm-cells = <1>; + clocks = <&syscon_apbc CLK_PWM10>; + resets = <&syscon_apbc RESET_PWM10>; + status = "disabled"; + }; + + pwm11: pwm@d4020c00 { + compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm"; + reg = <0x0 0xd4020c00 0x0 0x10>; + #pwm-cells = <1>; + clocks = <&syscon_apbc CLK_PWM11>; + resets = <&syscon_apbc RESET_PWM11>; + status = "disabled"; + }; + + pwm12: pwm@d4021000 { + compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm"; + reg = <0x0 0xd4021000 0x0 0x10>; + #pwm-cells = <1>; + clocks = <&syscon_apbc CLK_PWM12>; + resets = <&syscon_apbc RESET_PWM12>; + status = "disabled"; + }; + + pwm13: pwm@d4021400 { + compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm"; + reg = <0x0 0xd4021400 0x0 0x10>; + #pwm-cells = <1>; + clocks = <&syscon_apbc CLK_PWM13>; + resets = <&syscon_apbc RESET_PWM13>; + status = "disabled"; + }; + + pwm14: pwm@d4021800 { + compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm"; + reg = <0x0 0xd4021800 0x0 0x10>; + #pwm-cells = <1>; + clocks = <&syscon_apbc CLK_PWM14>; + resets = <&syscon_apbc RESET_PWM14>; + status = "disabled"; + }; + + pwm15: pwm@d4021c00 { + compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm"; + reg = <0x0 0xd4021c00 0x0 0x10>; + #pwm-cells = <1>; + clocks = <&syscon_apbc CLK_PWM15>; + resets = <&syscon_apbc RESET_PWM15>; + status = "disabled"; + }; + + pwm16: pwm@d4022000 { + compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm"; + reg = <0x0 0xd4022000 0x0 0x10>; + #pwm-cells = <1>; + clocks = <&syscon_apbc CLK_PWM16>; + resets = <&syscon_apbc RESET_PWM16>; + status = "disabled"; + }; + + pwm17: pwm@d4022400 { + compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm"; + reg = <0x0 0xd4022400 0x0 0x10>; + #pwm-cells = <1>; + clocks = <&syscon_apbc CLK_PWM17>; + resets = <&syscon_apbc RESET_PWM17>; + status = "disabled"; + }; + + pwm18: pwm@d4022800 { + compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm"; + reg = <0x0 0xd4022800 0x0 0x10>; + #pwm-cells = <1>; + clocks = <&syscon_apbc CLK_PWM18>; + resets = <&syscon_apbc RESET_PWM18>; + status = "disabled"; + }; + + pwm19: pwm@d4022c00 { + compatible = "spacemit,k1-pwm", "marvell,pxa910-pwm"; + reg = <0x0 0xd4022c00 0x0 0x10>; + #pwm-cells = <1>; + clocks = <&syscon_apbc CLK_PWM19>; + resets = <&syscon_apbc RESET_PWM19>; + status = "disabled"; + }; }; }; From 16ca2d10b2abb3d22d318ce6dae8e6fed6af6528 Mon Sep 17 00:00:00 2001 From: Guodong Xu Date: Sun, 20 Apr 2025 15:02:49 +0800 Subject: [PATCH 4/6] riscv: dts: spacemit: add pwm14_1 pinctrl setting This patch adds the option 1 (hence the name pwm14_1) pinctrl configuration for PWM14 on the SpacemiT K1 SoC. PWM14 option 1 is used for PWM-based backlight control on MIPI displays. This configuration is present on all existing K1 development boards, such as the Banana Pi BPI-F3 and the Milk-V Jupiter. For reference, a more complete list of PWM0-PWM19 pinctrl configurations including all options can be found in [1]. Note: Since the corresponding functionality for other pins is not yet in use or ready for upstreaming, this patch includes only the pwm14_1 setting. [1] https://lore.kernel.org/all/20250411131423.3802611-7-guodong@riscstar.com/ Signed-off-by: Guodong Xu Signed-off-by: Linux RISC-V bot --- arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi index a8eac5517f8578..d6f770b15f974f 100644 --- a/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi +++ b/arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi @@ -17,4 +17,11 @@ drive-strength = <32>; }; }; + pwm14_1_cfg: pwm14-1-cfg { + pwm14-1-pins { + pinmux = ; + bias-pull-up = <0>; + drive-strength = <32>; + }; + }; }; From ac5f0e05f61aba988aefba91501f43f01b9e152c Mon Sep 17 00:00:00 2001 From: Guodong Xu Date: Sun, 20 Apr 2025 15:02:50 +0800 Subject: [PATCH 5/6] pwm: Kconfig: add depends on ARCH_SPACEMIT to PWM_PXA The SpacemiT K1 SoC uses PWM_PXA driver. Update the Kconfig file for the PWM_PXA driver to allow the SpacemiT K1 SoC to use it. Signed-off-by: Guodong Xu Signed-off-by: Linux RISC-V bot --- drivers/pwm/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index 4731d5b90d7edc..6731669e724e0a 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -493,7 +493,7 @@ config PWM_PCA9685 config PWM_PXA tristate "PXA PWM support" - depends on ARCH_PXA || ARCH_MMP || COMPILE_TEST + depends on ARCH_PXA || ARCH_MMP || ARCH_SPACEMIT || COMPILE_TEST depends on HAS_IOMEM help Generic PWM framework driver for PXA. From d459b0ae4c70efcb2933f14d640159eae614f7ed Mon Sep 17 00:00:00 2001 From: Guodong Xu Date: Sun, 20 Apr 2025 15:02:51 +0800 Subject: [PATCH 6/6] riscv: defconfig: Enable PWM support for SpacemiT K1 SoC Enable CONFIG_PWM and CONFIG_PWM_PXA in the defconfig to support the PWM controller used on the SpacemiT K1 SoC. Signed-off-by: Guodong Xu Signed-off-by: Linux RISC-V bot --- arch/riscv/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 3c8e16d71e175e..3c4d9bb8f01eb4 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -257,6 +257,8 @@ CONFIG_RPMSG_CTRL=y CONFIG_RPMSG_VIRTIO=y CONFIG_PM_DEVFREQ=y CONFIG_IIO=y +CONFIG_PWM=y +CONFIG_PWM_PXA=m CONFIG_THEAD_C900_ACLINT_SSWI=y CONFIG_PHY_SUN4I_USB=m CONFIG_PHY_STARFIVE_JH7110_DPHY_RX=m