From 1c3a17c12f40451490c1d20a917187db3580e5ab Mon Sep 17 00:00:00 2001 From: Yunhui Cui Date: Thu, 15 May 2025 17:43:01 +0800 Subject: [PATCH] ACPI: RISC-V: CPPC: Add CSR_CYCLE for CPPC FFH Add the read of CSR_CYCLE to cppc_ffh_csr_read() to fix the warning message: "CPPC Cpufreq: cppc_scale_freq_wokrfn: failed to read perf counters". Signed-off-by: Yunhui Cui Signed-off-by: Linux RISC-V bot --- drivers/acpi/riscv/cppc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/acpi/riscv/cppc.c b/drivers/acpi/riscv/cppc.c index 4cdff387deff6c..c1acaeb18eac3f 100644 --- a/drivers/acpi/riscv/cppc.c +++ b/drivers/acpi/riscv/cppc.c @@ -69,11 +69,14 @@ static void cppc_ffh_csr_read(void *read_data) struct sbi_cppc_data *data = (struct sbi_cppc_data *)read_data; switch (data->reg) { - /* Support only TIME CSR for now */ case CSR_TIME: data->ret.value = csr_read(CSR_TIME); data->ret.error = 0; break; + case CSR_CYCLE: + data->ret.value = csr_read(CSR_CYCLE); + data->ret.error = 0; + break; default: data->ret.error = -EINVAL; break;