From f4c75abcb11a73f9cb5ed0dd76b920ddc651e5f4 Mon Sep 17 00:00:00 2001 From: Zixian Zeng Date: Fri, 23 May 2025 18:54:49 +0800 Subject: [PATCH 1/3] dt-bindings: spi: Add bindings for SOPHGO SG2042 Add bindings for the SOPHGO SG2042 SPI-NOR flash controller, which is compatible with SOPHGO SG2044. Signed-off-by: Zixian Zeng Signed-off-by: Linux RISC-V bot --- Documentation/devicetree/bindings/spi/spi-sg2044-nor.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/spi/spi-sg2044-nor.yaml b/Documentation/devicetree/bindings/spi/spi-sg2044-nor.yaml index 948ff7a096433a..e083362e8f76f7 100644 --- a/Documentation/devicetree/bindings/spi/spi-sg2044-nor.yaml +++ b/Documentation/devicetree/bindings/spi/spi-sg2044-nor.yaml @@ -14,7 +14,11 @@ allOf: properties: compatible: - const: sophgo,sg2044-spifmc-nor + description: Compatible strings for SOPHGO SPI NOR controller + items: + - enum: + - sophgo,sg2042-spifmc-nor + - const: sophgo,sg2044-spifmc-nor reg: maxItems: 1 From 9d97f94cf0a2436a0e120080c344419e190d3494 Mon Sep 17 00:00:00 2001 From: Zixian Zeng Date: Fri, 23 May 2025 18:54:50 +0800 Subject: [PATCH 2/3] mtd: spi-nor: Add GD25LB512ME GigaDevice flash_info Add GD25LB512ME SPI-NOR flash information Signed-off-by: Zixian Zeng Signed-off-by: Linux RISC-V bot --- drivers/mtd/spi-nor/gigadevice.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadevice.c index ef1edd0add70e6..223b2f598ecd65 100644 --- a/drivers/mtd/spi-nor/gigadevice.c +++ b/drivers/mtd/spi-nor/gigadevice.c @@ -33,6 +33,15 @@ static const struct spi_nor_fixups gd25q256_fixups = { .post_bfpt = gd25q256_post_bfpt, }; +static void gd25lb512me_default_init(struct spi_nor *nor) +{ + nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable; +} + +static const struct spi_nor_fixups gd25lb512me_fixups = { + .default_init = gd25lb512me_default_init, +}; + static const struct flash_info gigadevice_nor_parts[] = { { .id = SNOR_ID(0xc8, 0x40, 0x15), @@ -82,6 +91,14 @@ static const struct flash_info gigadevice_nor_parts[] = { .size = SZ_16M, .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id = SNOR_ID(0xc8, 0x67, 0x1a), + .name = "gd25lb512me", + .size = SZ_64M, + .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ, + .fixups = &gd25lb512me_fixups, + .fixup_flags = SPI_NOR_4B_OPCODES, }, }; From 067f892775f796ef62574a144940cae51e5ef0ce Mon Sep 17 00:00:00 2001 From: Zixian Zeng Date: Fri, 23 May 2025 18:54:51 +0800 Subject: [PATCH 3/3] riscv: dts: sophgo: Add SPI NOR node for SG2042 Add SPI-NOR controller and flash nodes to device tree for SG2042. Signed-off-by: Zixian Zeng Signed-off-by: Linux RISC-V bot --- .../boot/dts/sophgo/sg2042-milkv-pioneer.dts | 18 ++++++++++++++ arch/riscv/boot/dts/sophgo/sg2042.dtsi | 24 +++++++++++++++++++ 2 files changed, 42 insertions(+) diff --git a/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts b/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts index 34645a5f603838..c59a819e35d320 100644 --- a/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts +++ b/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts @@ -68,6 +68,24 @@ status = "okay"; }; +&spifmc0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + }; +}; + +&spifmc1 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + }; +}; + &uart0 { status = "okay"; }; diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi index aa8b7fcc125d71..d37ca11dc22d77 100644 --- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi +++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi @@ -47,6 +47,30 @@ interrupt-parent = <&intc>; ranges; + spifmc0: spi@7000180000 { + compatible = "sophgo,sg2042-spifmc-nor", "sophgo,sg2044-spifmc-nor"; + reg = <0x70 0x00180000 0x0 0x1000000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkgen GATE_CLK_AHB_SF>; + interrupt-parent = <&intc>; + interrupts = <108 IRQ_TYPE_LEVEL_HIGH>; + resets = <&rstgen RST_SF0>; + status = "disabled"; + }; + + spifmc1: spi@7002180000 { + compatible = "sophgo,sg2042-spifmc-nor", "sophgo,sg2044-spifmc-nor"; + reg = <0x70 0x02180000 0x0 0x1000000>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clkgen GATE_CLK_AHB_SF>; + interrupt-parent = <&intc>; + interrupts = <109 IRQ_TYPE_LEVEL_HIGH>; + resets = <&rstgen RST_SF1>; + status = "disabled"; + }; + i2c0: i2c@7030005000 { compatible = "snps,designware-i2c"; reg = <0x70 0x30005000 0x0 0x1000>;