diff --git a/archiTA/simulator/pipeline b/archiTA/simulator/pipeline
deleted file mode 100644
index f7aa1f2..0000000
Binary files a/archiTA/simulator/pipeline and /dev/null differ
diff --git a/archiTA/testcase/open_testcase/error/dimage.bin b/archiTA/testcase/open_testcase/error/dimage.bin
deleted file mode 100644
index 03d98a8..0000000
Binary files a/archiTA/testcase/open_testcase/error/dimage.bin and /dev/null differ
diff --git a/archiTA/testcase/open_testcase/error/error.S b/archiTA/testcase/open_testcase/error/error.S
deleted file mode 100644
index c54edc8..0000000
--- a/archiTA/testcase/open_testcase/error/error.S
+++ /dev/null
@@ -1,9 +0,0 @@
-lw $t0 0($0) # Mem[0]: 0x7FFFFFFF 
-add $0 $0 $0
-lw $t1, 1025($0)
-addi $t1, $t0, 1
-halt
-halt
-halt
-halt
-halt
diff --git a/archiTA/testcase/open_testcase/error/error_dump.rpt b/archiTA/testcase/open_testcase/error/error_dump.rpt
deleted file mode 100644
index b9329bb..0000000
--- a/archiTA/testcase/open_testcase/error/error_dump.rpt
+++ /dev/null
@@ -1,4 +0,0 @@
-In cycle 6: Write $0 Error
-In cycle 6: Address Overflow
-In cycle 6: Misalignment Error
-In cycle 6: Number Overflow
diff --git a/archiTA/testcase/open_testcase/error/iimage.bin b/archiTA/testcase/open_testcase/error/iimage.bin
deleted file mode 100644
index bccc91b..0000000
Binary files a/archiTA/testcase/open_testcase/error/iimage.bin and /dev/null differ
diff --git a/archiTA/testcase/open_testcase/error/snapshot.rpt b/archiTA/testcase/open_testcase/error/snapshot.rpt
deleted file mode 100644
index a963ae2..0000000
--- a/archiTA/testcase/open_testcase/error/snapshot.rpt
+++ /dev/null
@@ -1,246 +0,0 @@
-cycle 0
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000002
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000000
-IF: 0x8C080000
-ID: NOP
-EX: NOP
-DM: NOP
-WB: NOP
-
-
-cycle 1
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000002
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000004
-IF: 0x00000020
-ID: LW
-EX: NOP
-DM: NOP
-WB: NOP
-
-
-cycle 2
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000002
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000008
-IF: 0x8C090401
-ID: ADD
-EX: LW
-DM: NOP
-WB: NOP
-
-
-cycle 3
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000002
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x0000000C
-IF: 0x21090001
-ID: LW
-EX: ADD
-DM: LW
-WB: NOP
-
-
-cycle 4
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000002
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000010
-IF: 0xFFFFFFFF
-ID: ADDI
-EX: LW
-DM: ADD
-WB: LW
-
-
-cycle 5
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x7FFFFFFF
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000002
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000014
-IF: 0xFFFFFFFF
-ID: HALT
-EX: ADDI
-DM: LW
-WB: ADD
-
-
diff --git a/archiTA/testcase/open_testcase/error_3/dimage.bin b/archiTA/testcase/open_testcase/error_3/dimage.bin
deleted file mode 100644
index ab72d91..0000000
Binary files a/archiTA/testcase/open_testcase/error_3/dimage.bin and /dev/null differ
diff --git a/archiTA/testcase/open_testcase/error_3/error_dump.rpt b/archiTA/testcase/open_testcase/error_3/error_dump.rpt
deleted file mode 100644
index 47341ef..0000000
--- a/archiTA/testcase/open_testcase/error_3/error_dump.rpt
+++ /dev/null
@@ -1,3 +0,0 @@
-In cycle 9: Number Overflow
-In cycle 11: Number Overflow
-In cycle 18: Write $0 Error
diff --git a/archiTA/testcase/open_testcase/error_3/iimage.bin b/archiTA/testcase/open_testcase/error_3/iimage.bin
deleted file mode 100644
index 46795c6..0000000
Binary files a/archiTA/testcase/open_testcase/error_3/iimage.bin and /dev/null differ
diff --git a/archiTA/testcase/open_testcase/pipeline1/dimage.bin b/archiTA/testcase/open_testcase/pipeline1/dimage.bin
deleted file mode 100644
index 5c8eb38..0000000
Binary files a/archiTA/testcase/open_testcase/pipeline1/dimage.bin and /dev/null differ
diff --git a/archiTA/testcase/open_testcase/pipeline1/error_dump.rpt b/archiTA/testcase/open_testcase/pipeline1/error_dump.rpt
deleted file mode 100644
index e69de29..0000000
diff --git a/archiTA/testcase/open_testcase/pipeline1/iimage.bin b/archiTA/testcase/open_testcase/pipeline1/iimage.bin
deleted file mode 100644
index c801359..0000000
Binary files a/archiTA/testcase/open_testcase/pipeline1/iimage.bin and /dev/null differ
diff --git a/archiTA/testcase/open_testcase/pipeline1/pipeline1.S b/archiTA/testcase/open_testcase/pipeline1/pipeline1.S
deleted file mode 100644
index 30b502b..0000000
--- a/archiTA/testcase/open_testcase/pipeline1/pipeline1.S
+++ /dev/null
@@ -1,9 +0,0 @@
-          lw $2, 0($3)
-          or $3, $1, $4
-         beq $2, $3, anyway
-         and $1, $1, $0
-anyway: halt
-        halt
-        halt
-        halt
-        halt
\ No newline at end of file
diff --git a/archiTA/testcase/open_testcase/pipeline1/snapshot.rpt b/archiTA/testcase/open_testcase/pipeline1/snapshot.rpt
deleted file mode 100644
index c9216b4..0000000
--- a/archiTA/testcase/open_testcase/pipeline1/snapshot.rpt
+++ /dev/null
@@ -1,410 +0,0 @@
-cycle 0
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000000
-IF: 0x8C620000
-ID: NOP
-EX: NOP
-DM: NOP
-WB: NOP
-
-
-cycle 1
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000004
-IF: 0x00241825
-ID: LW
-EX: NOP
-DM: NOP
-WB: NOP
-
-
-cycle 2
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000008
-IF: 0x10430001
-ID: OR
-EX: LW
-DM: NOP
-WB: NOP
-
-
-cycle 3
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x0000000C
-IF: 0x00200824 to_be_stalled
-ID: BEQ to_be_stalled
-EX: OR
-DM: LW
-WB: NOP
-
-
-cycle 4
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x0000000C
-IF: 0x00200824
-ID: BEQ fwd_EX-DM_rt_$3
-EX: NOP
-DM: OR
-WB: LW
-
-
-cycle 5
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x12345678
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000010
-IF: 0xFFFFFFFF
-ID: AND
-EX: BEQ
-DM: NOP
-WB: OR
-
-
-cycle 6
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x12345678
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000014
-IF: 0xFFFFFFFF
-ID: HALT
-EX: AND
-DM: BEQ
-WB: NOP
-
-
-cycle 7
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x12345678
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000018
-IF: 0xFFFFFFFF
-ID: HALT
-EX: HALT
-DM: AND
-WB: BEQ
-
-
-cycle 8
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x12345678
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x0000001C
-IF: 0xFFFFFFFF
-ID: HALT
-EX: HALT
-DM: HALT
-WB: AND
-
-
-cycle 9
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x12345678
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000020
-IF: 0xFFFFFFFF
-ID: HALT
-EX: HALT
-DM: HALT
-WB: HALT
-
-
diff --git a/archiTA/testcase/open_testcase/pipeline2/dimage.bin b/archiTA/testcase/open_testcase/pipeline2/dimage.bin
deleted file mode 100644
index 1b1cb4d..0000000
Binary files a/archiTA/testcase/open_testcase/pipeline2/dimage.bin and /dev/null differ
diff --git a/archiTA/testcase/open_testcase/pipeline2/error_dump.rpt b/archiTA/testcase/open_testcase/pipeline2/error_dump.rpt
deleted file mode 100644
index e69de29..0000000
diff --git a/archiTA/testcase/open_testcase/pipeline2/iimage.bin b/archiTA/testcase/open_testcase/pipeline2/iimage.bin
deleted file mode 100644
index 6493d23..0000000
Binary files a/archiTA/testcase/open_testcase/pipeline2/iimage.bin and /dev/null differ
diff --git a/archiTA/testcase/open_testcase/pipeline2/pipeline2.S b/archiTA/testcase/open_testcase/pipeline2/pipeline2.S
deleted file mode 100644
index d564346..0000000
--- a/archiTA/testcase/open_testcase/pipeline2/pipeline2.S
+++ /dev/null
@@ -1,8 +0,0 @@
-          lw $3, 0($2)
-         bne $1, $3, anyway
-         and $2, $5, $0
-anyway: halt
-        halt
-        halt
-        halt
-        halt
\ No newline at end of file
diff --git a/archiTA/testcase/open_testcase/pipeline2/snapshot.rpt b/archiTA/testcase/open_testcase/pipeline2/snapshot.rpt
deleted file mode 100644
index 72473ba..0000000
--- a/archiTA/testcase/open_testcase/pipeline2/snapshot.rpt
+++ /dev/null
@@ -1,410 +0,0 @@
-cycle 0
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000000
-IF: 0x8C430000
-ID: NOP
-EX: NOP
-DM: NOP
-WB: NOP
-
-
-cycle 1
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000004
-IF: 0x14230001
-ID: LW
-EX: NOP
-DM: NOP
-WB: NOP
-
-
-cycle 2
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000008
-IF: 0x00A01024 to_be_stalled
-ID: BNE to_be_stalled
-EX: LW
-DM: NOP
-WB: NOP
-
-
-cycle 3
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000008
-IF: 0x00A01024 to_be_stalled
-ID: BNE to_be_stalled
-EX: NOP
-DM: LW
-WB: NOP
-
-
-cycle 4
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000008
-IF: 0x00A01024
-ID: BNE
-EX: NOP
-DM: NOP
-WB: LW
-
-
-cycle 5
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x0000000C
-IF: 0xFFFFFFFF
-ID: AND
-EX: BNE
-DM: NOP
-WB: NOP
-
-
-cycle 6
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000010
-IF: 0xFFFFFFFF
-ID: HALT
-EX: AND
-DM: BNE
-WB: NOP
-
-
-cycle 7
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000014
-IF: 0xFFFFFFFF
-ID: HALT
-EX: HALT
-DM: AND
-WB: BNE
-
-
-cycle 8
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000018
-IF: 0xFFFFFFFF
-ID: HALT
-EX: HALT
-DM: HALT
-WB: AND
-
-
-cycle 9
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x0000001C
-IF: 0xFFFFFFFF
-ID: HALT
-EX: HALT
-DM: HALT
-WB: HALT
-
-
diff --git a/archiTA/testcase/open_testcase/pipeline3/dimage.bin b/archiTA/testcase/open_testcase/pipeline3/dimage.bin
deleted file mode 100644
index 1b1cb4d..0000000
Binary files a/archiTA/testcase/open_testcase/pipeline3/dimage.bin and /dev/null differ
diff --git a/archiTA/testcase/open_testcase/pipeline3/error_dump.rpt b/archiTA/testcase/open_testcase/pipeline3/error_dump.rpt
deleted file mode 100644
index e69de29..0000000
diff --git a/archiTA/testcase/open_testcase/pipeline3/iimage.bin b/archiTA/testcase/open_testcase/pipeline3/iimage.bin
deleted file mode 100644
index b22eda6..0000000
Binary files a/archiTA/testcase/open_testcase/pipeline3/iimage.bin and /dev/null differ
diff --git a/archiTA/testcase/open_testcase/pipeline3/pipeline3.S b/archiTA/testcase/open_testcase/pipeline3/pipeline3.S
deleted file mode 100644
index 629cc21..0000000
--- a/archiTA/testcase/open_testcase/pipeline3/pipeline3.S
+++ /dev/null
@@ -1,9 +0,0 @@
-  lw $3, 0($2)
-  or $1, $3, $4
- and $2, $5, $0
- xor $7, $8, $9
-halt
-halt
-halt
-halt
-halt
\ No newline at end of file
diff --git a/archiTA/testcase/open_testcase/pipeline3/snapshot.rpt b/archiTA/testcase/open_testcase/pipeline3/snapshot.rpt
deleted file mode 100644
index bd464fe..0000000
--- a/archiTA/testcase/open_testcase/pipeline3/snapshot.rpt
+++ /dev/null
@@ -1,451 +0,0 @@
-cycle 0
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000000
-IF: 0x8C430000
-ID: NOP
-EX: NOP
-DM: NOP
-WB: NOP
-
-
-cycle 1
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000004
-IF: 0x00640825
-ID: LW
-EX: NOP
-DM: NOP
-WB: NOP
-
-
-cycle 2
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000008
-IF: 0x00A01024 to_be_stalled
-ID: OR to_be_stalled
-EX: LW
-DM: NOP
-WB: NOP
-
-
-cycle 3
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000008
-IF: 0x00A01024 to_be_stalled
-ID: OR to_be_stalled
-EX: NOP
-DM: LW
-WB: NOP
-
-
-cycle 4
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000008
-IF: 0x00A01024
-ID: OR
-EX: NOP
-DM: NOP
-WB: LW
-
-
-cycle 5
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x0000000C
-IF: 0x01093826
-ID: AND
-EX: OR
-DM: NOP
-WB: NOP
-
-
-cycle 6
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000010
-IF: 0xFFFFFFFF
-ID: XOR
-EX: AND
-DM: OR
-WB: NOP
-
-
-cycle 7
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000014
-IF: 0xFFFFFFFF
-ID: HALT
-EX: XOR
-DM: AND
-WB: OR
-
-
-cycle 8
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000018
-IF: 0xFFFFFFFF
-ID: HALT
-EX: HALT
-DM: XOR
-WB: AND
-
-
-cycle 9
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x0000001C
-IF: 0xFFFFFFFF
-ID: HALT
-EX: HALT
-DM: HALT
-WB: XOR
-
-
-cycle 10
-$00: 0x00000000
-$01: 0x00000000
-$02: 0x00000000
-$03: 0x00000000
-$04: 0x00000000
-$05: 0x00000000
-$06: 0x00000000
-$07: 0x00000000
-$08: 0x00000000
-$09: 0x00000000
-$10: 0x00000000
-$11: 0x00000000
-$12: 0x00000000
-$13: 0x00000000
-$14: 0x00000000
-$15: 0x00000000
-$16: 0x00000000
-$17: 0x00000000
-$18: 0x00000000
-$19: 0x00000000
-$20: 0x00000000
-$21: 0x00000000
-$22: 0x00000000
-$23: 0x00000000
-$24: 0x00000000
-$25: 0x00000000
-$26: 0x00000000
-$27: 0x00000000
-$28: 0x00000000
-$29: 0x00000000
-$30: 0x00000000
-$31: 0x00000000
-PC: 0x00000020
-IF: 0xFFFFFFFF
-ID: HALT
-EX: HALT
-DM: HALT
-WB: HALT
-
-
diff --git a/pipeline/simulator/Makefile b/pipeline/simulator/Makefile
new file mode 100644
index 0000000..16bc4d5
--- /dev/null
+++ b/pipeline/simulator/Makefile
@@ -0,0 +1,13 @@
+CC = gcc -Wall
+SRCS = ./*.c
+OBS = ./*.o
+
+
+pipeline: SRC
+	$(CC) -o $@ $(OBS)
+
+SRC: $(SRCS)
+	$(CC) -c $(SRCS)
+
+clean: $(OBS)
+	rm $(OBS) pipeline
diff --git a/pipeline/simulator/function.c b/pipeline/simulator/function.c
new file mode 100644
index 0000000..6c73d46
--- /dev/null
+++ b/pipeline/simulator/function.c
@@ -0,0 +1,371 @@
+#include "function.h"
+#include <stdlib.h>
+
+int overflow_detect(int ans,int a,int b)
+{
+
+
+    if((a>0&&b>0&&ans<=0)||(a<0&&b<0&&ans>=0))
+        return 1;
+    else return 0;
+
+/*
+  int x=a>>31;
+  int y=b>>31;
+  int z=ans>>31;
+  if(x==y &&x!=z)
+    return 1;
+  else return 0;
+*/
+}
+unsigned char cut_rs(int a)
+{
+    unsigned char back;
+    a<<=6;
+    back=(unsigned)a>>27;
+
+   // printf("%x ",back);
+    return back;
+}
+unsigned char cut_rt(int a)
+{
+    unsigned char back;
+    a<<=11;
+    back=(unsigned)a>>27;
+
+   // printf("%x ",back);
+    return back;
+}
+unsigned char cut_rd(int a)
+{
+    unsigned char back;
+    a<<=16;
+    back=(unsigned)a>>27;
+
+   // printf("%x ",back);
+    return back;
+}
+unsigned char cut_shamt(int a)
+{
+    unsigned char back;
+    a<<=21;
+    back=(unsigned)a>>27;
+
+    //printf("%x ",back);
+    return back;
+}
+unsigned char cut_func(int a)
+{
+    unsigned char back;
+    a<<=26;
+    back=(unsigned)a>>26;
+
+   // printf("%x ",back);
+    return back;
+}
+short cut_immediate(int a)
+{
+    short back;
+    a<<=16;
+    back=a>>16;
+
+    //printf("%x ",back);
+    return back;
+}
+
+unsigned short cut_immediate_unsigned(int a)
+{
+    unsigned short back;
+    a<<=16;
+    back=(unsigned)a>>16;
+
+    //printf("%x ",back);
+    return back;
+}
+unsigned int cut_address(int a)
+{
+    unsigned int back;
+    a<<=6;
+    back=(unsigned)a>>6;
+
+    //printf("%x ",back);
+    return back;
+}
+
+
+unsigned int combine(unsigned char a,unsigned char b,unsigned char c,unsigned char d)
+{
+
+    unsigned int back=0;
+    back |= a;
+    back <<= 8;
+    back |= b;
+    back <<= 8;
+    back |= c;
+    back <<= 8;
+    back |= d;
+    return back;
+
+}
+unsigned short combine_two(unsigned char a, unsigned char b)
+{
+    unsigned short back=0;
+    back |= a;
+    back <<= 8;
+    back |= b;
+    return back;
+}
+
+unsigned char* seperate(int in)
+{
+    unsigned char* back;
+    back=(unsigned char*)malloc(sizeof(unsigned char)*4);
+    int a,b,c,d;
+    a=in,b=in,c=in,d=in;
+
+    a=(unsigned)a>>24;
+    b=b<<8;
+    b=(unsigned)b>>24;
+    c=c<<16;
+    c=(unsigned)c>>24;
+    d=d<<24;
+    d=(unsigned)d>>24;
+    back[0]=(unsigned char)a;
+    back[1]=(unsigned char)b;
+    back[2]=(unsigned char)c;
+    back[3]=(unsigned char)d;
+
+    return back;
+}
+unsigned char* seperate_two(int in)
+{
+    unsigned char* back;
+    back=(unsigned char*)malloc(sizeof(char)*2);
+
+    in&=0x0000FFFF;
+
+    int c,d;
+    c=in,d=in;
+
+    c=c<<16;
+    c=(unsigned)c>>24;
+    d=d<<24;
+    d=(unsigned)d>>24;
+    back[0]=(unsigned char)c;
+    back[1]=(unsigned char)d;
+
+    return back;
+}
+
+char* toname(int instruction)
+{
+unsigned char op;
+unsigned char funct;
+unsigned char shamt;
+unsigned char rt;
+unsigned char rd;
+char* out;
+if(instruction==0)
+{
+        out="NOP";
+        return out;
+}
+op=(unsigned)instruction>>26;
+
+
+
+
+            switch(op)
+            {
+            case 0x00:
+            {
+                funct=cut_func(instruction);
+
+                switch(funct)
+                {
+                case 0x20:	///add
+                {
+                    out = "ADD";
+                    break;
+                }
+                case 0x21:	///addu
+                {
+                    out = "ADDU";
+                    break;
+                }
+                case 0x22:	///sub
+                {
+                    out = "SUB";
+                    break;
+                }
+                case 0x24:	///and
+                {
+                    out = "AND";
+                    break;
+                }
+                case 0x25:	///or
+                {
+                    out = "OR";
+                    break;
+                }
+                case 0x26:	///xor
+                {
+                    out = "XOR";
+                    break;
+                }
+                case 0x27:	///nor
+                {
+                    out = "NOR";
+                    break;
+                }
+                case 0x28:	///nand
+                {
+                    out = "NAND";
+                    break;
+                }
+                case 0x2A:	///slt
+                {
+                    out = "SLT";
+                    break;
+                }
+                case 0x00:	///sll
+                {
+                    shamt = cut_shamt(instruction);
+                    rt = cut_rt(instruction);
+                    rd = cut_rd(instruction);
+                    if(shamt==0&&rt==0&&rd==0)
+                        out = "NOP";
+                    else
+                        out = "SLL";
+                    break;
+                }
+                case 0x02:	///srl
+                {
+                    out = "SRL";
+                    break;
+                }
+                case 0x03:	///sra
+                {
+                    out = "SRA";
+                    break;
+                }
+                case 0x08:	///jr
+                {
+                    out = "JR";
+                    break;
+                }
+
+                }
+                break;
+            }
+            case 0x08:	///addi
+            {
+                out = "ADDI";
+                break;
+            }
+            case 0x09:	///addiu
+            {
+                out = "ADDIU";
+                break;
+            }
+            case 0x23:	///lw
+            {
+                out = "LW";
+                break;
+            }
+            case 0x21:	///lh
+            {
+                out = "LH";
+                break;
+            }
+            case 0x25:	///lhu
+            {
+                out = "LHU";
+                break;
+            }
+            case 0x20:	///lb
+            {
+                out = "LB";
+                break;
+            }
+            case 0x24:	///lbu
+            {
+                out = "LBU";
+                break;
+            }
+            case 0x2B:	///sw
+            {
+                out = "SW";
+                break;
+            }
+            case 0x29:	///sh
+            {
+                out = "SH";
+                break;
+            }
+            case 0x28:	///sb
+            {
+                out = "SB";
+                break;
+            }
+            case 0x0F:	///lui
+            {
+                out = "LUI";
+                break;
+            }
+            case 0x0C:	///andi
+            {
+                out = "ANDI";
+                break;
+            }
+            case 0x0D:	///ori
+            {
+                out = "ORI";
+                break;
+            }
+            case 0x0E:	///nori
+            {
+                out = "NORI";
+                break;
+            }
+            case 0x0A:	///slti
+            {
+                out = "SLTI";
+                break;
+            }
+            case 0x04:	///beq
+            {
+                out = "BEQ";
+                break;
+            }
+            case 0x05:	///bne
+            {
+                out = "BNE";
+                break;
+            }
+            case 0x07:	///bgtz
+            {
+                out = "BGTZ";
+                break;
+            }
+            case 0x02:	///j
+            {
+                out = "J";
+                break;
+            }
+            case 0x03:	///jal
+            {
+                out = "JAL";
+                break;
+            }
+            case 0x3F:	///halt
+            {
+                out = "HALT";
+                break;
+            }
+
+
+            }
+
+return out;
+}
diff --git a/pipeline/simulator/function.h b/pipeline/simulator/function.h
new file mode 100644
index 0000000..526bb48
--- /dev/null
+++ b/pipeline/simulator/function.h
@@ -0,0 +1,17 @@
+#include <stdio.h>
+#include <stdlib.h>
+
+
+int overflow_detect(int ans,int a,int b);
+unsigned char cut_rs(int a);
+unsigned char cut_rt(int a);
+unsigned char cut_rd(int a);
+unsigned char cut_shamt(int a);
+unsigned char cut_func(int a);
+short cut_immediate(int a);
+unsigned short cut_immediate_unsigned(int a);
+unsigned int cut_address(int a);
+unsigned int combine(unsigned char a,unsigned char b,unsigned char c,unsigned char d);
+unsigned short combine_two(unsigned char a, unsigned char b);
+unsigned char* seperate(int in);
+unsigned char* seperate_two(int in);
diff --git a/pipeline/simulator/main.c b/pipeline/simulator/main.c
new file mode 100644
index 0000000..a792508
--- /dev/null
+++ b/pipeline/simulator/main.c
@@ -0,0 +1,143 @@
+#include <stdio.h>
+#include <string.h>
+#include "function.h"
+#include "state.h"
+
+
+int reg[32];
+int PC;
+int PC_start;
+unsigned char ii[1024];
+unsigned char di[1024];
+int iim[256];
+unsigned char dim[1024];
+int temp;
+FILE *snapshot;
+FILE *error;
+int count=0;
+extern errors[4];
+
+
+int main(void)
+{
+    FILE *iimage = fopen("./iimage.bin","rb");
+    FILE *dimage = fopen("./dimage.bin","rb");
+    error = fopen("./error_dump.rpt","w");
+    snapshot = fopen("./snapshot.rpt","w");
+
+
+
+
+    int sdata=0,sins=0;
+    int i;
+
+
+    memset(reg,0,sizeof(reg));
+    memset(ii,0,sizeof(ii));
+    memset(di,0,sizeof(di));
+    memset(iim,0,sizeof(iim));
+    memset(dim,0,sizeof(dim));
+    PC=0;
+
+    fseek(iimage , 0 , SEEK_END);
+
+
+    rewind (iimage);
+
+    fread(ii,sizeof(unsigned char),8,iimage);
+
+    fseek(dimage , 0 , SEEK_END);
+
+
+    rewind (dimage);
+
+    fread(di,sizeof(unsigned char),8,dimage);
+
+    /*
+    for(i=0;i<siimage;i++)
+    printf("%x\n",ii[i]);
+    */
+    reg[29]=combine(di[0],di[1],di[2],di[3]);
+    sdata=combine(di[4],di[5],di[6],di[7]);
+
+
+
+    fread(di,sizeof(unsigned char),sdata*4,dimage);
+
+    for(i=0; i<sdata*4; i++)
+    {
+        dim[i]=di[i];
+    }
+
+    PC=combine(ii[0],ii[1],ii[2],ii[3]);
+    PC_start=PC;
+    sins=combine(ii[4],ii[5],ii[6],ii[7]);
+
+    fread(ii,sizeof(unsigned char),sins*4,iimage);
+    for(i=0; i<sins; i++)
+    {
+        iim[i]=combine(ii[i*4],ii[1+i*4],ii[2+i*4],ii[3+i*4]);
+        //  printf("i=%d %x\n",i,iim[i]);
+    }
+    /*
+    for(i=0;i<sins;i++)
+    printf("%x\n",iim[i]);
+    */
+
+    /**
+    ii : string of all the data int iimage.bin
+    di : string of all the data int dimage.bin
+    PC : current PC
+    reg : int array of all the register
+    iim : int array of all the instruction
+    dim : unsigned char array of all the data in memory
+    sins: int of the number of instruction
+    sdata : int of the number of memory (word)
+    **/
+    int check[5]= {0};
+    int flags=0;
+
+    int j=0;
+    while(1)
+    {
+          //  if(count>12)break;
+
+        errors[0]=0;
+        errors[1]=0;
+        errors[2]=0;
+        errors[3]=0;
+
+        fprintf(snapshot,"cycle %d\n",count);
+        for(j=0; j<32; j++)
+        {
+            fprintf(snapshot,"$%02d: 0x%08X\n",j,reg[j]);
+        }
+        check[0]=WB();
+        check[1]=DM();
+        check[2]=EX();
+        check[3]=ID();
+        if(flags==0)
+        {
+            check[4]=IF(0);
+            flags=1;
+        }
+        else
+            check[4]=IF(1);
+
+        fprintf(snapshot,"\n");
+        if(check[0]==1 && check[1]==1 && check[2]==1 && check[3]==1 && check[4]==1)
+            break;
+
+        if(check[1]==2)
+        {
+            break;
+        }
+
+        count++;
+
+    }
+
+
+
+    return 0;
+}
diff --git a/pipeline/simulator/state.c b/pipeline/simulator/state.c
new file mode 100644
index 0000000..ef0c14a
--- /dev/null
+++ b/pipeline/simulator/state.c
@@ -0,0 +1,2908 @@
+#include "state.h"
+
+typedef struct _IFID
+{
+    int instruction;
+    int PC;
+} IFID;
+
+
+
+typedef struct _IDEX
+{
+    int instruction;
+    int read_data1;
+    int read_data2;
+    int immediate_ext;
+    int write_reg;
+    int forward[3];
+    /*
+    forward[0]:
+    0:nope
+    1:rs
+    2:rt
+    3:both
+
+    forward[1]:
+    reg num of rs,rt
+
+    forward[2]:
+    0:EX_DM to EX
+    1:EX_DM to ID
+    */
+    int stall;
+} IDEX;
+
+
+
+typedef struct _EXDM
+{
+    int instruction;
+    int ALU_result;
+    int read_data2;
+    int write_reg;
+    int can_forward;
+    int forward[3];
+    /*
+    forward[0]:
+    0:nope
+    1:rs
+    2:rt
+    3:both
+
+    forward[1]:
+    reg num of rs,rt
+
+    forward[2]:
+    0:EX_DM to EX
+    1:EX_DM to ID
+    */
+    int stall;
+} EXDM;
+
+
+
+typedef struct _DMWB
+{
+    int instruction;
+    int ALU_result;
+    int data;
+    int write_reg;
+    int can_forward;
+} DMWB;
+
+IFID IF_ID;
+IDEX ID_EX;
+EXDM EX_DM;
+DMWB DM_WB;
+
+
+int WB()
+{
+    show_WBi = DM_WB.instruction;
+    int flag=0;
+    op=0,funct=0;
+    if(DM_WB.instruction==0)	return 0;
+
+    op=(unsigned)DM_WB.instruction>>26;
+
+
+
+
+    switch(op)
+    {
+    case 0x00:
+    {
+        funct=cut_func(DM_WB.instruction);
+
+        switch(funct)
+        {
+        case 0x20:	///add
+        {
+            if(DM_WB.write_reg==0)
+            {
+                errors[0]=1;
+                reg[DM_WB.write_reg]=0;
+            }
+            else
+                reg[DM_WB.write_reg] = DM_WB.ALU_result;
+
+            break;
+        }
+        case 0x21:	///addu
+        {
+            if(DM_WB.write_reg==0)
+            {
+                errors[0]=1;
+                reg[DM_WB.write_reg]=0;
+            }
+            else
+                reg[DM_WB.write_reg] = DM_WB.ALU_result;
+            break;
+        }
+        case 0x22:	///sub
+        {
+            if(DM_WB.write_reg==0)
+            {
+                errors[0]=1;
+                reg[DM_WB.write_reg]=0;
+            }
+            else
+                reg[DM_WB.write_reg] = DM_WB.ALU_result;
+            break;
+        }
+        case 0x24:	///and
+        {
+            if(DM_WB.write_reg==0)
+            {
+                errors[0]=1;
+                reg[DM_WB.write_reg]=0;
+            }
+            else
+                reg[DM_WB.write_reg] = DM_WB.ALU_result;
+            break;
+        }
+        case 0x25:	///or
+        {
+            if(DM_WB.write_reg==0)
+            {
+                errors[0]=1;
+                reg[DM_WB.write_reg]=0;
+            }
+            else
+                reg[DM_WB.write_reg] = DM_WB.ALU_result;
+            break;
+        }
+        case 0x26:	///xor
+        {
+            if(DM_WB.write_reg==0)
+            {
+                errors[0]=1;
+                reg[DM_WB.write_reg]=0;
+            }
+            else
+                reg[DM_WB.write_reg] = DM_WB.ALU_result;
+            break;
+        }
+        case 0x27:	///nor
+        {
+            if(DM_WB.write_reg==0)
+            {
+                errors[0]=1;
+                reg[DM_WB.write_reg]=0;
+            }
+            else
+                reg[DM_WB.write_reg] = DM_WB.ALU_result;
+            break;
+        }
+        case 0x28:	///nand
+        {
+            if(DM_WB.write_reg==0)
+            {
+                errors[0]=1;
+                reg[DM_WB.write_reg]=0;
+            }
+            else
+                reg[DM_WB.write_reg] = DM_WB.ALU_result;
+            break;
+        }
+        case 0x2A:	///slt
+        {
+            if(DM_WB.write_reg==0)
+            {
+                errors[0]=1;
+                reg[DM_WB.write_reg]=0;
+            }
+            else
+                reg[DM_WB.write_reg] = DM_WB.ALU_result;
+            break;
+        }
+        case 0x00:	///sll
+        {
+            if(DM_WB.write_reg==0)
+            {
+                errors[0]=1;
+                reg[DM_WB.write_reg]=0;
+            }
+            else
+                reg[DM_WB.write_reg] = DM_WB.ALU_result;
+            break;
+        }
+        case 0x02:	///srl
+        {
+            if(DM_WB.write_reg==0)
+            {
+                errors[0]=1;
+                reg[DM_WB.write_reg]=0;
+            }
+            else
+                reg[DM_WB.write_reg] = DM_WB.ALU_result;
+            break;
+        }
+        case 0x03:	///sra
+        {
+            if(DM_WB.write_reg==0)
+            {
+                errors[0]=1;
+                reg[DM_WB.write_reg]=0;
+            }
+            else
+                reg[DM_WB.write_reg] = DM_WB.ALU_result;
+            break;
+        }
+        case 0x08:	///jr
+        {
+
+            break;
+        }
+
+        }
+        break;
+    }
+    case 0x08:	///addi
+    {
+        if(DM_WB.write_reg==0)
+        {
+            errors[0]=1;
+            reg[DM_WB.write_reg]=0;
+        }
+        else
+            reg[DM_WB.write_reg] = DM_WB.ALU_result;
+
+        break;
+    }
+    case 0x09:	///addiu
+    {
+        if(DM_WB.write_reg==0)
+        {
+            errors[0]=1;
+            reg[DM_WB.write_reg]=0;
+        }
+        else
+            reg[DM_WB.write_reg] = DM_WB.ALU_result;
+        break;
+    }
+    case 0x23:	///lw
+    {
+        if(DM_WB.write_reg==0)
+        {
+            errors[0]=1;
+            reg[DM_WB.write_reg]=0;
+        }
+        else
+            reg[DM_WB.write_reg] = DM_WB.data;
+
+        break;
+    }
+    case 0x21:	///lh
+    {
+        if(DM_WB.write_reg==0)
+        {
+            errors[0]=1;
+            reg[DM_WB.write_reg]=0;
+        }
+        else
+            reg[DM_WB.write_reg] = DM_WB.data;
+        break;
+    }
+    case 0x25:	///lhu
+    {
+        if(DM_WB.write_reg==0)
+        {
+            errors[0]=1;
+            reg[DM_WB.write_reg]=0;
+        }
+        else
+            reg[DM_WB.write_reg] = DM_WB.data;
+        break;
+    }
+    case 0x20:	///lb
+    {
+        if(DM_WB.write_reg==0)
+        {
+            errors[0]=1;
+            reg[DM_WB.write_reg]=0;
+        }
+        else
+            reg[DM_WB.write_reg] = DM_WB.data;
+        break;
+    }
+    case 0x24:	///lbu
+    {
+        if(DM_WB.write_reg==0)
+        {
+            errors[0]=1;
+            reg[DM_WB.write_reg]=0;
+        }
+        else
+            reg[DM_WB.write_reg] = DM_WB.data;
+        break;
+    }
+    case 0x2B:	///sw
+    {
+
+        break;
+    }
+    case 0x29:	///sh
+    {
+
+        break;
+    }
+    case 0x28:	///sb
+    {
+
+        break;
+    }
+    case 0x0F:	///lui
+    {
+
+        if(DM_WB.write_reg==0)
+        {
+            errors[0]=1;
+            reg[DM_WB.write_reg]=0;
+        }
+        else
+            reg[DM_WB.write_reg] = DM_WB.ALU_result;
+        break;
+    }
+    case 0x0C:	///andi
+    {
+        if(DM_WB.write_reg==0)
+        {
+            errors[0]=1;
+            reg[DM_WB.write_reg]=0;
+        }
+        else
+            reg[DM_WB.write_reg] = DM_WB.ALU_result;
+        break;
+    }
+    case 0x0D:	///ori
+    {
+        if(DM_WB.write_reg==0)
+        {
+            errors[0]=1;
+            reg[DM_WB.write_reg]=0;
+        }
+        else
+            reg[DM_WB.write_reg] = DM_WB.ALU_result;
+        break;
+    }
+    case 0x0E:	///nori
+    {
+        if(DM_WB.write_reg==0)
+        {
+            errors[0]=1;
+            reg[DM_WB.write_reg]=0;
+        }
+        else
+            reg[DM_WB.write_reg] = DM_WB.ALU_result;
+        break;
+    }
+    case 0x0A:	///slti
+    {
+
+        if(DM_WB.write_reg==0)
+        {
+            errors[0]=1;
+            reg[DM_WB.write_reg]=0;
+        }
+        else
+            reg[DM_WB.write_reg] = DM_WB.ALU_result;
+        break;
+    }
+    case 0x04:	///beq
+    {
+
+        break;
+    }
+    case 0x05:	///bne
+    {
+
+        break;
+    }
+    case 0x07:	///bgtz
+    {
+
+        break;
+    }
+    case 0x02:	///j
+    {
+
+        break;
+    }
+    case 0x03:	///jal
+    {
+        if(DM_WB.write_reg==0)
+        {
+            errors[0]=1;
+            reg[DM_WB.write_reg]=0;
+        }
+        else
+            reg[DM_WB.write_reg]=DM_WB.ALU_result;
+        break;
+    }
+    case 0x3F:	///halt
+    {
+
+        flag=1;
+        break;
+    }
+
+
+    }
+
+    if(flag==1) return 1;
+    else return 0;
+}
+
+int DM()
+{
+
+    show_DMi = EX_DM.instruction;
+    unsigned char *getting;
+    int flag=0;
+    int flags=0;
+    DM_WB.can_forward = EX_DM.can_forward;
+    if(EX_DM.instruction==0)
+    {
+        DM_WB.instruction=EX_DM.instruction;
+        DM_WB.ALU_result=0;
+        DM_WB.can_forward=0;
+        DM_WB.data=0;
+        DM_WB.instruction=0;
+        DM_WB.write_reg=0;
+        return 0;
+    }
+
+    op=(unsigned)EX_DM.instruction>>26;
+
+
+    switch(op)
+    {
+    case 0x00:
+    {
+        funct=cut_func(EX_DM.instruction);
+
+        switch(funct)
+        {
+        case 0x20:	///add
+        {
+            DM_WB.instruction = EX_DM.instruction;
+            DM_WB.ALU_result = EX_DM.ALU_result;
+            DM_WB.write_reg = EX_DM.write_reg;
+            DM_WB.data = 0;
+            break;
+        }
+        case 0x21:	///addu
+        {
+            DM_WB.instruction = EX_DM.instruction;
+            DM_WB.ALU_result = EX_DM.ALU_result;
+            DM_WB.write_reg = EX_DM.write_reg;
+            DM_WB.data = 0;
+            break;
+        }
+        case 0x22:	///sub
+        {
+            DM_WB.instruction = EX_DM.instruction;
+            DM_WB.ALU_result = EX_DM.ALU_result;
+            DM_WB.write_reg = EX_DM.write_reg;
+            DM_WB.data = 0;
+            break;
+        }
+        case 0x24:	///and
+        {
+            DM_WB.instruction = EX_DM.instruction;
+            DM_WB.ALU_result = EX_DM.ALU_result;
+            DM_WB.write_reg = EX_DM.write_reg;
+            DM_WB.data = 0;
+            break;
+        }
+        case 0x25:	///or
+        {
+            DM_WB.instruction = EX_DM.instruction;
+            DM_WB.ALU_result = EX_DM.ALU_result;
+            DM_WB.write_reg = EX_DM.write_reg;
+            DM_WB.data = 0;
+            break;
+        }
+        case 0x26:	///xor
+        {
+            DM_WB.instruction = EX_DM.instruction;
+            DM_WB.ALU_result = EX_DM.ALU_result;
+            DM_WB.write_reg = EX_DM.write_reg;
+            DM_WB.data = 0;
+            break;
+        }
+        case 0x27:	///nor
+        {
+            DM_WB.instruction = EX_DM.instruction;
+            DM_WB.ALU_result = EX_DM.ALU_result;
+            DM_WB.write_reg = EX_DM.write_reg;
+            DM_WB.data = 0;
+            break;
+        }
+        case 0x28:	///nand
+        {
+            DM_WB.instruction = EX_DM.instruction;
+            DM_WB.ALU_result = EX_DM.ALU_result;
+            DM_WB.write_reg = EX_DM.write_reg;
+            DM_WB.data = 0;
+            break;
+        }
+        case 0x2A:	///slt
+        {
+            DM_WB.instruction = EX_DM.instruction;
+            DM_WB.ALU_result = EX_DM.ALU_result;
+            DM_WB.write_reg = EX_DM.write_reg;
+            DM_WB.data = 0;
+            break;
+        }
+        case 0x00:	///sll
+        {
+            DM_WB.instruction = EX_DM.instruction;
+            DM_WB.ALU_result = EX_DM.ALU_result;
+            DM_WB.write_reg = EX_DM.write_reg;
+            DM_WB.data = 0;
+            break;
+        }
+        case 0x02:	///srl
+        {
+            DM_WB.instruction = EX_DM.instruction;
+            DM_WB.ALU_result = EX_DM.ALU_result;
+            DM_WB.write_reg = EX_DM.write_reg;
+            DM_WB.data = 0;
+            break;
+        }
+        case 0x03:	///sra
+        {
+            DM_WB.instruction = EX_DM.instruction;
+            DM_WB.ALU_result = EX_DM.ALU_result;
+            DM_WB.write_reg = EX_DM.write_reg;
+            DM_WB.data = 0;
+            break;
+        }
+        case 0x08:	///jr
+        {
+            DM_WB.instruction = EX_DM.instruction;
+            DM_WB.ALU_result = 0;
+            DM_WB.write_reg = EX_DM.write_reg;
+            DM_WB.data = 0;
+            break;
+        }
+
+        }
+        break;
+    }
+    case 0x08:	///addi
+    {
+        DM_WB.instruction = EX_DM.instruction;
+        DM_WB.ALU_result = EX_DM.ALU_result;
+        DM_WB.write_reg = EX_DM.write_reg;
+        DM_WB.data = 0;
+        break;
+    }
+    case 0x09:	///addiu
+    {
+        DM_WB.instruction = EX_DM.instruction;
+        DM_WB.ALU_result = EX_DM.ALU_result;
+        DM_WB.write_reg = EX_DM.write_reg;
+        DM_WB.data = 0;
+        break;
+    }
+    case 0x23:	///lw
+    {
+        DM_WB.instruction = EX_DM.instruction;
+        DM_WB.ALU_result = 0;
+        DM_WB.write_reg = EX_DM.write_reg;
+        if(EX_DM.ALU_result>=1021||EX_DM.ALU_result<0)
+        {
+            errors[1]=1;
+            flags=1;
+        }
+        if(EX_DM.ALU_result%4!=0)
+        {
+            errors[2]=1;
+            flags=1;
+        }
+        if(flags==1)
+            break;
+        DM_WB.data = (int)combine(dim[EX_DM.ALU_result],dim[EX_DM.ALU_result+1],dim[EX_DM.ALU_result+2],dim[EX_DM.ALU_result+3]);
+        break;
+    }
+    case 0x21:	///lh
+    {
+        DM_WB.instruction = EX_DM.instruction;
+        DM_WB.ALU_result = 0;
+        DM_WB.write_reg = EX_DM.write_reg;
+        if(EX_DM.ALU_result>=1023||EX_DM.ALU_result<0)
+        {
+            errors[1]=1;
+            flags=1;
+        }
+        if(EX_DM.ALU_result%2!=0)
+        {
+            errors[2]=1;
+            flags=1;
+        }
+        if(flags==1)
+            break;
+        DM_WB.data = (short)combine_two(dim[EX_DM.ALU_result],dim[EX_DM.ALU_result+1]);
+        break;
+    }
+    case 0x25:	///lhu
+    {
+        DM_WB.instruction = EX_DM.instruction;
+        DM_WB.ALU_result = 0;
+        DM_WB.write_reg = EX_DM.write_reg;
+        if(EX_DM.ALU_result>=1023||EX_DM.ALU_result<0)
+        {
+            errors[1]=1;
+            flags=1;
+        }
+        if(EX_DM.ALU_result%2!=0)
+        {
+            errors[2]=1;
+            flags=1;
+        }
+        if(flags==1)
+            break;
+        DM_WB.data = (unsigned)combine_two(dim[EX_DM.ALU_result],dim[EX_DM.ALU_result+1]);
+        break;
+    }
+    case 0x20:	///lb
+    {
+        DM_WB.instruction = EX_DM.instruction;
+        DM_WB.ALU_result = 0;
+        DM_WB.write_reg = EX_DM.write_reg;
+        if(EX_DM.ALU_result>=1024||EX_DM.ALU_result<0)
+        {
+            errors[1]=1;
+            flags=1;
+        }
+        if(flags==1)
+            break;
+        DM_WB.data = (char)dim[EX_DM.ALU_result];
+        break;
+    }
+    case 0x24:	///lbu
+    {
+        DM_WB.instruction = EX_DM.instruction;
+        DM_WB.ALU_result = 0;
+        DM_WB.write_reg = EX_DM.write_reg;
+        if(EX_DM.ALU_result>=1024||EX_DM.ALU_result<0)
+        {
+            errors[1]=1;
+            flags=1;
+        }
+        if(flags==1)
+            break;
+        DM_WB.data = (unsigned)dim[EX_DM.ALU_result];
+        break;
+    }
+    case 0x2B:	///sw
+    {
+        DM_WB.instruction = EX_DM.instruction;
+        DM_WB.ALU_result = 0;
+        DM_WB.write_reg = EX_DM.write_reg;
+        getting = seperate(EX_DM.read_data2);
+        if(EX_DM.ALU_result>=1021||EX_DM.ALU_result<0)
+        {
+            errors[1]=1;
+            flags=1;
+        }
+        if(EX_DM.ALU_result%4!=0)
+        {
+            errors[2]=1;
+            flags=1;
+        }
+        if(flags==1)
+            break;
+        dim[EX_DM.ALU_result]=getting[0];
+        dim[EX_DM.ALU_result+1]=getting[1];
+        dim[EX_DM.ALU_result+2]=getting[2];
+        dim[EX_DM.ALU_result+3]=getting[3];
+        DM_WB.data = 0;
+        break;
+    }
+    case 0x29:	///sh
+    {
+        DM_WB.instruction = EX_DM.instruction;
+        DM_WB.ALU_result = 0;
+        DM_WB.write_reg = EX_DM.write_reg;
+        getting = seperate_two(EX_DM.read_data2);
+        if(EX_DM.ALU_result>=1023||EX_DM.ALU_result<0)
+        {
+            errors[1]=1;
+            flags=1;
+        }
+        if(EX_DM.ALU_result%2!=0)
+        {
+            errors[2]=1;
+            flags=1;
+        }
+        if(flags==1)
+            break;
+        dim[EX_DM.ALU_result]=getting[0];
+        dim[EX_DM.ALU_result+1]=getting[1];
+        DM_WB.data = 0;
+        break;
+    }
+    case 0x28:	///sb
+    {
+        DM_WB.instruction = EX_DM.instruction;
+        DM_WB.ALU_result = 0;
+        DM_WB.write_reg = EX_DM.write_reg;
+        getting = malloc(sizeof(unsigned char));
+        getting[0] = (unsigned char)(EX_DM.read_data2&0x000000FF);
+        if(EX_DM.ALU_result>=1024||EX_DM.ALU_result<0)
+        {
+            errors[1]=1;
+            flags=1;
+        }
+        if(flags==1)
+            break;
+
+        dim[EX_DM.ALU_result]=getting[0];
+        DM_WB.data = 0;
+        break;
+    }
+    case 0x0F:	///lui
+    {
+        DM_WB.instruction = EX_DM.instruction;
+        DM_WB.ALU_result = EX_DM.ALU_result;
+        DM_WB.write_reg = EX_DM.write_reg;
+        DM_WB.data = 0;
+        break;
+    }
+    case 0x0C:	///andi
+    {
+        DM_WB.instruction = EX_DM.instruction;
+        DM_WB.ALU_result = EX_DM.ALU_result;
+        DM_WB.write_reg = EX_DM.write_reg;
+        DM_WB.data = 0;
+        break;
+    }
+    case 0x0D:	///ori
+    {
+        DM_WB.instruction = EX_DM.instruction;
+        DM_WB.ALU_result = EX_DM.ALU_result;
+        DM_WB.write_reg = EX_DM.write_reg;
+        DM_WB.data = 0;
+        break;
+    }
+    case 0x0E:	///nori
+    {
+        DM_WB.instruction = EX_DM.instruction;
+        DM_WB.ALU_result = EX_DM.ALU_result;
+        DM_WB.write_reg = EX_DM.write_reg;
+        DM_WB.data = 0;
+        break;
+    }
+    case 0x0A:	///slti
+    {
+        DM_WB.instruction = EX_DM.instruction;
+        DM_WB.ALU_result = EX_DM.ALU_result;
+        DM_WB.write_reg = EX_DM.write_reg;
+        DM_WB.data = 0;
+        break;
+    }
+    case 0x04:	///beq
+    {
+        DM_WB.instruction = EX_DM.instruction;
+        DM_WB.ALU_result = 0;
+        DM_WB.write_reg = EX_DM.write_reg;
+        DM_WB.data = 0;
+        break;
+    }
+    case 0x05:	///bne
+    {
+        DM_WB.instruction = EX_DM.instruction;
+        DM_WB.ALU_result = 0;
+        DM_WB.write_reg = EX_DM.write_reg;
+        DM_WB.data = 0;
+        break;
+    }
+    case 0x07:	///bgtz
+    {
+        DM_WB.instruction = EX_DM.instruction;
+        DM_WB.ALU_result = 0;
+        DM_WB.write_reg = EX_DM.write_reg;
+        DM_WB.data = 0;
+        break;
+    }
+    case 0x02:	///j
+    {
+        DM_WB.instruction = EX_DM.instruction;
+        DM_WB.ALU_result = 0;
+        DM_WB.write_reg = EX_DM.write_reg;
+        DM_WB.data = 0;
+        break;
+    }
+    case 0x03:	///jal
+    {
+        DM_WB.instruction = EX_DM.instruction;
+        DM_WB.ALU_result = EX_DM.ALU_result;
+        DM_WB.write_reg = EX_DM.write_reg;
+        DM_WB.data = 0;
+        break;
+    }
+    case 0x3F:	///halt
+    {
+        DM_WB.instruction = EX_DM.instruction;
+        flag=1;
+        break;
+    }
+
+
+    }
+    if(flags==1)return 2;
+    else
+    {
+        if(flag==1)return 1;
+        else return 0;
+    }
+
+}
+
+int EX()
+{
+
+    show_EXi = ID_EX.instruction;
+    int temp=0;
+    int flag=0;
+    EX_DM.forward[0] = ID_EX.forward[0];
+    EX_DM.forward[1] = ID_EX.forward[1];
+    EX_DM.forward[2] = ID_EX.forward[2];
+    EX_DM.ALU_result=0;
+
+    if(ID_EX.instruction==0)
+    {
+        EX_DM.instruction=ID_EX.instruction;
+        EX_DM.ALU_result==0;
+        EX_DM.read_data2=0;
+        EX_DM.write_reg=0;
+        EX_DM.can_forward=0;
+        EX_DM.instruction=0;
+        return 0;
+    }
+
+
+
+
+    op=(unsigned)ID_EX.instruction>>26;
+
+
+
+
+    switch(op)
+    {
+    case 0x00:
+    {
+        funct=cut_func(ID_EX.instruction);
+
+        switch(funct)
+        {
+        case 0x20:	///add
+        {
+
+
+            EX_DM.instruction=ID_EX.instruction;
+            temp=ID_EX.read_data1+ID_EX.read_data2;
+            if(overflow_detect(temp,ID_EX.read_data1,ID_EX.read_data2))
+                errors[3]=1;
+            EX_DM.can_forward=1;
+
+            EX_DM.ALU_result=temp;
+            EX_DM.write_reg=ID_EX.write_reg;
+            break;
+        }
+        case 0x21:	///addu
+        {
+
+            EX_DM.instruction=ID_EX.instruction;
+            temp=ID_EX.read_data1+ID_EX.read_data2;
+            EX_DM.can_forward=1;
+
+            EX_DM.ALU_result=temp;
+            EX_DM.write_reg=ID_EX.write_reg;
+            break;
+        }
+        case 0x22:	///sub
+        {
+
+            EX_DM.instruction=ID_EX.instruction;
+            temp=ID_EX.read_data1+(-1)*ID_EX.read_data2;
+            if(overflow_detect(temp,ID_EX.read_data1,(-1)*ID_EX.read_data2))
+                errors[3]=1;
+            EX_DM.can_forward=1;
+
+            EX_DM.ALU_result=temp;
+            EX_DM.write_reg=ID_EX.write_reg;
+            break;
+        }
+        case 0x24:	///and
+        {
+            EX_DM.instruction=ID_EX.instruction;
+            temp=ID_EX.read_data1&ID_EX.read_data2;
+            EX_DM.can_forward=1;
+
+            EX_DM.ALU_result=temp;
+            EX_DM.write_reg=ID_EX.write_reg;
+            break;
+        }
+        case 0x25:	///or
+        {
+            EX_DM.instruction=ID_EX.instruction;
+            temp=ID_EX.read_data1|ID_EX.read_data2;
+            EX_DM.can_forward=1;
+
+            EX_DM.ALU_result=temp;
+            EX_DM.write_reg=ID_EX.write_reg;
+            break;
+        }
+        case 0x26:	///xor
+        {
+            EX_DM.instruction=ID_EX.instruction;
+            temp=ID_EX.read_data1^ID_EX.read_data2;
+            EX_DM.can_forward=1;
+
+            EX_DM.ALU_result=temp;
+            EX_DM.write_reg=ID_EX.write_reg;
+            break;
+        }
+        case 0x27:	///nor
+        {
+            EX_DM.instruction=ID_EX.instruction;
+            temp=~(ID_EX.read_data1|ID_EX.read_data2);
+            EX_DM.can_forward=1;
+
+            EX_DM.ALU_result=temp;
+            EX_DM.write_reg = ID_EX.write_reg;
+            break;
+        }
+        case 0x28:	///nand
+        {
+            EX_DM.instruction=ID_EX.instruction;
+            temp=~(ID_EX.read_data1&ID_EX.read_data2);
+            EX_DM.can_forward=1;
+
+            EX_DM.ALU_result=temp;
+            EX_DM.write_reg=ID_EX.write_reg;
+            break;
+        }
+        case 0x2A:	///slt
+        {
+            EX_DM.instruction=ID_EX.instruction;
+            if(ID_EX.read_data1<ID_EX.read_data2)
+                temp=1;
+            else temp=0;
+            EX_DM.can_forward=1;
+
+            EX_DM.ALU_result=temp;
+            EX_DM.write_reg=ID_EX.write_reg;
+            break;
+        }
+        case 0x00:	///sll
+        {
+            EX_DM.instruction=ID_EX.instruction;
+            temp=ID_EX.read_data1<<ID_EX.immediate_ext;
+            EX_DM.can_forward=1;
+
+            EX_DM.ALU_result=temp;
+            EX_DM.write_reg=ID_EX.write_reg;
+            break;
+        }
+        case 0x02:	///srl
+        {
+            EX_DM.instruction=ID_EX.instruction;
+            temp=(unsigned)ID_EX.read_data1>>ID_EX.immediate_ext;
+            EX_DM.can_forward=1;
+
+            EX_DM.ALU_result=temp;
+            EX_DM.write_reg=ID_EX.write_reg;
+            break;
+        }
+        case 0x03:	///sra
+        {
+            EX_DM.instruction=ID_EX.instruction;
+            temp=ID_EX.read_data1>>ID_EX.immediate_ext;
+            EX_DM.can_forward=1;
+
+            EX_DM.ALU_result=temp;
+            EX_DM.write_reg=ID_EX.write_reg;
+            break;
+        }
+        case 0x08:	///jr
+        {
+            EX_DM.instruction=ID_EX.instruction;
+            EX_DM.can_forward=2;
+            break;
+        }
+
+        }
+        break;
+    }
+    case 0x08:	///addi
+    {
+
+        EX_DM.instruction=ID_EX.instruction;
+        temp=ID_EX.read_data1+ID_EX.immediate_ext;
+        if(overflow_detect(temp,ID_EX.read_data1,ID_EX.immediate_ext))
+            errors[3]=1;
+        EX_DM.can_forward=1;
+
+        EX_DM.ALU_result=temp;
+        EX_DM.write_reg=ID_EX.write_reg;
+        break;
+    }
+    case 0x09:	///addiu
+    {
+        EX_DM.instruction=ID_EX.instruction;
+        temp=ID_EX.read_data1+ID_EX.immediate_ext;
+        EX_DM.can_forward=1;
+
+        EX_DM.ALU_result=temp;
+        EX_DM.write_reg=ID_EX.write_reg;
+        break;
+    }
+    case 0x23:	///lw
+    {
+
+        EX_DM.instruction=ID_EX.instruction;
+        temp=ID_EX.read_data1+ID_EX.immediate_ext;
+        if(overflow_detect(temp,ID_EX.read_data1,ID_EX.immediate_ext))
+            errors[3]=1;
+
+        EX_DM.can_forward=0;
+
+        EX_DM.ALU_result=temp;
+        EX_DM.write_reg=ID_EX.write_reg;
+        break;
+    }
+    case 0x21:	///lh
+    {
+
+        EX_DM.instruction=ID_EX.instruction;
+        temp=ID_EX.read_data1+ID_EX.immediate_ext;
+        if(overflow_detect(temp,ID_EX.read_data1,ID_EX.immediate_ext))
+            errors[3]=1;
+
+        EX_DM.can_forward=0;
+
+        EX_DM.ALU_result=temp;
+        EX_DM.write_reg=ID_EX.write_reg;
+        break;
+    }
+    case 0x25:	///lhu
+    {
+
+        EX_DM.instruction=ID_EX.instruction;
+        temp=ID_EX.read_data1+ID_EX.immediate_ext;
+        if(overflow_detect(temp,ID_EX.read_data1,ID_EX.immediate_ext))
+            errors[3]=1;
+
+        EX_DM.can_forward=0;
+
+        EX_DM.ALU_result=temp;
+        EX_DM.write_reg=ID_EX.write_reg;
+        break;
+        break;
+    }
+    case 0x20:	///lb
+    {
+
+        EX_DM.instruction=ID_EX.instruction;
+        temp=ID_EX.read_data1+ID_EX.immediate_ext;
+        if(overflow_detect(temp,ID_EX.read_data1,ID_EX.immediate_ext))
+            errors[3]=1;
+
+        EX_DM.can_forward=0;
+
+        EX_DM.ALU_result=temp;
+        EX_DM.write_reg=ID_EX.write_reg;
+        break;
+        break;
+    }
+    case 0x24:	///lbu
+    {
+
+        EX_DM.instruction=ID_EX.instruction;
+        temp=ID_EX.read_data1+ID_EX.immediate_ext;
+        if(overflow_detect(temp,ID_EX.read_data1,ID_EX.immediate_ext))
+            errors[3]=1;
+
+        EX_DM.can_forward=0;
+
+        EX_DM.ALU_result=temp;
+        EX_DM.write_reg=ID_EX.write_reg;
+        break;
+        break;
+    }
+    case 0x2B:	///sw
+    {
+        EX_DM.instruction=ID_EX.instruction;
+        temp=ID_EX.read_data1+ID_EX.immediate_ext;
+        if(overflow_detect(temp,ID_EX.read_data1,ID_EX.immediate_ext))
+            errors[3]=1;
+
+        EX_DM.can_forward=0;
+        EX_DM.ALU_result=temp;
+        EX_DM.read_data2=ID_EX.read_data2;
+        EX_DM.write_reg=0;
+        break;
+    }
+    case 0x29:	///sh
+    {
+        EX_DM.instruction=ID_EX.instruction;
+        temp=ID_EX.read_data1+ID_EX.immediate_ext;
+        if(overflow_detect(temp,ID_EX.read_data1,ID_EX.immediate_ext))
+            errors[3]=1;
+
+        EX_DM.can_forward=0;
+        EX_DM.ALU_result=temp;
+        EX_DM.read_data2=ID_EX.read_data2;
+        EX_DM.write_reg=0;
+        break;
+    }
+    case 0x28:	///sb
+    {
+        EX_DM.instruction=ID_EX.instruction;
+        temp=ID_EX.read_data1+ID_EX.immediate_ext;
+        if(overflow_detect(temp,ID_EX.read_data1,ID_EX.immediate_ext))
+            errors[3]=1;
+
+        EX_DM.can_forward=0;
+        EX_DM.ALU_result=temp;
+        EX_DM.read_data2=ID_EX.read_data2;
+        EX_DM.write_reg=0;
+        break;
+    }
+    case 0x0F:	///lui
+    {
+
+        EX_DM.instruction=ID_EX.instruction;
+
+        temp=ID_EX.immediate_ext<<16;
+        EX_DM.can_forward=1;
+        EX_DM.ALU_result=temp;
+        EX_DM.write_reg=ID_EX.write_reg;
+        break;
+    }
+    case 0x0C:	///andi
+    {
+
+        EX_DM.instruction=ID_EX.instruction;
+        temp=ID_EX.read_data1&ID_EX.immediate_ext;
+        EX_DM.can_forward=1;
+        EX_DM.ALU_result=temp;
+        EX_DM.write_reg=ID_EX.write_reg;
+        break;
+    }
+    case 0x0D:	///ori
+    {
+
+        EX_DM.instruction=ID_EX.instruction;
+        temp=ID_EX.read_data1|ID_EX.immediate_ext;
+        EX_DM.can_forward=1;
+        EX_DM.ALU_result=temp;
+        EX_DM.write_reg=ID_EX.write_reg;
+        break;
+    }
+    case 0x0E:	///nori
+    {
+
+        EX_DM.instruction=ID_EX.instruction;
+        temp=~(ID_EX.read_data1|ID_EX.immediate_ext);
+        EX_DM.can_forward=1;
+        EX_DM.ALU_result=temp;
+        EX_DM.write_reg=ID_EX.write_reg;
+        break;
+    }
+    case 0x0A:	///slti
+    {
+        EX_DM.instruction=ID_EX.instruction;
+        if(ID_EX.read_data1<ID_EX.immediate_ext)
+            temp =1;
+        else temp=0;
+        EX_DM.can_forward=1;
+        EX_DM.ALU_result=temp;
+        EX_DM.write_reg=ID_EX.write_reg;
+        break;
+    }
+    case 0x04:	///beq
+    {
+        EX_DM.can_forward=2;
+        EX_DM.instruction=ID_EX.instruction;
+        break;
+    }
+    case 0x05:	///bne
+    {
+        EX_DM.can_forward=2;
+        EX_DM.instruction=ID_EX.instruction;
+        break;
+    }
+    case 0x07:	///bgtz
+    {
+        EX_DM.can_forward=2;
+        EX_DM.instruction=ID_EX.instruction;
+        break;
+    }
+    case 0x02:	///j
+    {
+        EX_DM.can_forward=2;
+        EX_DM.instruction=ID_EX.instruction;
+        break;
+    }
+    case 0x03:	///jal
+    {
+        EX_DM.can_forward=1;
+        EX_DM.instruction=ID_EX.instruction;
+        EX_DM.ALU_result=ID_EX.immediate_ext;
+        EX_DM.write_reg=ID_EX.write_reg;
+        break;
+    }
+    case 0x3F:	///halt
+    {
+        EX_DM.can_forward=0;
+        EX_DM.instruction=ID_EX.instruction;
+        //  printf("halt\n");
+        flag=1;
+        break;
+    }
+
+
+    }
+
+
+
+    if(flag==1) return 1;
+    else return 0;
+
+
+
+}
+
+int ID()
+{
+
+    unsigned char rs=0;
+    unsigned char rt=0;
+    unsigned char rd=0;
+    unsigned char shamt=0;
+
+    show_IDi = IF_ID.instruction;
+    int flag=0;
+    op=(unsigned)IF_ID.instruction>>26;
+    shamt = cut_shamt(IF_ID.instruction);
+    rt = cut_rt(IF_ID.instruction);
+    rd = cut_rd(IF_ID.instruction);
+
+
+    short immediate=0;
+    unsigned short unsigned_immediate=0;
+    unsigned int address=0;
+    ID_EX.forward[0] = 0;
+    ID_EX.forward[1] = 0;
+    ID_EX.forward[2] = 0;
+    ID_EX.stall = 0;
+
+    if(IF_ID.instruction==0)
+    {
+        ID_EX.instruction=IF_ID.instruction;
+        ID_EX.immediate_ext=0;
+        ID_EX.read_data1=0;
+        ID_EX.read_data2=0;
+        ID_EX.write_reg = 0;
+        ID_EX.instruction = 0;
+        return 0;
+    }
+
+
+
+
+    switch(op)
+    {
+    case 0x00:
+    {
+        funct=cut_func(IF_ID.instruction);
+
+        switch(funct)
+        {
+        case 0x20:	///add
+        {
+            rs = cut_rs(IF_ID.instruction);
+            rt = cut_rt(IF_ID.instruction);
+            rd = cut_rd(IF_ID.instruction);
+            ID_EX.immediate_ext = 0;
+            ID_EX.instruction = IF_ID.instruction;
+
+            if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+                if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+                {
+                    ID_EX.stall=1;
+                    ID_EX.instruction=0;
+
+                    break;
+                }
+            if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+                if(((rt==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rt==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rt!=0)
+                {
+                    ID_EX.stall=1;
+                    ID_EX.instruction=0;
+
+                    break;
+                }
+
+            if(rs==rt&&rs==EX_DM.write_reg&&EX_DM.can_forward==1&&rs!=0)
+            {
+                ID_EX.read_data1 =EX_DM.ALU_result;
+                ID_EX.read_data2 = EX_DM.ALU_result;
+                ID_EX.forward[0]=3;
+                ID_EX.forward[1]=rs;
+                ID_EX.forward[2] = 0;
+            }
+            else
+            {
+                if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+                {
+                    ID_EX.read_data1 = EX_DM.ALU_result;
+                    ID_EX.forward[0] = 1;
+                    ID_EX.forward[1] = rs;
+                    ID_EX.forward[2] = 0;
+
+                }
+                else
+                    ID_EX.read_data1 = reg[rs];
+                if(rt==EX_DM.write_reg && EX_DM.can_forward==1&&rt!=0)
+                {
+                    ID_EX.read_data2 = EX_DM.ALU_result;
+                    ID_EX.forward[0] = 2;
+                    ID_EX.forward[1] = rt;
+                    ID_EX.forward[2] = 0;
+                }
+                else
+                    ID_EX.read_data2 = reg[rt];
+            }
+            ID_EX.write_reg = rd;
+
+            break;
+        }
+        case 0x21:	///addu
+        {
+            rs = cut_rs(IF_ID.instruction);
+            rt = cut_rt(IF_ID.instruction);
+            rd = cut_rd(IF_ID.instruction);
+            ID_EX.immediate_ext = 0;
+            ID_EX.instruction = IF_ID.instruction;
+            if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+                if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+                {
+                    ID_EX.stall=1;
+                    ID_EX.instruction=0;
+
+                    break;
+                }
+            if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+                if(((rt==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rt==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rt!=0)
+                {
+                    ID_EX.stall=1;
+                    ID_EX.instruction=0;
+
+                    break;
+                }
+            if(rs==rt&&rs==EX_DM.write_reg&&EX_DM.can_forward==1&&rs!=0)
+            {
+                ID_EX.read_data1 =EX_DM.ALU_result;
+                ID_EX.read_data2 = EX_DM.ALU_result;
+                ID_EX.forward[0]=3;
+                ID_EX.forward[1]=rs;
+                ID_EX.forward[2] = 0;
+            }
+            else
+            {
+                if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+                {
+                    ID_EX.read_data1 = EX_DM.ALU_result;
+                    ID_EX.forward[0] = 1;
+                    ID_EX.forward[1] = rs;
+                    ID_EX.forward[2] = 0;
+                }
+                else
+                    ID_EX.read_data1 = reg[rs];
+                if(rt==EX_DM.write_reg && EX_DM.can_forward==1&&rt!=0)
+                {
+                    ID_EX.read_data2 = EX_DM.ALU_result;
+                    ID_EX.forward[0] = 2;
+                    ID_EX.forward[1] = rt;
+                    ID_EX.forward[2] = 0;
+                }
+                else
+                    ID_EX.read_data2 = reg[rt];
+            }
+            ID_EX.write_reg = rd;
+            break;
+        }
+        case 0x22:	///sub
+        {
+            rs = cut_rs(IF_ID.instruction);
+            rt = cut_rt(IF_ID.instruction);
+            rd = cut_rd(IF_ID.instruction);
+            ID_EX.immediate_ext = 0;
+            ID_EX.instruction = IF_ID.instruction;
+            if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+                if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+                {
+                    ID_EX.stall=1;
+                    ID_EX.instruction=0;
+
+                    break;
+                }
+            if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+                if(((rt==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rt==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rt!=0)
+                {
+                    ID_EX.stall=1;
+                    ID_EX.instruction=0;
+
+                    break;
+                }
+            if(rs==rt&&rs==EX_DM.write_reg&&EX_DM.can_forward==1&&rs!=0)
+            {
+                ID_EX.read_data1 =EX_DM.ALU_result;
+                ID_EX.read_data2 = EX_DM.ALU_result;
+                ID_EX.forward[0]=3;
+                ID_EX.forward[1]=rs;
+                ID_EX.forward[2] = 0;
+            }
+            else
+            {
+                if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+                {
+                    ID_EX.read_data1 = EX_DM.ALU_result;
+                    ID_EX.forward[0] = 1;
+                    ID_EX.forward[1] = rs;
+                    ID_EX.forward[2] = 0;
+                }
+                else
+                    ID_EX.read_data1 = reg[rs];
+                if(rt==EX_DM.write_reg && EX_DM.can_forward==1&&rt!=0)
+                {
+                    ID_EX.read_data2 = EX_DM.ALU_result;
+                    ID_EX.forward[0] = 2;
+                    ID_EX.forward[1] = rt;
+                    ID_EX.forward[2] = 0;
+                }
+                else
+                    ID_EX.read_data2 = reg[rt];
+            }
+            ID_EX.write_reg = rd;
+            break;
+        }
+        case 0x24:	///and
+        {
+            rs = cut_rs(IF_ID.instruction);
+            rt = cut_rt(IF_ID.instruction);
+            rd = cut_rd(IF_ID.instruction);
+            ID_EX.immediate_ext = 0;
+            ID_EX.instruction = IF_ID.instruction;
+            if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+                if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+                {
+                    ID_EX.stall=1;
+                    ID_EX.instruction=0;
+
+                    break;
+                }
+            if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+                if(((rt==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rt==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rt!=0)
+                {
+                    ID_EX.stall=1;
+                    ID_EX.instruction=0;
+
+                    break;
+                }
+            if(rs==rt&&rs==EX_DM.write_reg&&EX_DM.can_forward==1&&rs!=0)
+            {
+                ID_EX.read_data1 =EX_DM.ALU_result;
+                ID_EX.read_data2 = EX_DM.ALU_result;
+                ID_EX.forward[0]=3;
+                ID_EX.forward[1]=rs;
+                ID_EX.forward[2] = 0;
+            }
+            else
+            {
+                if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+                {
+                    ID_EX.read_data1 = EX_DM.ALU_result;
+                    ID_EX.forward[0] = 1;
+                    ID_EX.forward[1] = rs;
+                    ID_EX.forward[2] = 0;
+                }
+                else
+                    ID_EX.read_data1 = reg[rs];
+                if(rt==EX_DM.write_reg && EX_DM.can_forward==1&&rt!=0)
+                {
+                    ID_EX.read_data2 = EX_DM.ALU_result;
+                    ID_EX.forward[0] = 2;
+                    ID_EX.forward[1] = rt;
+                    ID_EX.forward[2] = 0;
+                }
+                else
+                    ID_EX.read_data2 = reg[rt];
+            }
+            ID_EX.write_reg = rd;
+            break;
+        }
+        case 0x25:	///or
+        {
+            rs = cut_rs(IF_ID.instruction);
+            rt = cut_rt(IF_ID.instruction);
+            rd = cut_rd(IF_ID.instruction);
+            ID_EX.immediate_ext = 0;
+            ID_EX.instruction = IF_ID.instruction;
+            if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+                if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+                {
+                    ID_EX.stall=1;
+                    ID_EX.instruction=0;
+
+                    break;
+                }
+            if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+                if(((rt==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rt==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rt!=0)
+                {
+                    ID_EX.stall=1;
+                    ID_EX.instruction=0;
+
+                    break;
+                }
+
+
+            if(rs==rt&&rs==EX_DM.write_reg&&EX_DM.can_forward==1&&rs!=0)
+            {
+                ID_EX.read_data1 =EX_DM.ALU_result;
+                ID_EX.read_data2 = EX_DM.ALU_result;
+                ID_EX.forward[0]=3;
+                ID_EX.forward[1]=rs;
+                ID_EX.forward[2] = 0;
+            }
+            else
+            {
+                if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+                {
+                    ID_EX.read_data1 = EX_DM.ALU_result;
+                    ID_EX.forward[0] = 1;
+                    ID_EX.forward[1] = rs;
+                }
+                else
+                    ID_EX.read_data1 = reg[rs];
+                if(rt==EX_DM.write_reg && EX_DM.can_forward==1&&rt!=0)
+                {
+                    ID_EX.read_data2 = EX_DM.ALU_result;
+                    ID_EX.forward[0] = 2;
+                    ID_EX.forward[1] = rt;
+                    ID_EX.forward[2] = 0;
+                }
+                else
+                    ID_EX.read_data2 = reg[rt];
+            }
+            ID_EX.write_reg = rd;
+            break;
+        }
+        case 0x26:	///xor
+        {
+            rs = cut_rs(IF_ID.instruction);
+            rt = cut_rt(IF_ID.instruction);
+            rd = cut_rd(IF_ID.instruction);
+            ID_EX.immediate_ext = 0;
+            ID_EX.instruction = IF_ID.instruction;
+            if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+                if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+                {
+                    ID_EX.stall=1;
+                    ID_EX.instruction=0;
+
+                    break;
+                }
+            if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+                if(((rt==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rt==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rt!=0)
+                {
+                    ID_EX.stall=1;
+                    ID_EX.instruction=0;
+
+                    break;
+                }
+            if(rs==rt&&rs==EX_DM.write_reg&&EX_DM.can_forward==1&&rs!=0)
+            {
+                ID_EX.read_data1 =EX_DM.ALU_result;
+                ID_EX.read_data2 = EX_DM.ALU_result;
+                ID_EX.forward[0]=3;
+                ID_EX.forward[1]=rs;
+                ID_EX.forward[2] = 0;
+            }
+            else
+            {
+                if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+                {
+                    ID_EX.read_data1 = EX_DM.ALU_result;
+                    ID_EX.forward[0] = 1;
+                    ID_EX.forward[1] = rs;
+                    ID_EX.forward[2] = 0;
+                }
+                else
+                    ID_EX.read_data1 = reg[rs];
+                if(rt==EX_DM.write_reg && EX_DM.can_forward==1&&rt!=0)
+                {
+                    ID_EX.read_data2 = EX_DM.ALU_result;
+                    ID_EX.forward[0] = 2;
+                    ID_EX.forward[1] = rt;
+                    ID_EX.forward[2] = 0;
+                }
+                else
+                    ID_EX.read_data2 = reg[rt];
+            }
+            ID_EX.write_reg = rd;
+            break;
+        }
+        case 0x27:	///nor
+        {
+            rs = cut_rs(IF_ID.instruction);
+            rt = cut_rt(IF_ID.instruction);
+            rd = cut_rd(IF_ID.instruction);
+            ID_EX.immediate_ext = 0;
+            ID_EX.instruction = IF_ID.instruction;
+            if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+                if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+                {
+                    ID_EX.stall=1;
+                    ID_EX.instruction=0;
+
+                    break;
+                }
+            if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+                if(((rt==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rt==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rt!=0)
+                {
+                    ID_EX.stall=1;
+                    ID_EX.instruction=0;
+
+                    break;
+                }
+            if(rs==rt&&rs==EX_DM.write_reg&&EX_DM.can_forward==1&&rs!=0)
+            {
+                ID_EX.read_data1 =EX_DM.ALU_result;
+                ID_EX.read_data2 = EX_DM.ALU_result;
+                ID_EX.forward[0]=3;
+                ID_EX.forward[1]=rs;
+                ID_EX.forward[2] = 0;
+            }
+            else
+            {
+                if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+                {
+                    ID_EX.read_data1 = EX_DM.ALU_result;
+                    ID_EX.forward[0] = 1;
+                    ID_EX.forward[1] = rs;
+                    ID_EX.forward[2] = 0;
+                }
+                else
+                    ID_EX.read_data1 = reg[rs];
+                if(rt==EX_DM.write_reg && EX_DM.can_forward==1&&rt!=0)
+                {
+                    ID_EX.read_data2 = EX_DM.ALU_result;
+                    ID_EX.forward[0] = 2;
+                    ID_EX.forward[1] = rt;
+                    ID_EX.forward[2] = 0;
+                }
+                else
+                    ID_EX.read_data2 = reg[rt];
+            }
+
+            ID_EX.write_reg = rd;
+            break;
+        }
+        case 0x28:	///nand
+        {
+            rs = cut_rs(IF_ID.instruction);
+            rt = cut_rt(IF_ID.instruction);
+            rd = cut_rd(IF_ID.instruction);
+            ID_EX.immediate_ext = 0;
+            ID_EX.instruction = IF_ID.instruction;
+            if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+                if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+                {
+                    ID_EX.stall=1;
+                    ID_EX.instruction=0;
+
+                    break;
+                }
+            if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+                if(((rt==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rt==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rt!=0)
+                {
+                    ID_EX.stall=1;
+                    ID_EX.instruction=0;
+
+                    break;
+                }
+            if(rs==rt&&rs==EX_DM.write_reg&&EX_DM.can_forward==1&&rs!=0)
+            {
+                ID_EX.read_data1 =EX_DM.ALU_result;
+                ID_EX.read_data2 = EX_DM.ALU_result;
+                ID_EX.forward[0]=3;
+                ID_EX.forward[1]=rs;
+                ID_EX.forward[2] = 0;
+            }
+            else
+            {
+                if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+                {
+                    ID_EX.read_data1 = EX_DM.ALU_result;
+                    ID_EX.forward[0] = 1;
+                    ID_EX.forward[1] = rs;
+                    ID_EX.forward[2] = 0;
+                }
+                else
+                    ID_EX.read_data1 = reg[rs];
+                if(rt==EX_DM.write_reg && EX_DM.can_forward==1&&rt!=0)
+                {
+                    ID_EX.read_data2 = EX_DM.ALU_result;
+                    ID_EX.forward[0] = 2;
+                    ID_EX.forward[1] = rt;
+                    ID_EX.forward[2] = 0;
+                }
+                else
+                    ID_EX.read_data2 = reg[rt];
+            }
+            ID_EX.write_reg = rd;
+            break;
+        }
+        case 0x2A:	///slt
+        {
+
+            rs = cut_rs(IF_ID.instruction);
+            rt = cut_rt(IF_ID.instruction);
+            rd = cut_rd(IF_ID.instruction);
+
+            ID_EX.immediate_ext = 0;
+            ID_EX.instruction = IF_ID.instruction;
+            if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+                if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+                {
+
+                    ID_EX.stall=1;
+                    ID_EX.instruction=0;
+
+                    break;
+                }
+            if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+                if(((rt==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rt==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rt!=0)
+                {
+                    ID_EX.stall=1;
+                    ID_EX.instruction=0;
+
+                    break;
+                }
+            if(rs==rt&&rs==EX_DM.write_reg&&EX_DM.can_forward==1&&rs!=0)
+            {
+                ID_EX.read_data1 =EX_DM.ALU_result;
+                ID_EX.read_data2 = EX_DM.ALU_result;
+                ID_EX.forward[0]=3;
+                ID_EX.forward[1]=rs;
+                ID_EX.forward[2] = 0;
+            }
+            else
+            {
+                if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+                {
+                    ID_EX.read_data1 = EX_DM.ALU_result;
+                    ID_EX.forward[0] = 1;
+                    ID_EX.forward[1] = rs;
+                    ID_EX.forward[2] = 0;
+                }
+                else
+                    ID_EX.read_data1 = reg[rs];
+                if(rt==EX_DM.write_reg && EX_DM.can_forward==1&&rt!=0)
+                {
+                    ID_EX.read_data2 = EX_DM.ALU_result;
+                    ID_EX.forward[0] = 2;
+                    ID_EX.forward[1] = rt;
+                    ID_EX.forward[2] = 0;
+                }
+                else
+                    ID_EX.read_data2 = reg[rt];
+            }
+            ID_EX.write_reg = rd;
+            break;
+        }
+        case 0x00:	///sll
+        {
+            shamt = cut_shamt(IF_ID.instruction);
+            rt = cut_rt(IF_ID.instruction);
+            rd = cut_rd(IF_ID.instruction);
+            ID_EX.immediate_ext = shamt;
+            ID_EX.instruction = IF_ID.instruction;
+            if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+                if(((rt==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rt==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rt!=0)
+                {
+                    ID_EX.stall=1;
+                    ID_EX.instruction=0;
+
+                    break;
+                }
+            if(rt==EX_DM.write_reg && EX_DM.can_forward==1&&rt!=0)
+            {
+                ID_EX.read_data1 = EX_DM.ALU_result;
+                ID_EX.forward[0] = 2;
+                ID_EX.forward[1] = rt;
+                ID_EX.forward[2] = 0;
+            }
+            else
+                ID_EX.read_data1 = reg[rt];
+            ID_EX.read_data2 = 0;
+            ID_EX.write_reg = rd;
+            break;
+        }
+        case 0x02:	///srl
+        {
+            shamt = cut_shamt(IF_ID.instruction);
+            rt = cut_rt(IF_ID.instruction);
+            rd = cut_rd(IF_ID.instruction);
+            ID_EX.immediate_ext = shamt;
+            ID_EX.instruction = IF_ID.instruction;
+
+            if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+                if(((rt==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rt==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rt!=0)
+                {
+                    ID_EX.stall=1;
+                    ID_EX.instruction=0;
+
+                    break;
+                }
+            if(rt==EX_DM.write_reg && EX_DM.can_forward==1&&rt!=0)
+            {
+                ID_EX.read_data1 = EX_DM.ALU_result;
+                ID_EX.forward[0] = 2;
+                ID_EX.forward[1] = rt;
+                ID_EX.forward[2] = 0;
+            }
+            else
+                ID_EX.read_data1 = reg[rt];
+            ID_EX.read_data2 = 0;
+            ID_EX.write_reg = rd;
+            break;
+        }
+        case 0x03:	///sra
+        {
+            shamt = cut_shamt(IF_ID.instruction);
+            rt = cut_rt(IF_ID.instruction);
+            rd = cut_rd(IF_ID.instruction);
+            ID_EX.immediate_ext = shamt;
+            ID_EX.instruction = IF_ID.instruction;
+
+            if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+                if(((rt==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rt==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rt!=0)
+                {
+                    ID_EX.stall=1;
+                    ID_EX.instruction=0;
+
+                    break;
+                }
+            if(rt==EX_DM.write_reg && EX_DM.can_forward==1&&rt!=0)
+            {
+                ID_EX.read_data1 = EX_DM.ALU_result;
+                ID_EX.forward[0] = 2;
+                ID_EX.forward[1] = rt;
+                ID_EX.forward[2] = 0;
+            }
+            else
+                ID_EX.read_data1 = reg[rt];
+            ID_EX.read_data2 = 0;
+            ID_EX.write_reg = rd;
+            break;
+        }
+        case 0x08:	///jr
+        {
+            ID_EX.instruction = IF_ID.instruction;
+            rs = cut_rs(IF_ID.instruction);
+            if(((rs==DM_WB.write_reg&&DM_WB.can_forward==0)||(rs==EX_DM.write_reg&&EX_DM.can_forward!=2&&ID_EX.instruction!=0))&&rs!=0)
+        {
+            ID_EX.stall=1;
+            ID_EX.instruction=0;
+
+            break;
+        }
+
+             if(rs == DM_WB.write_reg && DM_WB.can_forward==1&&rs!=0)
+            {
+
+                PCback = DM_WB.ALU_result;
+                ID_EX.forward[0] = 1;
+                ID_EX.forward[1] = rs;
+                ID_EX.forward[2] = 1;
+            }
+            else
+                PCback = reg[rs];
+branch = 1;
+            break;
+        }
+
+        }
+        break;
+    }
+    case 0x08:	///addi
+    {
+        immediate = cut_immediate(IF_ID.instruction);
+        rs = cut_rs(IF_ID.instruction);
+        rt = cut_rt(IF_ID.instruction);
+        ID_EX.immediate_ext = immediate;
+        ID_EX.instruction = IF_ID.instruction;
+        if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+            if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+            {
+                ID_EX.stall=1;
+                ID_EX.instruction=0;
+
+                break;
+            }
+
+
+        if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+        {
+            ID_EX.read_data1 = EX_DM.ALU_result;
+            ID_EX.forward[0] = 1;
+            ID_EX.forward[1] = rs;
+            ID_EX.forward[2] = 0;
+        }
+        else
+            ID_EX.read_data1 = reg[rs];
+        ID_EX.read_data2 = 0;
+        ID_EX.write_reg = rt;
+        break;
+    }
+    case 0x09:	///addiu
+    {
+        immediate = cut_immediate(IF_ID.instruction);
+        rs = cut_rs(IF_ID.instruction);
+        rt = cut_rt(IF_ID.instruction);
+        ID_EX.immediate_ext = immediate;
+        ID_EX.instruction = IF_ID.instruction;
+        if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+            if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+            {
+                ID_EX.stall=1;
+                ID_EX.instruction=0;
+
+                break;
+            }
+
+
+        if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+        {
+            ID_EX.read_data1 = EX_DM.ALU_result;
+            ID_EX.forward[0] = 1;
+            ID_EX.forward[1] = rs;
+            ID_EX.forward[2] = 0;
+        }
+        else
+            ID_EX.read_data1 = reg[rs];
+        ID_EX.read_data2 = 0;
+        ID_EX.write_reg = rt;
+        break;
+    }
+    case 0x23:	///lw
+    {
+        immediate = cut_immediate(IF_ID.instruction);
+        rs = cut_rs(IF_ID.instruction);
+        rt = cut_rt(IF_ID.instruction);
+        ID_EX.immediate_ext = immediate;
+        ID_EX.instruction = IF_ID.instruction;
+        if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+            if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+            {
+                ID_EX.stall=1;
+                ID_EX.instruction=0;
+
+                break;
+            }
+
+
+        if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+        {
+            ID_EX.read_data1 = EX_DM.ALU_result;
+            ID_EX.forward[0] = 1;
+            ID_EX.forward[1] = rs;
+            ID_EX.forward[2] = 0;
+        }
+        else
+            ID_EX.read_data1 = reg[rs];
+        ID_EX.read_data2 = 0;
+        ID_EX.write_reg = rt;
+        break;
+    }
+    case 0x21:	///lh
+    {
+        immediate = cut_immediate(IF_ID.instruction);
+        rs = cut_rs(IF_ID.instruction);
+        rt = cut_rt(IF_ID.instruction);
+        ID_EX.immediate_ext = immediate;
+        ID_EX.instruction = IF_ID.instruction;
+        if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+            if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+            {
+                ID_EX.stall=1;
+                ID_EX.instruction=0;
+
+                break;
+            }
+
+
+        if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+        {
+            ID_EX.read_data1 = EX_DM.ALU_result;
+            ID_EX.forward[0] = 1;
+            ID_EX.forward[1] = rs;
+            ID_EX.forward[2] = 0;
+        }
+        else
+            ID_EX.read_data1 = reg[rs];
+        ID_EX.read_data2 = 0;
+        ID_EX.write_reg = rt;
+        break;
+    }
+    case 0x25:	///lhu
+    {
+        immediate = cut_immediate(IF_ID.instruction);
+        rs = cut_rs(IF_ID.instruction);
+        rt = cut_rt(IF_ID.instruction);
+        ID_EX.immediate_ext = immediate;
+        ID_EX.instruction = IF_ID.instruction;
+        if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+            if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+            {
+                ID_EX.stall=1;
+                ID_EX.instruction=0;
+
+                break;
+            }
+
+
+        if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+        {
+            ID_EX.read_data1 = EX_DM.ALU_result;
+            ID_EX.forward[0] = 1;
+            ID_EX.forward[1] = rs;
+            ID_EX.forward[2] = 0;
+        }
+        else
+            ID_EX.read_data1 = reg[rs];
+        ID_EX.read_data2 = 0;
+        ID_EX.write_reg = rt;
+        break;
+    }
+    case 0x20:	///lb
+    {
+        immediate = cut_immediate(IF_ID.instruction);
+        rs = cut_rs(IF_ID.instruction);
+        rt = cut_rt(IF_ID.instruction);
+        ID_EX.immediate_ext = immediate;
+        ID_EX.instruction = IF_ID.instruction;
+        if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+            if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+            {
+                ID_EX.stall=1;
+                ID_EX.instruction=0;
+
+                break;
+            }
+
+
+        if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+        {
+            ID_EX.read_data1 = EX_DM.ALU_result;
+            ID_EX.forward[0] = 1;
+            ID_EX.forward[1] = rs;
+            ID_EX.forward[2] = 0;
+        }
+        else
+            ID_EX.read_data1 = reg[rs];
+        ID_EX.read_data2 = 0;
+        ID_EX.write_reg = rt;
+        break;
+    }
+    case 0x24:	///lbu
+    {
+        immediate = cut_immediate(IF_ID.instruction);
+        rs = cut_rs(IF_ID.instruction);
+        rt = cut_rt(IF_ID.instruction);
+        ID_EX.immediate_ext = immediate;
+        ID_EX.instruction = IF_ID.instruction;
+        if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+            if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+            {
+                ID_EX.stall=1;
+                ID_EX.instruction=0;
+
+                break;
+            }
+
+
+        if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+        {
+            ID_EX.read_data1 = EX_DM.ALU_result;
+            ID_EX.forward[0] = 1;
+            ID_EX.forward[1] = rs;
+            ID_EX.forward[2] = 0;
+        }
+        else
+            ID_EX.read_data1 = reg[rs];
+        ID_EX.read_data2 = 0;
+        ID_EX.write_reg = rt;
+        break;
+    }
+    case 0x2B:	///sw
+    {
+        immediate = cut_immediate(IF_ID.instruction);
+        rs = cut_rs(IF_ID.instruction);
+        rt = cut_rt(IF_ID.instruction);
+        ID_EX.immediate_ext = immediate;
+        ID_EX.instruction = IF_ID.instruction;
+        if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+            if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+            {
+                ID_EX.stall=1;
+                ID_EX.instruction=0;
+
+                break;
+            }
+        if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+            if(((rt==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rt==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rt!=0)
+            {
+                ID_EX.stall=1;
+                ID_EX.instruction=0;
+
+                break;
+            }
+        if(rs==rt&&rs==EX_DM.write_reg&&EX_DM.can_forward==1&&rs!=0)
+        {
+            ID_EX.read_data1 =EX_DM.ALU_result;
+            ID_EX.read_data2 = EX_DM.ALU_result;
+            ID_EX.forward[0]=3;
+            ID_EX.forward[1]=rs;
+            ID_EX.forward[2] = 0;
+        }
+        else
+        {
+            if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+            {
+                ID_EX.read_data1 = EX_DM.ALU_result;
+                ID_EX.forward[0] = 1;
+                ID_EX.forward[1] = rs;
+                ID_EX.forward[2] = 0;
+            }
+            else
+                ID_EX.read_data1 = reg[rs];
+            if(rt==EX_DM.write_reg && EX_DM.can_forward==1&&rt!=0)
+            {
+                ID_EX.read_data2 = EX_DM.ALU_result;
+                ID_EX.forward[0] = 2;
+                ID_EX.forward[1] = rt;
+                ID_EX.forward[2] = 0;
+            }
+            else
+                ID_EX.read_data2 = reg[rt];
+        }
+        ID_EX.write_reg = 0;
+        break;
+    }
+    case 0x29:	///sh
+    {
+        immediate = cut_immediate(IF_ID.instruction);
+        rs = cut_rs(IF_ID.instruction);
+        rt = cut_rt(IF_ID.instruction);
+        ID_EX.immediate_ext = immediate;
+        ID_EX.instruction = IF_ID.instruction;
+        if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+            if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+            {
+                ID_EX.stall=1;
+                ID_EX.instruction=0;
+
+                break;
+            }
+        if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+            if(((rt==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rt==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rt!=0)
+            {
+                ID_EX.stall=1;
+                ID_EX.instruction=0;
+
+                break;
+            }
+        if(rs==rt&&rs==EX_DM.write_reg&&EX_DM.can_forward==1&&rs!=0)
+        {
+            ID_EX.read_data1 =EX_DM.ALU_result;
+            ID_EX.read_data2 = EX_DM.ALU_result;
+            ID_EX.forward[0]=3;
+            ID_EX.forward[1]=rs;
+            ID_EX.forward[2] = 0;
+        }
+        else
+        {
+            if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+            {
+                ID_EX.read_data1 = EX_DM.ALU_result;
+                ID_EX.forward[0] = 1;
+                ID_EX.forward[1] = rs;
+                ID_EX.forward[2] = 0;
+            }
+            else
+                ID_EX.read_data1 = reg[rs];
+            if(rt==EX_DM.write_reg && EX_DM.can_forward==1&&rt!=0)
+            {
+                ID_EX.read_data2 = EX_DM.ALU_result;
+                ID_EX.forward[0] = 2;
+                ID_EX.forward[1] = rt;
+                ID_EX.forward[2] = 0;
+            }
+            else
+                ID_EX.read_data2 = reg[rt];
+        }
+        ID_EX.write_reg = 0;
+        break;
+    }
+    case 0x28:	///sb
+    {
+        immediate = cut_immediate(IF_ID.instruction);
+        rs = cut_rs(IF_ID.instruction);
+        rt = cut_rt(IF_ID.instruction);
+        ID_EX.immediate_ext = immediate;
+        ID_EX.instruction = IF_ID.instruction;
+        if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+            if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+            {
+                ID_EX.stall=1;
+                ID_EX.instruction=0;
+
+                break;
+            }
+        if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+            if(((rt==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rt==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rt!=0)
+            {
+                ID_EX.stall=1;
+                ID_EX.instruction=0;
+
+                break;
+            }
+        if(rs==rt&&rs==EX_DM.write_reg&&EX_DM.can_forward==1&&rs!=0)
+        {
+            ID_EX.read_data1 =EX_DM.ALU_result;
+            ID_EX.read_data2 = EX_DM.ALU_result;
+            ID_EX.forward[0]=3;
+            ID_EX.forward[1]=rs;
+            ID_EX.forward[2] = 0;
+        }
+        else
+        {
+            if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+            {
+                ID_EX.read_data1 = EX_DM.ALU_result;
+                ID_EX.forward[0] = 1;
+                ID_EX.forward[1] = rs;
+                ID_EX.forward[2] = 0;
+            }
+            else
+                ID_EX.read_data1 = reg[rs];
+            if(rt==EX_DM.write_reg && EX_DM.can_forward==1&&rt!=0)
+            {
+                ID_EX.read_data2 = EX_DM.ALU_result;
+                ID_EX.forward[0] = 2;
+                ID_EX.forward[1] = rt;
+                ID_EX.forward[2] = 0;
+            }
+            else
+                ID_EX.read_data2 = reg[rt];
+        }
+        ID_EX.write_reg = 0;
+        break;
+    }
+    case 0x0F:	///lui
+    {
+
+        immediate = cut_immediate(IF_ID.instruction);
+        rt = cut_rt(IF_ID.instruction);
+        ID_EX.immediate_ext = immediate;
+        ID_EX.instruction = IF_ID.instruction;
+        ID_EX.read_data1 = 0;
+        ID_EX.read_data2 = 0;
+        ID_EX.write_reg = rt;
+
+        break;
+    }
+    case 0x0C:	///andi
+    {
+        unsigned_immediate = cut_immediate_unsigned(IF_ID.instruction);
+        rs = cut_rs(IF_ID.instruction);
+        rt = cut_rt(IF_ID.instruction);
+        ID_EX.immediate_ext = unsigned_immediate;
+        ID_EX.instruction = IF_ID.instruction;
+        if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+            if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+            {
+                ID_EX.stall=1;
+                ID_EX.instruction=0;
+
+                break;
+            }
+
+
+        if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+        {
+            ID_EX.read_data1 = EX_DM.ALU_result;
+            ID_EX.forward[0] = 1;
+            ID_EX.forward[1] = rs;
+            ID_EX.forward[2] = 0;
+        }
+        else
+            ID_EX.read_data1 = reg[rs];
+        ID_EX.read_data2 = 0;
+        ID_EX.write_reg = rt;
+        break;
+    }
+    case 0x0D:	///ori
+    {
+        unsigned_immediate = cut_immediate_unsigned(IF_ID.instruction);
+        rs = cut_rs(IF_ID.instruction);
+        rt = cut_rt(IF_ID.instruction);
+        ID_EX.immediate_ext = unsigned_immediate;
+        ID_EX.instruction = IF_ID.instruction;
+        if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+            if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+            {
+                ID_EX.stall=1;
+                ID_EX.instruction=0;
+
+                break;
+            }
+
+
+        if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+        {
+            ID_EX.read_data1 = EX_DM.ALU_result;
+            ID_EX.forward[0] = 1;
+            ID_EX.forward[1] = rs;
+            ID_EX.forward[2] = 0;
+        }
+        else
+            ID_EX.read_data1 = reg[rs];
+        ID_EX.read_data2 = 0;
+        ID_EX.write_reg = rt;
+        break;
+    }
+    case 0x0E:	///nori
+    {
+        unsigned_immediate = cut_immediate_unsigned(IF_ID.instruction);
+        rs = cut_rs(IF_ID.instruction);
+        rt = cut_rt(IF_ID.instruction);
+        ID_EX.immediate_ext = unsigned_immediate;
+        ID_EX.instruction = IF_ID.instruction;
+        if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+            if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+            {
+                ID_EX.stall=1;
+                ID_EX.instruction=0;
+
+                break;
+            }
+
+
+        if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+        {
+            ID_EX.read_data1 = EX_DM.ALU_result;
+            ID_EX.forward[0] = 1;
+            ID_EX.forward[1] = rs;
+            ID_EX.forward[2] = 0;
+        }
+        else
+            ID_EX.read_data1 = reg[rs];
+        ID_EX.read_data2 = 0;
+        ID_EX.write_reg = rt;
+        break;
+    }
+    case 0x0A:	///slti
+    {
+        immediate = cut_immediate(IF_ID.instruction);
+        rs = cut_rs(IF_ID.instruction);
+        rt = cut_rt(IF_ID.instruction);
+        ID_EX.immediate_ext = immediate;
+        ID_EX.instruction = IF_ID.instruction;
+        if(!((EX_DM.write_reg==DM_WB.write_reg)&&(EX_DM.can_forward==1)))
+            if(((rs==DM_WB.write_reg&&DM_WB.can_forward!=2)||(rs==EX_DM.write_reg&&EX_DM.can_forward==0&&ID_EX.instruction!=0))&&rs!=0)
+            {
+                ID_EX.stall=1;
+                ID_EX.instruction=0;
+
+                break;
+            }
+
+
+        if(rs==EX_DM.write_reg && EX_DM.can_forward==1&&rs!=0)
+        {
+            ID_EX.read_data1 = EX_DM.ALU_result;
+            ID_EX.forward[0] = 1;
+            ID_EX.forward[1] = rs;
+            ID_EX.forward[2] = 0;
+        }
+        else
+            ID_EX.read_data1 = reg[rs];
+        ID_EX.read_data2 = 0;
+        ID_EX.write_reg = rt;
+
+        break;
+    }
+    case 0x04:	///beq
+    {
+
+
+        immediate = cut_immediate(IF_ID.instruction);
+        rs = cut_rs(IF_ID.instruction);
+        rt = cut_rt(IF_ID.instruction);
+
+
+        if(((rs==DM_WB.write_reg&&DM_WB.can_forward==0)||(rs==EX_DM.write_reg&&EX_DM.can_forward!=2&&ID_EX.instruction!=0))&&rs!=0)
+        {
+
+            ID_EX.stall=1;
+            ID_EX.instruction=0;
+
+            break;
+        }
+
+        if(((rt==DM_WB.write_reg&&DM_WB.can_forward==0)||(rt==EX_DM.write_reg&&EX_DM.can_forward!=2&&ID_EX.instruction!=0))&&rt!=0)
+        {
+
+            ID_EX.stall=1;
+            ID_EX.instruction=0;
+
+            break;
+        }
+
+
+        if(rs==DM_WB.write_reg && DM_WB.can_forward==1&&rs!=0)
+        {
+            if(rt==DM_WB.write_reg && DM_WB.can_forward==1&&rt!=0)
+            {
+                if(DM_WB.ALU_result==DM_WB.ALU_result)
+                {
+                    branch = 1;
+                    PCback = IF_ID.PC + 4 + immediate*4;
+
+                }
+                ID_EX.forward[0] = 3;
+                ID_EX.forward[1] = rs;
+                ID_EX.forward[2] = 1;
+            }
+            else
+            {
+
+                if(DM_WB.ALU_result==reg[rt])
+                {
+
+                    branch = 1;
+                    PCback = IF_ID.PC + 4 + immediate*4;
+
+                }
+                ID_EX.forward[0] = 1;
+                ID_EX.forward[1] = rs;
+                ID_EX.forward[2] = 1;
+            }
+
+        }
+        else
+        {
+
+            if(rt==DM_WB.write_reg && DM_WB.can_forward==1&&rt!=0)
+            {
+
+                if(DM_WB.ALU_result==reg[rs])
+                {
+
+                    branch = 1;
+                    PCback = IF_ID.PC + 4 + immediate*4;
+
+
+                }
+                ID_EX.forward[0] = 2;
+                ID_EX.forward[1] = rt;
+                ID_EX.forward[2] = 1;
+            }
+            else
+            {
+                if(reg[rs]==reg[rt])
+                {
+                    branch = 1;
+                    PCback = IF_ID.PC + 4 + immediate*4;
+
+                }
+                ID_EX.forward[0] = 0;
+                ID_EX.forward[1] = 0;
+                ID_EX.forward[2] = 0;
+
+            }
+
+        }
+
+
+
+
+
+        ID_EX.immediate_ext = 0;
+        ID_EX.instruction = IF_ID.instruction;
+        ID_EX.read_data1 = 0;
+        ID_EX.read_data2 = 0;
+        ID_EX.write_reg = 0;
+
+
+        break;
+    }
+    case 0x05:	///bne
+    {
+        immediate = cut_immediate(IF_ID.instruction);
+        rs = cut_rs(IF_ID.instruction);
+        rt = cut_rt(IF_ID.instruction);
+
+        if(((rs==DM_WB.write_reg&&DM_WB.can_forward==0)||(rs==EX_DM.write_reg&&EX_DM.can_forward!=2&&ID_EX.instruction!=0))&&rs!=0)
+        {
+            ID_EX.stall=1;
+            ID_EX.instruction=0;
+
+            break;
+        }
+
+        if(((rt==DM_WB.write_reg&&DM_WB.can_forward==0)||(rt==EX_DM.write_reg&&EX_DM.can_forward!=2&&ID_EX.instruction!=0))&&rt!=0)
+        {
+            ID_EX.stall=1;
+            ID_EX.instruction=0;
+
+            break;
+        }
+
+
+            if(rs==DM_WB.write_reg && DM_WB.can_forward==1&&rs!=0)
+            {
+                if(rt==DM_WB.write_reg && DM_WB.can_forward==1&&rt!=0)
+                {
+                    if(DM_WB.ALU_result!=DM_WB.ALU_result)
+                    {
+                        branch = 1;
+                        PCback = IF_ID.PC + 4 + immediate*4;
+
+                    }
+                    ID_EX.forward[0] = 3;
+                    ID_EX.forward[1] = rs;
+                    ID_EX.forward[2] = 1;
+                }
+                else
+                {
+                    if(DM_WB.ALU_result!=reg[rt])
+                    {
+                        branch = 1;
+                        PCback = IF_ID.PC + 4 + immediate*4;
+
+                    }
+                    ID_EX.forward[0] = 1;
+                    ID_EX.forward[1] = rs;
+                    ID_EX.forward[2] = 1;
+                }
+
+            }
+            else
+            {
+                if(rt==DM_WB.write_reg && DM_WB.can_forward==1&&rt!=0)
+                {
+                    if(DM_WB.ALU_result!=reg[rs])
+                    {
+                        branch = 1;
+                        PCback = IF_ID.PC + 4 + immediate*4;
+
+                    }
+                    ID_EX.forward[0] = 2;
+                    ID_EX.forward[1] = rt;
+                    ID_EX.forward[2] = 1;
+                }
+                else
+                {
+                    if(reg[rs]!=reg[rt])
+                    {
+                        branch = 1;
+                        PCback = IF_ID.PC + 4 + immediate*4;
+
+                    }
+                    ID_EX.forward[0] = 0;
+                    ID_EX.forward[1] = 0;
+                    ID_EX.forward[2] = 0;
+
+                }
+
+            }
+
+
+
+
+
+        ID_EX.immediate_ext = 0;
+        ID_EX.instruction = IF_ID.instruction;
+        ID_EX.read_data1 = 0;
+        ID_EX.read_data2 = 0;
+        ID_EX.write_reg = 0;
+        break;
+    }
+    case 0x07:	///bgtz
+    {
+
+        immediate = cut_immediate(IF_ID.instruction);
+        rs = cut_rs(IF_ID.instruction);
+
+        if(((rs==DM_WB.write_reg&&DM_WB.can_forward==0)||(rs==EX_DM.write_reg&&EX_DM.can_forward!=2&&ID_EX.instruction!=0))&&rs!=0)
+        {
+            ID_EX.stall=1;
+            ID_EX.instruction=0;
+
+            break;
+        }
+
+
+
+            if(rs == DM_WB.write_reg && DM_WB.can_forward==1&&rs!=0)
+            {
+                if(DM_WB.ALU_result>0)
+                {
+                    branch = 1;
+                    PCback = IF_ID.PC + 4 + immediate*4;
+                }
+                ID_EX.forward[0] = 1;
+                ID_EX.forward[1] = rs;
+                ID_EX.forward[2] = 1;
+            }
+            else
+            {
+                if(reg[rs]>0)
+                {
+
+                    branch = 1;
+                    PCback = IF_ID.PC + 4 + immediate*4;
+
+                }
+            }
+
+
+
+
+        ID_EX.immediate_ext = 0;
+        ID_EX.instruction = IF_ID.instruction;
+        ID_EX.read_data1 = 0;
+        ID_EX.read_data2 = 0;
+        ID_EX.write_reg = 0;
+        break;
+    }
+    case 0x02:	///j
+    {
+
+        ID_EX.instruction = IF_ID.instruction;
+        address = cut_address(IF_ID.instruction);
+
+        branch=1;
+        IF_ID.PC+=4;
+        address=address<<2;
+        PCback = (unsigned) IF_ID.PC>>28;
+        PCback = PCback<<28;
+        PCback = (unsigned)PCback|address;
+        break;
+    }
+    case 0x03:	///jal
+    {
+        ID_EX.instruction = IF_ID.instruction;
+        address = cut_address(IF_ID.instruction);
+        branch=1;
+        address=address<<2;
+        ID_EX.write_reg=31;
+        IF_ID.PC+=4;
+        ID_EX.immediate_ext = IF_ID.PC;
+        PCback = (unsigned) IF_ID.PC>>28;
+        PCback = PCback<<28;
+        PCback = (unsigned)PCback|address;
+        break;
+    }
+    case 0x3F:	///halt
+    {
+        //  printf("halt\n");
+        ID_EX.instruction = IF_ID.instruction;
+        flag=1;
+        break;
+    }
+
+
+    }
+
+
+    if(flag==1) return 1;
+    else return 0;
+
+}
+
+int IF(int flags)
+{
+
+    if(errors[0]==1)fprintf(error,"In cycle %d: Write $0 Error\n",count+1);
+    if(errors[1]==1)fprintf(error,"In cycle %d: Address Overflow\n",count+1);
+    if(errors[2]==1)fprintf(error,"In cycle %d: Misalignment Error\n",count+1);
+    if(errors[3]==1)fprintf(error,"In cycle %d: Number Overflow\n",count+1);
+    unsigned char rt=0;
+    unsigned char rd=0;
+    unsigned char shamt=0;
+    unsigned char funct=0;
+
+    int i=0;
+    int j=0;
+
+
+    if(flags==0)
+    {
+        tempPC = PC;
+        change = 0;
+        branch = 0;
+        stalls=0;
+    }
+    else
+    {
+        if(stalls==1)
+        {
+            tempPC = tempPC;
+            stalls=0;
+        }
+        else
+        {
+            if(change==1)
+            {
+                tempPC=changePC;
+                change=0;
+            }
+            else
+            {
+                tempPC+=4;
+
+
+            }
+
+        }
+
+
+    }
+    //printf("\nflags = %d, bramch = %d, change = %d\n\n",flags,branch,change);
+    if(branch==1)
+    {
+        changePC = PCback;
+
+        change=1;
+    }
+
+
+    if(ID_EX.stall==1)
+    {
+        stalls=1;
+    }
+
+    if(tempPC>=PC_start)
+    {
+        if(ID_EX.stall==1)
+        {
+            i = (tempPC-PC_start)/4;
+            IF_ID.instruction = IF_ID.instruction;
+        }
+        else
+        {
+
+            i=(tempPC-PC_start)/4;
+            IF_ID.instruction=iim[i];
+            IF_ID.PC=tempPC;
+
+        }
+
+ fprintf(snapshot,"PC: 0x%08X\n",tempPC);
+    if(branch == 0&& ID_EX.stall==0)
+        fprintf(snapshot,"IF: 0x%08X",iim[i]);
+    else if(branch==1&&ID_EX.stall==0)
+        fprintf(snapshot,"IF: 0x%08X to_be_flushed",iim[i]);
+    else
+        fprintf(snapshot,"IF: 0x%08X to_be_stalled",iim[i]);
+
+    }
+    else
+    {
+        if(ID_EX.stall==1)
+            IF_ID.instruction=IF_ID.instruction;
+        else
+            IF_ID.instruction=0;
+
+        fprintf(snapshot,"PC: 0x%08X\n",tempPC);
+    if(branch == 0&& ID_EX.stall==0)
+        fprintf(snapshot,"IF: 0x00000000");
+    else if(branch==1&&ID_EX.stall==0)
+        fprintf(snapshot,"IF: 0x00000000 to_be_flushed");
+    else
+        fprintf(snapshot,"IF: 0x00000000 to_be_stalled");
+
+    }
+
+
+    fprintf(snapshot,"\n");
+    name = toname(show_IDi);
+    fprintf(snapshot,"ID: %s",name);
+    if(ID_EX.stall==1)
+        fprintf(snapshot," to_be_stalled");
+    else
+    {
+        if(ID_EX.forward[2]==1&&ID_EX.forward[0]!=0)
+        {
+            if(ID_EX.forward[0]==1)
+            {
+
+                fprintf(snapshot," fwd_EX-DM_rs_$%d",ID_EX.forward[1]);
+            }
+            else if(ID_EX.forward[0]==2)
+            {
+                fprintf(snapshot," fwd_EX-DM_rt_$%d",ID_EX.forward[1]);
+            }
+            else
+            {
+                fprintf(snapshot," fwd_EX-DM_rs_$%d fwd_EX-DM_rt_$%d",ID_EX.forward[1],ID_EX.forward[1]);
+            }
+        }
+    }
+
+    fprintf(snapshot,"\n");
+    name = toname(show_EXi);
+    fprintf(snapshot,"EX: %s",name);
+
+
+    if(EX_DM.forward[2]==0&&EX_DM.forward[0]!=0)
+    {
+        if(EX_DM.forward[0]==1)
+        {
+            fprintf(snapshot," fwd_EX-DM_rs_$%d",EX_DM.forward[1]);
+        }
+        else if(EX_DM.forward[0]==2)
+        {
+            fprintf(snapshot," fwd_EX-DM_rt_$%d",EX_DM.forward[1]);
+        }
+        else
+        {
+            fprintf(snapshot," fwd_EX-DM_rs_$%d fwd_EX-DM_rt_$%d",EX_DM.forward[1],EX_DM.forward[1]);
+        }
+    }
+
+    fprintf(snapshot,"\n");
+    name = toname(show_DMi);
+    fprintf(snapshot,"DM: %s",name);
+    fprintf(snapshot,"\n");
+    name = toname(show_WBi);
+    fprintf(snapshot,"WB: %s",name);
+    fprintf(snapshot,"\n");
+    fprintf(snapshot,"\n");
+    if(branch == 1 && ID_EX.stall!=1)
+    {
+        IF_ID.instruction = 0;  ///flush
+        branch =0;
+    }
+    op=(unsigned)iim[i]>>26;
+    shamt = cut_shamt(iim[i]);
+    rt = cut_rt(iim[i]);
+    rd = cut_rd(iim[i]);
+    funct = cut_func(iim[i]);
+
+    if(op==0&&shamt==0&&rt==0&&rd==0&&funct==0&&(ID_EX.stall!=1))
+        IF_ID.instruction=0;
+
+    if(op==0x3F)
+    {
+        return 1;
+    }
+    else
+        return 0;
+}
diff --git a/pipeline/simulator/state.h b/pipeline/simulator/state.h
new file mode 100644
index 0000000..81c5095
--- /dev/null
+++ b/pipeline/simulator/state.h
@@ -0,0 +1,38 @@
+#include <stdio.h>
+#include <stdlib.h>
+
+
+int WB();
+int DM();
+int EX();
+int ID();
+int IF(int);
+
+extern FILE *snapshot;
+extern FILE *error;
+
+int stall;
+extern int count;
+int errors[4];
+
+
+
+int stalls;
+int PCback,branch;
+int tempPC;
+int changePC;
+int change;
+
+extern int reg[32];
+extern int PC;
+extern int PC_start;
+extern int iim[256];
+extern unsigned char dim[1024];
+
+int show_IDi;
+int show_EXi;
+int show_DMi;
+int show_WBi;
+char * name;
+
+unsigned char op,funct;
diff --git a/pipeline/simulator/state_structure.txt b/pipeline/simulator/state_structure.txt
new file mode 100644
index 0000000..6472a08
--- /dev/null
+++ b/pipeline/simulator/state_structure.txt
@@ -0,0 +1,201 @@
+
+int flag=0;
+op=(unsigned)DM_WB.instruction>>26;
+
+
+
+
+            switch(op)
+            {
+            case 0x00:
+            {
+                funct=cut_func(DM_WB.instruction);
+
+                switch(funct)
+                {
+                case 0x20:	///add
+                {
+
+                    
+                    break;
+                }
+                case 0x21:	///addu
+                {
+                    
+                    break;
+                }
+                case 0x22:	///sub
+                {
+                    
+                    break;
+                }
+                case 0x24:	///and
+                {
+                   
+                    break;
+                }
+                case 0x25:	///or
+                {
+                    
+                    break;
+                }
+                case 0x26:	///xor
+                {
+                    
+                    break;
+                }
+                case 0x27:	///nor
+                {
+                    
+                    break;
+                }
+                case 0x28:	///nand
+                {
+                    
+                    break;
+                }
+                case 0x2A:	///slt
+                {
+                    
+                    break;
+                }
+                case 0x00:	///sll
+                {
+               
+                    break;
+                }
+                case 0x02:	///srl
+                {
+                    
+                    break;
+                }
+                case 0x03:	///sra
+                {
+                    
+                    break;
+                }
+                case 0x08:	///jr
+                {
+
+                    
+                    break;
+                }
+
+                }
+                break;
+            }
+            case 0x08:	///addi
+            {
+
+                
+                break;
+            }
+            case 0x09:	///addiu
+            {
+                
+                break;
+            }
+            case 0x23:	///lw
+            {
+
+                
+                break;
+            }
+            case 0x21:	///lh
+            {
+               
+                break;
+            }
+            case 0x25:	///lhu
+            {
+                
+                break;
+            }
+            case 0x20:	///lb
+            {
+                
+                break;
+            }
+            case 0x24:	///lbu
+            {
+                
+                break;
+            }
+            case 0x2B:	///sw
+            {
+                
+                break;
+            }
+            case 0x29:	///sh
+            {
+                
+                break;
+            }
+            case 0x28:	///sb
+            {
+                
+                break;
+            }
+            case 0x0F:	///lui
+            {
+                
+                break;
+            }
+            case 0x0C:	///andi
+            {
+               
+                break;
+            }
+            case 0x0D:	///ori
+            {
+
+                
+                break;
+            }
+            case 0x0E:	///nori
+            {
+                
+                break;
+            }
+            case 0x0A:	///slti
+            {
+                
+                break;
+            }
+            case 0x04:	///beq
+            {
+               
+                break;
+            }
+            case 0x05:	///bne
+            {
+                
+                break;
+            }
+            case 0x07:	///bgtz
+            {
+               
+                break;
+            }
+            case 0x02:	///j
+            {
+                
+                break;
+            }
+            case 0x03:	///jal
+            {
+               
+                break;
+            }
+            case 0x3F:	///halt
+            {
+                //  printf("halt\n");
+                flag=1;
+                break;
+            }
+
+
+            }
+			
+			if(flag==1) return 1;
+			else return 0;
\ No newline at end of file
diff --git a/archiTA/testcase/open_testcase/error_3/error_3.S b/pipeline/testcase/103062137.S
similarity index 86%
rename from archiTA/testcase/open_testcase/error_3/error_3.S
rename to pipeline/testcase/103062137.S
index dccb4d1..65e9a04 100644
--- a/archiTA/testcase/open_testcase/error_3/error_3.S
+++ b/pipeline/testcase/103062137.S
@@ -1,37 +1,41 @@
 addi  $1, $0, 0x7FFF
-
+
 sll   $1, $1, 16
-
+
 ori   $1, $1, 0xFFFF #$1 = 7FFFFFFF
-
+
 addi  $2, $0, 2      #$2 = 2
-
+
 add   $3, $1, $2     #overflow
-
+
 addu  $4, $1, $2
-
+
 addi  $5, $1, 0xF    #overflow
-
+
 addiu $6, $1, 0xF
-
+
 bgtz  $2, 3          # $2 = 1 > 0, so
-
+
 addi  $7, $0, 0xFFFF #Line 10~12 should not be executed
-
+
 and   $1, $1, $2
-
+
 andi  $2, $2, 0
-
+
 bgtz  $3, 1          #$3 = 0x10000000 < 0, so line 14 will be executed
-
+
 add   $0, $0, $2     #write to register 0 error
-
+lw $8 4($0) # Mem[0]: 0x7FFFFFFF 
+add $0 $0 $0
+lw $9, 1025($0)
+addi $9, $8, 1
+
 halt
-
+
 halt
-
+
 halt
-
+
 halt
-
+
 halt
diff --git a/pipeline/testcase/dimage.bin b/pipeline/testcase/dimage.bin
new file mode 100644
index 0000000..383081e
Binary files /dev/null and b/pipeline/testcase/dimage.bin differ
diff --git a/pipeline/testcase/error_dump.rpt b/pipeline/testcase/error_dump.rpt
new file mode 100644
index 0000000..b1f61a4
--- /dev/null
+++ b/pipeline/testcase/error_dump.rpt
@@ -0,0 +1,7 @@
+In cycle 9: Number Overflow
+In cycle 11: Number Overflow
+In cycle 18: Write $0 Error
+In cycle 20: Write $0 Error
+In cycle 20: Address Overflow
+In cycle 20: Misalignment Error
+In cycle 20: Number Overflow
diff --git a/pipeline/testcase/iimage.bin b/pipeline/testcase/iimage.bin
new file mode 100644
index 0000000..2667d92
Binary files /dev/null and b/pipeline/testcase/iimage.bin differ
diff --git a/archiTA/testcase/open_testcase/error_3/snapshot.rpt b/pipeline/testcase/snapshot.rpt
similarity index 93%
rename from archiTA/testcase/open_testcase/error_3/snapshot.rpt
rename to pipeline/testcase/snapshot.rpt
index 604d014..5e3c5b3 100644
--- a/archiTA/testcase/open_testcase/error_3/snapshot.rpt
+++ b/pipeline/testcase/snapshot.rpt
@@ -401,7 +401,7 @@ $29: 0x00000400
 $30: 0x00000000
 $31: 0x00000000
 PC: 0x0000001C
-IF: 0x2426000F
+IF: 0x2426FFFF
 ID: ADDI
 EX: ADDU
 DM: ADD
@@ -579,7 +579,7 @@ $02: 0x00000002
 $03: 0x80000001
 $04: 0x80000001
 $05: 0x8000000E
-$06: 0x8000000E
+$06: 0x7FFFFFFE
 $07: 0x00000000
 $08: 0x00000000
 $09: 0x00000000
@@ -606,7 +606,7 @@ $29: 0x00000400
 $30: 0x00000000
 $31: 0x00000000
 PC: 0x00000038
-IF: 0xFFFFFFFF
+IF: 0x8C080004
 ID: ADD
 EX: BGTZ
 DM: NOP
@@ -620,7 +620,7 @@ $02: 0x00000002
 $03: 0x80000001
 $04: 0x80000001
 $05: 0x8000000E
-$06: 0x8000000E
+$06: 0x7FFFFFFE
 $07: 0x00000000
 $08: 0x00000000
 $09: 0x00000000
@@ -647,8 +647,8 @@ $29: 0x00000400
 $30: 0x00000000
 $31: 0x00000000
 PC: 0x0000003C
-IF: 0xFFFFFFFF
-ID: HALT
+IF: 0x00000020
+ID: LW
 EX: ADD
 DM: BGTZ
 WB: NOP
@@ -661,7 +661,7 @@ $02: 0x00000002
 $03: 0x80000001
 $04: 0x80000001
 $05: 0x8000000E
-$06: 0x8000000E
+$06: 0x7FFFFFFE
 $07: 0x00000000
 $08: 0x00000000
 $09: 0x00000000
@@ -688,9 +688,9 @@ $29: 0x00000400
 $30: 0x00000000
 $31: 0x00000000
 PC: 0x00000040
-IF: 0xFFFFFFFF
-ID: HALT
-EX: HALT
+IF: 0x8C090401
+ID: ADD
+EX: LW
 DM: ADD
 WB: BGTZ
 
@@ -702,7 +702,7 @@ $02: 0x00000002
 $03: 0x80000001
 $04: 0x80000001
 $05: 0x8000000E
-$06: 0x8000000E
+$06: 0x7FFFFFFE
 $07: 0x00000000
 $08: 0x00000000
 $09: 0x00000000
@@ -729,10 +729,10 @@ $29: 0x00000400
 $30: 0x00000000
 $31: 0x00000000
 PC: 0x00000044
-IF: 0xFFFFFFFF
-ID: HALT
-EX: HALT
-DM: HALT
+IF: 0x21090001
+ID: LW
+EX: ADD
+DM: LW
 WB: ADD
 
 
@@ -743,7 +743,7 @@ $02: 0x00000002
 $03: 0x80000001
 $04: 0x80000001
 $05: 0x8000000E
-$06: 0x8000000E
+$06: 0x7FFFFFFE
 $07: 0x00000000
 $08: 0x00000000
 $09: 0x00000000
@@ -771,9 +771,50 @@ $30: 0x00000000
 $31: 0x00000000
 PC: 0x00000048
 IF: 0xFFFFFFFF
+ID: ADDI
+EX: LW
+DM: ADD
+WB: LW
+
+
+cycle 19
+$00: 0x00000000
+$01: 0x7FFFFFFF
+$02: 0x00000002
+$03: 0x80000001
+$04: 0x80000001
+$05: 0x8000000E
+$06: 0x7FFFFFFE
+$07: 0x00000000
+$08: 0x7FFFFFFF
+$09: 0x00000000
+$10: 0x00000000
+$11: 0x00000000
+$12: 0x00000000
+$13: 0x00000000
+$14: 0x00000000
+$15: 0x00000000
+$16: 0x00000000
+$17: 0x00000000
+$18: 0x00000000
+$19: 0x00000000
+$20: 0x00000000
+$21: 0x00000000
+$22: 0x00000000
+$23: 0x00000000
+$24: 0x00000000
+$25: 0x00000000
+$26: 0x00000000
+$27: 0x00000000
+$28: 0x00000000
+$29: 0x00000400
+$30: 0x00000000
+$31: 0x00000000
+PC: 0x0000004C
+IF: 0xFFFFFFFF
 ID: HALT
-EX: HALT
-DM: HALT
-WB: HALT
+EX: ADDI
+DM: LW
+WB: ADD