diff --git a/openhcl/virt_mshv_vtl/src/processor/hardware_cvm/mod.rs b/openhcl/virt_mshv_vtl/src/processor/hardware_cvm/mod.rs
index 35a2aa50d0..c4a969571d 100644
--- a/openhcl/virt_mshv_vtl/src/processor/hardware_cvm/mod.rs
+++ b/openhcl/virt_mshv_vtl/src/processor/hardware_cvm/mod.rs
@@ -2659,6 +2659,7 @@ impl<B: HardwareIsolatedBacking> UhProcessor<'_, B> {
                             is_shared,
                             ?extra_info,
                             ?access_type,
+                            vp = self.vp_index().index(),
                             "guest accessed inaccessible gpa, injecting MC"
                         );
                         // TODO: Implement IA32_MCG_STATUS MSR for more reporting