When trying to run corescore for the Lattice iCE40-HX8K FPGA, I get an error during placement:
ERROR: Unable to find legal placement for all cells, design is probably at utilisation limit.
I've attached a log file containing the output from fusesoc run --target=hx8k corescore. hx8k.log
Please let me know if I can provide any other information to help identify the issue.
When trying to run corescore for the Lattice iCE40-HX8K FPGA, I get an error during placement:
I've attached a log file containing the output from
fusesoc run --target=hx8k corescore. hx8k.logPlease let me know if I can provide any other information to help identify the issue.