Incongruent address space mapping between L4 and L5 PT level modes

[Qix-]

The current system of specifying L4/L5 indices for ranges in the x86 address space is a bit flawed.

For example, let's take the userspace module load segments:

• On L=4, the PML4 index is 17, meaning the lowest address for module executable code is 17 << (12 + 9 * 3) = 0x88000000000
• However on L=5, the PML5 index is still 17, meaning the lowest address becomes 17 << (12 + 9 * 4) = 0x11000000000000

This obviously breaks a lot of assumptions, especially when linking modules, and needs to be addressed somehow.