According to https://github.com/q3k/chubby75/blob/master/5a-75e/hardware_V6.0.md
|
#### LED Transceivers to J* mapping |
|
|
|
Transceivers U23,U24,U28 completely cover RGB pins on J1,J2,J3,J4 |
|
|
|
Transceivers U25,U26,U27 completely cover RGB pins on J5,J6,J7,J8 |
|
|
|
Transceivers U14,U16,U18 completely cover RGB pins on J9,J10,J11,J12 |
|
|
|
Transceivers U9,U12,U15 completely cover RGB pins on J13,J14,J15,J16 |
That is 6 RGB pins * 16 HUB75 ports = 96 pins in total
Which is the same as 12 transceivers * 8 pins each = 96 pins in total
That is correct.
I don't understand this line:
|
Transceivers U10,U11,U13,U17,U19,U20,U21,U22,U30,U38,U39 cover all shared pins |
There are only 8 shared pins (A, B, C, D, E, CLK, STB, OE):
|
For each connector, the address, CLK, STB/LAT, and OE bits are shared: |
|
|
|
| FPGA Pin | HUB75 Pin | Function | |
|
|-----------|-----------|----------| |
|
| N5 | 9 | A |
|
| N3 | 10 | B |
|
| P3 | 11 | C |
|
| P4 | 12 | D |
|
| N4 | 8 | E |
|
| M3 | 13 | CLK |
|
| N1 | 14 | STB |
|
| M4 | 15 | OE |
Why does it need 11 transceivers * 8 pins each = 88 pins in total for driving 8 shared pins?
TLDR: Where are the remaining 80 pins connected?
According to https://github.com/q3k/chubby75/blob/master/5a-75e/hardware_V6.0.md
chubby75/5a-75e/hardware_V6.0.md
Lines 206 to 214 in a1dcd4e
That is 6 RGB pins * 16 HUB75 ports = 96 pins in total
Which is the same as 12 transceivers * 8 pins each = 96 pins in total
That is correct.
I don't understand this line:
chubby75/5a-75e/hardware_V6.0.md
Line 216 in a1dcd4e
There are only 8 shared pins (A, B, C, D, E, CLK, STB, OE):
chubby75/5a-75e/hardware_V6.0.md
Lines 193 to 204 in a1dcd4e
Why does it need 11 transceivers * 8 pins each = 88 pins in total for driving 8 shared pins?
TLDR: Where are the remaining 80 pins connected?