From 3277a9ceca0e06201b1c7815573c36780d8bdb1e Mon Sep 17 00:00:00 2001 From: Taiki Endo Date: Sun, 21 Sep 2025 14:39:07 +0900 Subject: [PATCH 1/2] rustc_target: Use +spe for powerpcspe targets --- .../src/spec/targets/powerpc_unknown_linux_gnuspe.rs | 2 +- .../src/spec/targets/powerpc_unknown_linux_muslspe.rs | 2 +- .../rustc_target/src/spec/targets/powerpc_wrs_vxworks_spe.rs | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/compiler/rustc_target/src/spec/targets/powerpc_unknown_linux_gnuspe.rs b/compiler/rustc_target/src/spec/targets/powerpc_unknown_linux_gnuspe.rs index 88655c9b22a61..cafb7037c0544 100644 --- a/compiler/rustc_target/src/spec/targets/powerpc_unknown_linux_gnuspe.rs +++ b/compiler/rustc_target/src/spec/targets/powerpc_unknown_linux_gnuspe.rs @@ -25,7 +25,7 @@ pub(crate) fn target() -> Target { options: TargetOptions { cfg_abi: CfgAbi::Spe, endian: Endian::Big, - features: "+secure-plt,+msync".into(), + features: "+secure-plt,+msync,+spe".into(), mcount: "_mcount".into(), ..base }, diff --git a/compiler/rustc_target/src/spec/targets/powerpc_unknown_linux_muslspe.rs b/compiler/rustc_target/src/spec/targets/powerpc_unknown_linux_muslspe.rs index c61ceab6bd394..c9427adf8dce5 100644 --- a/compiler/rustc_target/src/spec/targets/powerpc_unknown_linux_muslspe.rs +++ b/compiler/rustc_target/src/spec/targets/powerpc_unknown_linux_muslspe.rs @@ -25,7 +25,7 @@ pub(crate) fn target() -> Target { options: TargetOptions { cfg_abi: CfgAbi::Spe, endian: Endian::Big, - features: "+msync".into(), + features: "+msync,+spe".into(), mcount: "_mcount".into(), ..base }, diff --git a/compiler/rustc_target/src/spec/targets/powerpc_wrs_vxworks_spe.rs b/compiler/rustc_target/src/spec/targets/powerpc_wrs_vxworks_spe.rs index 8f7aaa025bcc1..0a9760d6d1bd7 100644 --- a/compiler/rustc_target/src/spec/targets/powerpc_wrs_vxworks_spe.rs +++ b/compiler/rustc_target/src/spec/targets/powerpc_wrs_vxworks_spe.rs @@ -26,7 +26,7 @@ pub(crate) fn target() -> Target { cfg_abi: CfgAbi::Spe, endian: Endian::Big, // feature msync would disable instruction 'fsync' which is not supported by fsl_p1p2 - features: "+secure-plt,+msync".into(), + features: "+secure-plt,+msync,+spe".into(), ..base }, } From 6879f9a268f65809c8ec094a8ce1230d9c5b647c Mon Sep 17 00:00:00 2001 From: Taiki Endo Date: Sat, 30 May 2026 13:43:38 +0900 Subject: [PATCH 2/2] rustc_target: Use target_feature instead of cfg_abi to detect powerpcspe --- compiler/rustc_span/src/symbol.rs | 1 + compiler/rustc_target/src/asm/mod.rs | 4 ++-- compiler/rustc_target/src/asm/powerpc.rs | 16 ++++++++-------- compiler/rustc_target/src/target_features.rs | 1 + 4 files changed, 12 insertions(+), 10 deletions(-) diff --git a/compiler/rustc_span/src/symbol.rs b/compiler/rustc_span/src/symbol.rs index ba8ab39ede8cd..bd8742a64eb87 100644 --- a/compiler/rustc_span/src/symbol.rs +++ b/compiler/rustc_span/src/symbol.rs @@ -1950,6 +1950,7 @@ symbols! { sparc, sparc64, sparc_target_feature, + spe, spe_acc, specialization, speed, diff --git a/compiler/rustc_target/src/asm/mod.rs b/compiler/rustc_target/src/asm/mod.rs index 14fef2880ff68..5f2424e5cbf4c 100644 --- a/compiler/rustc_target/src/asm/mod.rs +++ b/compiler/rustc_target/src/asm/mod.rs @@ -5,7 +5,7 @@ use rustc_data_structures::fx::{FxHashMap, FxIndexSet}; use rustc_macros::{Decodable, Encodable, StableHash}; use rustc_span::Symbol; -use crate::spec::{Arch, CfgAbi, RelocModel, Target}; +use crate::spec::{Arch, RelocModel, Target}; pub struct ModifierInfo { pub modifier: char, @@ -1001,7 +1001,7 @@ impl InlineAsmClobberAbi { _ => Err(&["C", "system", "efiapi"]), }, InlineAsmArch::PowerPC | InlineAsmArch::PowerPC64 => match name { - "C" | "system" => Ok(if target.cfg_abi == CfgAbi::Spe { + "C" | "system" => Ok(if powerpc::is_spe(target_features) { InlineAsmClobberAbi::PowerPCSPE } else { InlineAsmClobberAbi::PowerPC diff --git a/compiler/rustc_target/src/asm/powerpc.rs b/compiler/rustc_target/src/asm/powerpc.rs index a09b93c64e0e0..d7ffb4850054d 100644 --- a/compiler/rustc_target/src/asm/powerpc.rs +++ b/compiler/rustc_target/src/asm/powerpc.rs @@ -1,7 +1,7 @@ use std::fmt; use rustc_data_structures::fx::FxIndexSet; -use rustc_span::Symbol; +use rustc_span::{Symbol, sym}; use super::{InlineAsmArch, InlineAsmType, ModifierInfo}; use crate::spec::{CfgAbi, RelocModel, Target}; @@ -115,18 +115,18 @@ fn reserved_v20to31( } } +pub(crate) fn is_spe(target_features: &FxIndexSet) -> bool { + target_features.contains(&sym::spe) +} + fn spe_acc_target_check( _arch: InlineAsmArch, _reloc_model: RelocModel, - _target_features: &FxIndexSet, - target: &Target, + target_features: &FxIndexSet, + _target: &Target, _is_clobber: bool, ) -> Result<(), &'static str> { - if target.cfg_abi == CfgAbi::Spe { - Ok(()) - } else { - Err("spe_acc is only available on spe targets") - } + if is_spe(target_features) { Ok(()) } else { Err("spe_acc is only available on spe targets") } } def_regs! { diff --git a/compiler/rustc_target/src/target_features.rs b/compiler/rustc_target/src/target_features.rs index b009c42eb2302..4c8baa544b387 100644 --- a/compiler/rustc_target/src/target_features.rs +++ b/compiler/rustc_target/src/target_features.rs @@ -581,6 +581,7 @@ static POWERPC_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[ ("power9-vector", Unstable(sym::powerpc_target_feature), &["power8-vector", "power9-altivec"]), ("power10-vector", Unstable(sym::powerpc_target_feature), &["power9-vector"]), ("quadword-atomics", Unstable(sym::powerpc_target_feature), &[]), + ("spe", Forbidden { reason: "use a powerpcspe target instead", hard_error: false }, &[]), ("vsx", Unstable(sym::powerpc_target_feature), &["altivec"]), // tidy-alphabetical-end ];