From ae5843853ae2f4798c089994e1709fed24136c2d Mon Sep 17 00:00:00 2001
From: wheremyfoodat <44909372+wheremyfoodat@users.noreply.github.com>
Date: Sat, 21 Nov 2020 00:58:25 +0200
Subject: [PATCH] Fix minor typos in the section about MIPS pipelining

---
 guide.tex | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/guide.tex b/guide.tex
index 8c84fb1..d2f42ed 100644
--- a/guide.tex
+++ b/guide.tex
@@ -1807,7 +1807,7 @@ \subsection{Branch delay slots}
 \code{set\_reg} instead of checking if the register was 0).
 
 MIPS however doesn't do that. It doesn't bother wasting time flushing
-the pipeline, it just ignore the issues and run the code anyway. What
+the pipeline, it just ignores the issues and runs the code anyway. What
 this means is that the first instruction right \emph{after} a branch
 always gets executed \emph{before} the branch is taken,
 \emph{unconditionaly}. This instruction is said to be in the