AE350 Demo

[nickfox-taterli]

Nothing in your wiki or this repo about how to use the AE350 core, can it run Linux?

[kyonmiriam]

Hi, due to the lack of peripherals and MMU, AE350 is currently defined as a MCU running at 800MHz... And the demo is still being under construction now.

[mlapaj]

Hi,
I have got the same problem.

I have prepared a simple example (very simple LED on/off and UART send) which is a simple port taken from documentation for 138K PRO. Not everything might be properly implemented - I'm still a VHDL learner
https://github.com/mlapaj/vhdl_playground/tree/main/mega138k/project2_ae350_risc_gpio

If i did my homework correctly, Gowin states that GW5AST is using AE350 RISC CPU. This CPU has Andes A25 Core.
According to
Andes A25 webpage it does contain MMU and PMU for Linux based applications so it should be possible to run Linux on it.

Additionally, for fun I have spent little time on getting u-boot working. There is nothing special here, just raw u-boot. Nothing is supported at the moment. I'll try to get flash/mmc working when I`ll have spare time.
u-boot-tang-mega-138k-neo

[mlapaj]

Hi,
I do not want to edit my previous message.
I have spent some time to get OpenSBI working. Once I finished with OpenSBI, I have focused on U-Boot, to get it working in Supervisor mode.
I have successfully executed OpenSBI (Machine mode->Supervisor Mode) -> U-Boot (Supervisor Mode) boot flow.
Here is my code and example.
VHDL and Software page
Next big thing is to load Linux kernel via debugger and try to boot this from U-Boot.

[mlapaj]

11.02.2025 Andes responded. They will check my problem. Hope they will find any useful solution
10.02.2025 I have contacted Andes.
03.07.2025 I have sent mail to Gowin. Waiting for reply.

Older:
Here is my latest (and probably last) update:
Good news is: Hardware is capable of running Linux. It has MMU and all other RISC-V extensions. I succesfully booted linux.
Bad news is: Looks like CPU is buggy - atomic operations are not performed (are hanging) if data used in atomic operatioins is not fetched to cache. There may be wrong configuration or initialisatinon - i was basing on some reference configurations, there is no detailed info about it in Gowin documentation and there is lack of Andes info. I have sent mail to Gowin, if I'll get no answer, I'll try to ask Andes. If this is a real bug, the real fix should be done in GCC (or any other) compiler.
Current solution (workaround) for sure has some performance drawbacks.

So i have patched Linux kernel to try to check if we can run linux on our hardware.
Patched linux kernel repo

Details:
All is loaded to RAM memory.
Boot flow: Simple L1 Cache Enable app -> OpenSBI (enables supervisor) -> U-Boot -> Linux

Next thing is to wait for fix hanging atomic operations globally. It is hard to fix every app.
I think i have done lot of work here and I have learned a lot. If there will be any. Now I'd like to focus on other FPGA stuff. I want to learn something more about PCIE so I'm not investigating this anymore. Anyway, if there is further interest in this topic i can decide to spend some additional time on this.

[kyonmiriam]

Hi,
Linux for the AE350 on this board has already been successfully ported by another developer. You can find the working project here:
https://gitee.com/uyami/gowin-ae350-linux

[umgefahren]

I am looking at that now and I try to work from there, thanks!
But my issue at the moment was just to initialize the internal DDR3 RAM with the AE350 controller and the repository you are linking to is using an external memory.

[kyonmiriam]

Well, modifying the configuration of the built-in memory controller is cumbersome, and the default configuration is designed for GOWIN EVB and is not suitable for your board.Therefore, it is recommended that you continue to use an external memory controller.BTW, in version 1.9.12.01 of the GOWIN IDE, an AXI port has been added to the DDR3 controller, which may be helpful for developing the AE350. You only need to regenerate the corresponding IP address.Hannes Furmans ***@***.***> 於 2026年1月31日 19:28 寫道：umgefahren left a comment (sipeed/TangMega-138K-example#2) I am looking at that now and I try to work from there, thanks! But my issue at the moment was just to initialize the internal DDR3 RAM with the AE350 controller and the repository you are linking to is using an external memory. —Reply to this email directly, view it on GitHub, or unsubscribe.You are receiving this because you commented.Message ID: ***@***.***>

[umgefahren]

Thank you for this tip! Truth be told I currently even have issues seeing the UART output in the ddr-memory example. I am on macOS and i have updated the debugger firmware.

[kyonmiriam]

It’s likely that your UART issue is caused by hardware‑revision differences.
On the newer TangMega‑138K DOCK PCB, the FPGA UART RX pin was changed from Y14 to V14.
If your constraints or wiring still use Y14 (from older documentation), the UART will receive nothing.
Also note that the FTDI exposes two MPSSE interfaces, and some systems may swap the order of ttyUSB0 / ttyUSB1.
If one of them shows no UART data, try the other port.

[kyonmiriam]

BTW, GOWIN changed the DDR3 controller IP significantly after IDE version 1.9.10.

DDR3 IP cores generated with older IDE versions are not fully compatible with the newer controller architecture.

To avoid subtle initialization or timing issues, it’s recommended to:
◦ Open your old project and manually copy all key DDR3 parameters (especially timing settings).
◦ Create a new DDR3 controller IP in the latest IDE.
◦ Re‑enter the parameters you backed up and regenerate the IP.

This ensures the configuration matches the updated controller structure.
Hope this helps you narrow down the issue.