Integrated Debugger/Programmer module for chip-specific memory maps

[vailuc]

Background

With read/write JTAG and SWD support, Forge can eventually become a lightweight debugger/programmer for specific chips.

Goal

Create a plugin layer that knows chip-specific memory maps (e.g., STM32 flash, FPGA bitstream loading) and drives the existing decoders to read/write those regions.

Why

This turns Forge from a generic LA into a chip-specific workstation without abandoning the zero-telemetry / local-only constraint.

Acceptance criteria

• Define a plugin interface for chip memory maps.
• Implement one reference plugin (e.g., STM32 SWD flash programming).
• All operations remain local; no external API calls or cloud dependencies.