Visual Programmer: overlay JTAG/SWD programming frames on the LA canvas

[vailuc]

Background

Once the Unified Hardware Canvas supports both read and write, the next step is to show active programming traffic on the LA canvas as it happens.

Goal

When programming a chip via JTAG/SWD, render the outgoing command frames on the waveform in real time. Failed operations should highlight the exact packet that caused the error instead of showing a generic “verification failed” message.

Why

Most chip programmers are black boxes with progress bars. This would make programming visual and debuggable inside Forge.

Acceptance criteria

• Outgoing frames are overlaid on the relevant LA channel while a write operation runs.
• A failed write/verify step highlights the corresponding frame on the canvas.
• Works with the existing JTAG and SWD decoder infrastructure.