diff --git a/source/_static/fe/jtag.png b/source/_static/fe/jtag.png new file mode 100644 index 0000000..1ba61ce Binary files /dev/null and b/source/_static/fe/jtag.png differ diff --git a/source/hardware/fe.rst b/source/hardware/fe.rst index 4200efb..5b7712c 100644 --- a/source/hardware/fe.rst +++ b/source/hardware/fe.rst @@ -147,6 +147,28 @@ The following schematic diagram shows the connections between the BreakOut board :alt: breakout board dsdr connection diagram +JTAG programming +================ + +An installed module(sSDR or dSDR) can be programmed via JTAG using the dedicated 6-pin JTAG header on the FE or BREAKOUT boards. + +You can use **Digilent HS1** or **Digilent HS2** adapters among with ``openFPGALoader`` tool for JTAG programming. +Compatible adapters might work, please refer to their documentation for pinout details. + +The following image shows how to connect the JTAG adapter to the board properly. + +.. image:: ../_static/fe/jtag.png + :alt: JTAG connection + +The pinout of the JTAG header is as follows(from left to right): + +- 1 - ``TMS`` +- 2 - ``TDI`` +- 3 - ``TDO`` +- 4 - ``TCK`` +- 5 - ``GND`` +- 6 - ``VDD`` + Clocks and synchronization ==========================