Register CLKIN_2_CLK_SEL
When an ext clock is used - expected value is IMUX_INX_DIFF(1) [differential input],
but using IMUX_INX_DIFF causes 0x89 error state after writing the registers set "The device has not detected an input clock source and can't proceed to ACTIVE state"
The only CLKIN_2_CLK_SEL value that works is IMUX_INX_CMOS_AC(3), see commit 2163ca8
Register CLKIN_2_CLK_SEL
When an ext clock is used - expected value is IMUX_INX_DIFF(1) [differential input],
but using IMUX_INX_DIFF causes 0x89 error state after writing the registers set "The device has not detected an input clock source and can't proceed to ACTIVE state"
The only CLKIN_2_CLK_SEL value that works is IMUX_INX_CMOS_AC(3), see commit 2163ca8