From 76d97b734873fb7c36f9484a33ea9035fd8404a4 Mon Sep 17 00:00:00 2001
From: Alex Lanzano <lanzano.alex@gmail.com>
Date: Wed, 1 Jul 2026 11:05:58 -0400
Subject: [PATCH] [stm32n6_crypt] Zeroize key/iv registers on error

---
 src/crypto/stm32n6_cryp.c | 48 +++++++++++++++++++++++++++++++--------
 1 file changed, 38 insertions(+), 10 deletions(-)

diff --git a/src/crypto/stm32n6_cryp.c b/src/crypto/stm32n6_cryp.c
index 08ad157..257ff36 100644
--- a/src/crypto/stm32n6_cryp.c
+++ b/src/crypto/stm32n6_cryp.c
@@ -308,6 +308,7 @@ static whal_Error Process_BlockCipher(const uint8_t *in, uint8_t *out, size_t sz
         err = WaitOutputReady(base, cfg->timeout);
         if (err) {
             Disable(base);
+            ZeroKeyIv(base);
             return err;
         }
         ReadBlock(base, out + i);
@@ -447,7 +448,7 @@ whal_Error whal_Stm32n6_CrypAesEcb_Start(whal_AesEcb *dev,
         err = PrepareDecryptionKey(base, key, keySz, keySizeBits,
                                    cfg->timeout);
         if (err)
-            return err;
+            goto cleanup;
         ConfigureMode(base, CRYP_ALGOMODE_AES_ECB, CRYP_ALGODIR_DECRYPT,
                       keySizeBits, 0, 0, 0);
         Enable(base);
@@ -458,11 +459,16 @@ whal_Error whal_Stm32n6_CrypAesEcb_Start(whal_AesEcb *dev,
         WriteKey(base, key, keySz);
         err = WaitKeyValid(base, cfg->timeout);
         if (err)
-            return err;
+            goto cleanup;
         Enable(base);
     }
 
     return WHAL_SUCCESS;
+
+cleanup:
+    Disable(base);
+    ZeroKeyIv(base);
+    return err;
 }
 
 whal_Error whal_Stm32n6_CrypAesEcb_Process(whal_AesEcb *dev,
@@ -554,7 +560,7 @@ whal_Error whal_Stm32n6_CrypAesCbc_Start(whal_AesCbc *dev,
         err = PrepareDecryptionKey(base, key, keySz, keySizeBits,
                                    cfg->timeout);
         if (err)
-            return err;
+            goto cleanup;
         ConfigureMode(base, CRYP_ALGOMODE_AES_CBC, CRYP_ALGODIR_DECRYPT,
                       keySizeBits, 0, 0, 0);
         WriteIv16(base, (const uint8_t *)iv);
@@ -567,11 +573,16 @@ whal_Error whal_Stm32n6_CrypAesCbc_Start(whal_AesCbc *dev,
         WriteKey(base, key, keySz);
         err = WaitKeyValid(base, cfg->timeout);
         if (err)
-            return err;
+            goto cleanup;
         Enable(base);
     }
 
     return WHAL_SUCCESS;
+
+cleanup:
+    Disable(base);
+    ZeroKeyIv(base);
+    return err;
 }
 
 whal_Error whal_Stm32n6_CrypAesCbc_Process(whal_AesCbc *dev,
@@ -661,10 +672,15 @@ whal_Error whal_Stm32n6_CrypAesCtr_Start(whal_AesCtr *dev,
     WriteKey(base, key, keySz);
     err = WaitKeyValid(base, cfg->timeout);
     if (err)
-        return err;
+        goto cleanup;
     Enable(base);
 
     return WHAL_SUCCESS;
+
+cleanup:
+    Disable(base);
+    ZeroKeyIv(base);
+    return err;
 }
 
 whal_Error whal_Stm32n6_CrypAesCtr_Process(whal_AesCtr *dev,
@@ -911,12 +927,12 @@ whal_Error whal_Stm32n6_CrypAesGcm_Start(whal_AesGcm *dev,
     err = GcmInit((const uint8_t *)key, keySz,
                   keySizeBits, algoDir, (const uint8_t *)iv);
     if (err)
-        return err;
+        goto cleanup;
 
     /* Header phase */
     err = GcmHeaderPhase((const uint8_t *)aad, aadSz);
     if (err)
-        return err;
+        goto cleanup;
 
     /* Transition to payload phase */
     Disable(base);
@@ -930,6 +946,11 @@ whal_Error whal_Stm32n6_CrypAesGcm_Start(whal_AesGcm *dev,
     g_aesGcmState.dataSz = 0;
 
     return WHAL_SUCCESS;
+
+cleanup:
+    Disable(base);
+    ZeroKeyIv(base);
+    return err;
 }
 
 whal_Error whal_Stm32n6_CrypAesGcm_Process(whal_AesGcm *dev,
@@ -967,6 +988,7 @@ whal_Error whal_Stm32n6_CrypAesGcm_Process(whal_AesGcm *dev,
         err = WaitOutputReady(base, cfg->timeout);
         if (err) {
             Disable(base);
+            ZeroKeyIv(base);
             return err;
         }
 
@@ -1379,13 +1401,13 @@ whal_Error whal_Stm32n6_CrypAesCcm_Start(whal_AesCcm *dev,
     WriteKey(base, key, keySz);
     err = WaitKeyValid(base, cfg->timeout);
     if (err)
-        return err;
+        goto cleanup;
     Enable(base);
 
     WriteBlock(base, b0);
     err = WaitCrypEnClear(base, cfg->timeout);
     if (err)
-        return err;
+        goto cleanup;
 
     /* Header phase (AAD) */
     if (aadSz > 0) {
@@ -1417,7 +1439,7 @@ whal_Error whal_Stm32n6_CrypAesCcm_Start(whal_AesCcm *dev,
 
         err = WaitBusyClear(base, cfg->timeout);
         if (err)
-            return err;
+            goto cleanup;
     }
 
     /* Transition to payload phase */
@@ -1432,6 +1454,11 @@ whal_Error whal_Stm32n6_CrypAesCcm_Start(whal_AesCcm *dev,
     g_aesCcmState.dataSz = 0;
 
     return WHAL_SUCCESS;
+
+cleanup:
+    Disable(base);
+    ZeroKeyIv(base);
+    return err;
 }
 
 whal_Error whal_Stm32n6_CrypAesCcm_Process(whal_AesCcm *dev,
@@ -1480,6 +1507,7 @@ whal_Error whal_Stm32n6_CrypAesCcm_Process(whal_AesCcm *dev,
         err = WaitOutputReady(base, cfg->timeout);
         if (err) {
             Disable(base);
+            ZeroKeyIv(base);
             return err;
         }