From a8d82a63c78db131beab4ac0004062bc686e33b3 Mon Sep 17 00:00:00 2001 From: serge-sans-paille Date: Mon, 22 Sep 2025 00:00:00 +0200 Subject: [PATCH] Support immediate version of btitwise shift on arm --- include/xsimd/arch/xsimd_neon.hpp | 98 +++++++++++++++++++++++++++++++ 1 file changed, 98 insertions(+) diff --git a/include/xsimd/arch/xsimd_neon.hpp b/include/xsimd/arch/xsimd_neon.hpp index 5bd7d9206..5c8900d8f 100644 --- a/include/xsimd/arch/xsimd_neon.hpp +++ b/include/xsimd/arch/xsimd_neon.hpp @@ -2314,6 +2314,55 @@ namespace xsimd return vshlq_s64(lhs, rhs); } + // immediate variant + template = 0> + XSIMD_INLINE batch bitwise_lshift(batch const& x, requires_arch) noexcept + { + return vshlq_n_u8(x, shift); + } + + template = 0> + XSIMD_INLINE batch bitwise_lshift(batch const& x, requires_arch) noexcept + { + return vshlq_n_s8(x, shift); + } + + template = 0> + XSIMD_INLINE batch bitwise_lshift(batch const& x, requires_arch) noexcept + { + return vshlq_n_u16(x, shift); + } + + template = 0> + XSIMD_INLINE batch bitwise_lshift(batch const& x, requires_arch) noexcept + { + return vshlq_n_s16(x, shift); + } + + template = 0> + XSIMD_INLINE batch bitwise_lshift(batch const& x, requires_arch) noexcept + { + return vshlq_n_u32(x, shift); + } + + template = 0> + XSIMD_INLINE batch bitwise_lshift(batch const& x, requires_arch) noexcept + { + return vshlq_n_s32(x, shift); + } + + template = 0> + XSIMD_INLINE batch bitwise_lshift(batch const& x, requires_arch) noexcept + { + return vshlq_n_u64(x, shift); + } + + template = 0> + XSIMD_INLINE batch bitwise_lshift(batch const& x, requires_arch) noexcept + { + return vshlq_n_s64(x, shift); + } + /****************** * bitwise_rshift * ******************/ @@ -2489,6 +2538,55 @@ namespace xsimd return vshlq_s32(lhs, vnegq_s32(rhs)); } + // immediate variant + template = 0> + XSIMD_INLINE batch bitwise_rshift(batch const& x, requires_arch) noexcept + { + return vshrq_n_u8(x, shift); + } + + template = 0> + XSIMD_INLINE batch bitwise_rshift(batch const& x, requires_arch) noexcept + { + return vshrq_n_s8(x, shift); + } + + template = 0> + XSIMD_INLINE batch bitwise_rshift(batch const& x, requires_arch) noexcept + { + return vshrq_n_u16(x, shift); + } + + template = 0> + XSIMD_INLINE batch bitwise_rshift(batch const& x, requires_arch) noexcept + { + return vshrq_n_s16(x, shift); + } + + template = 0> + XSIMD_INLINE batch bitwise_rshift(batch const& x, requires_arch) noexcept + { + return vshrq_n_u32(x, shift); + } + + template = 0> + XSIMD_INLINE batch bitwise_rshift(batch const& x, requires_arch) noexcept + { + return vshrq_n_s32(x, shift); + } + + template = 0> + XSIMD_INLINE batch bitwise_rshift(batch const& x, requires_arch) noexcept + { + return vshrq_n_u64(x, shift); + } + + template = 0> + XSIMD_INLINE batch bitwise_rshift(batch const& x, requires_arch) noexcept + { + return vshrq_n_s64(x, shift); + } + // first template XSIMD_INLINE float first(batch const& self, requires_arch) noexcept