radix4/isim.log at master · ym97/radix4 · GitHub

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ISim log file
Running: G:\karma\radix4\radixtest_isim_beh.exe -intstyle ise -gui -tclbatch isim.cmd -wdb G:/karma/radix4/radixtest_isim_beh.wdb
ISim P.20131013 (signature 0x7708f090)
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INFO:Security:61 - The XILINXD_LICENSE_FILE environment variable is not set.
INFO:Security:63 - The LM_LICENSE_FILE environment variable is not set.
INFO:Security:68 - For more information or for assistance in obtaining
 a license, please run the Xilinx License Configuration Manager
       (xlcm or "Manage Xilinx Licenses".)
INFO:Security:68a - user is MANISHA, on host MANISHA.
ERROR:Security:14 - No feature was available for 'ISIM'.

No such feature exists.
Feature:       ISIM
License path:  C:/.Xilinx\XilinxFree.lic;C:\Xilinx\14.7\ISE_DS\ISE\/coregen/core_licenses\Xilinx.lic;C:\Xilinx\14.7\ISE_DS\ISE\/coregen/core_licenses\XilinxFree.lic;C:\Xilinx\14.7\ISE_DS\EDK/data/core_licenses\Xilinx.lic;
FLEXnet Licensing error:-5,357
For further information, refer to the FLEXnet Licensing documentation,
available at "www.flexerasoftware.com".
----------------------------------------------------------------------
WARNING: A full ISim License cannot be checked out due to the issues listed above. Please use Xilinx License Configuration Manager to fix these issues in order to check out a full ISim license.
WARNING: ISim will run in Lite mode. Please refer to the ISim documentation for more information on the differences between the Lite and the Full version.
This is a Lite version of ISim.
WARNING:  For instance dp/cnt/, width 16 of formal port in is not equal to width 3 of actual constant.
WARNING: File "G:/karma/radix4/datapath.v" Line 27.  For instance dp/cnt/, width 16 of formal port out is not equal to width 3 of actual signal ct.
WARNING: File "G:/karma/radix4/count_decr.v" Line 24.  For instance dec1/pp/, width 8 of formal port sum is not equal to width 3 of actual signal out.
WARNING: File "G:/karma/radix4/datapath.v" Line 26.  For instance dp/multiplicand/, width 16 of formal port in is not equal to width 8 of actual signal sw.
WARNING: File "G:/karma/radix4/datapath.v" Line 47.  For instance dp/multiplicand/, width 16 of formal port out is not equal to width 8 of actual signal md.
WARNING:  For instance c1/add/, width 8 of formal port b is not equal to width 32 of actual constant.
WARNING: File "G:/karma/radix4/datapath.v" Line 48.  For instance dp/compmd/, width 16 of formal port in is not equal to width 8 of actual signal nmd.
WARNING: File "G:/karma/radix4/datapath.v" Line 49.  For instance dp/compmd/, width 16 of formal port out is not equal to width 8 of actual signal c2md.
WARNING: File "G:/karma/radix4/datapath.v" Line 60.  For instance dp/regacc/, width 16 of formal port in is not equal to width 8 of actual signal macc.
WARNING: File "G:/karma/radix4/datapath.v" Line 59.  For instance dp/regacc/, width 16 of formal port out is not equal to width 8 of actual signal acc.
WARNING: File "G:/karma/radix4/datapath.v" Line 61.  For instance dp/regmp/, width 16 of formal port in is not equal to width 8 of actual signal mmp.
WARNING: File "G:/karma/radix4/datapath.v" Line 62.  For instance dp/regmp/, width 16 of formal port out is not equal to width 8 of actual signal mp.
Time resolution is 1 ps
# onerror resume
# wave add /
# run 1000 ns
Simulator is doing circuit initialization process.
Finished circuit initialization process.