Integrate Common Inference Library, Optimize Memory Usage, and Enhance Display Configuration

RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/Board_HP-U85.clayer.yml

@@ -108,7 +108,6 @@ layer:
         - file: ext_init.c
         - file: profiler.c
         - file: profiler.h
-        - file: cxx_stubs.cpp
 
     - group: Ethos Interface
       files:

RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/Board_HP.clayer.yml

@@ -116,7 +116,6 @@ layer:
         - file: ext_init.c
         - file: profiler.c
         - file: profiler.h
-        - file: cxx_stubs.cpp
 
     - group: Ethos Interface
       files:

RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/RTE_Device.h

@@ -100,17 +100,17 @@
 // <i> Default: 0x1
 #define RTE_CPI_VFP_EN                                        0
 
-// <o> CPI number of active framebuffers
-// <i> Defines CPI number of active framebuffers
-// <i> Default: 2
-#define RTE_CPI_NUM_ACTIVE_FRAMEBUFFERS                       0
-
-// <o> Enable CPI streaming
-// <0=> Disable
-// <1=> Enable
-// <i> Default: 1
-#define RTE_CPI_STREAMING_ENABLE                              0
-
+// <o> CPI number of active framebuffers
+// <i> Defines CPI number of active framebuffers
+// <i> Default: 2
+#define RTE_CPI_NUM_ACTIVE_FRAMEBUFFERS                       0
+
+// <o> Enable CPI streaming
+// <0=> Disable
+// <1=> Enable
+// <i> Default: 1
+#define RTE_CPI_STREAMING_ENABLE                              0
+
 // <e> MT9M114 [Driver_MT9M114]
 // <o> Enable/Disable MT9M114 camera sensor
 //     <0=> disable
@@ -379,14 +379,14 @@
 //     <1=> enable
 // <i> defines if AE Module is enabled or not
 // <i> default: false
-#define RTE_ISP_AE_MODULE 1
+#define RTE_ISP_AE_MODULE 1
 
 // <o> ISP Enable BLS Module
 //     <0=> disable
 //     <1=> enable
 // <i> defines if Black Level Subtraction Module is enabled or not
 // <i> default: false
-#define RTE_ISP_BLS_MODULE 1
+#define RTE_ISP_BLS_MODULE 1
 
 // <o> ISP Enable DMSC Module
 //     <0=> disable
@@ -400,7 +400,7 @@
 //     <1=> enable
 // <i> defines if Noise/Sharpening-Filter Module is enabled or not
 // <i> default: false
-#define RTE_ISP_FLT_MODULE 1
+#define RTE_ISP_FLT_MODULE 1
 
 // <o> ISP Enable CCM Module
 //     <0=> disable
@@ -414,7 +414,7 @@
 //     <1=> enable
 // <i> defines if Color Space Conversion Module is enabled or not
 // <i> default: false
-#define RTE_ISP_CSM_MODULE 1
+#define RTE_ISP_CSM_MODULE 1
 
 // <o> ISP Enable WB Module
 //     <0=> disable
@@ -428,14 +428,14 @@
 //     <1=> enable
 // <i> defines if Auto-Exposure Statistics Module is enabled or not
 // <i> default: false
-#define RTE_ISP_EXPM_MODULE 1
+#define RTE_ISP_EXPM_MODULE 1
 
 // <o> ISP Enable Gamma-out Module
 //     <0=> disable
 //     <1=> enable
 // <i> defines if Gamma-out Module is enabled or not
 // <i> default: false
-#define RTE_ISP_GAMMAOUT_MODULE 1
+#define RTE_ISP_GAMMAOUT_MODULE 1
 
 // <o> ISP Enable WBM Module
 //     <0=> disable
@@ -449,7 +449,7 @@
 //     <1=> enable
 // <i> defines if Binning Module is enabled or not
 // <i> default: false
-#define RTE_ISP_BINNING_MODULE 1
+#define RTE_ISP_BINNING_MODULE 1
 
 // <o> ISP Enable Scaling Module
 //     <0=> disable
@@ -490,41 +490,41 @@
 // <i> Default: RGB888
 #define RTE_ISP_OUTPUT_FORMAT 32
 
-// <o> ISP Scaler Output Width
-// <i> Width in pixels of the ISP scaler output (after scaling from sensor dimensions).
-#define RTE_ISP_OUTPUT_WIDTH        480
-
-// <o> ISP Scaler Output Height
-// <i> Height in pixels of the ISP scaler output (after scaling from sensor dimensions).
-#define RTE_ISP_OUTPUT_HEIGHT       480
-
-// <o> ISP Sensor Input Width
-// <i> Width in pixels of the sensor input to the ISP pipeline.
-// <i> Default: MT9M114 sensor resolution (1280). Change for different sensors.
-#define RTE_ISP_SENSOR_INPUT_WIDTH  RTE_MT9M114_CAMERA_SENSOR_FRAME_WIDTH
-
-// <o> ISP Sensor Input Height
-// <i> Height in pixels of the sensor input to the ISP pipeline.
-// <i> Default: MT9M114 sensor resolution (720). Change for different sensors.
-#define RTE_ISP_SENSOR_INPUT_HEIGHT RTE_MT9M114_CAMERA_SENSOR_FRAME_HEIGHT
-
-// <o> ISP Crop Top offset <0-4095>
-// <i> Top offset in pixels for the cropped output window
-#define RTE_ISP_CROP_TOP    0
-
-// <o> ISP Crop Left offset <0-4095>
-// <i> Left offset in pixels for the cropped output window
-#define RTE_ISP_CROP_LEFT   0
-
-// <o> ISP Crop Width <1-4095>
-// <i> Width in pixels of the cropped output window.
-// <i> Default: full sensor input (no crop). Override with smaller value to crop.
-#define RTE_ISP_CROP_WIDTH  RTE_ISP_SENSOR_INPUT_WIDTH
-
-// <o> ISP Crop Height <1-4095>
-// <i> Height in pixels of the cropped output window.
-// <i> Default: full sensor input (no crop). Override with smaller value to crop.
-#define RTE_ISP_CROP_HEIGHT RTE_ISP_SENSOR_INPUT_HEIGHT
+// <o> ISP Scaler Output Width
+// <i> Width in pixels of the ISP scaler output (after scaling from sensor dimensions).
+#define RTE_ISP_OUTPUT_WIDTH        480
+
+// <o> ISP Scaler Output Height
+// <i> Height in pixels of the ISP scaler output (after scaling from sensor dimensions).
+#define RTE_ISP_OUTPUT_HEIGHT       480
+
+// <o> ISP Sensor Input Width
+// <i> Width in pixels of the sensor input to the ISP pipeline.
+// <i> Default: MT9M114 sensor resolution (1280). Change for different sensors.
+#define RTE_ISP_SENSOR_INPUT_WIDTH  RTE_MT9M114_CAMERA_SENSOR_FRAME_WIDTH
+
+// <o> ISP Sensor Input Height
+// <i> Height in pixels of the sensor input to the ISP pipeline.
+// <i> Default: MT9M114 sensor resolution (720). Change for different sensors.
+#define RTE_ISP_SENSOR_INPUT_HEIGHT RTE_MT9M114_CAMERA_SENSOR_FRAME_HEIGHT
+
+// <o> ISP Crop Top offset <0-4095>
+// <i> Top offset in pixels for the cropped output window
+#define RTE_ISP_CROP_TOP    0
+
+// <o> ISP Crop Left offset <0-4095>
+// <i> Left offset in pixels for the cropped output window
+#define RTE_ISP_CROP_LEFT   0
+
+// <o> ISP Crop Width <1-4095>
+// <i> Width in pixels of the cropped output window.
+// <i> Default: full sensor input (no crop). Override with smaller value to crop.
+#define RTE_ISP_CROP_WIDTH  RTE_ISP_SENSOR_INPUT_WIDTH
+
+// <o> ISP Crop Height <1-4095>
+// <i> Height in pixels of the cropped output window.
+// <i> Default: full sensor input (no crop). Override with smaller value to crop.
+#define RTE_ISP_CROP_HEIGHT RTE_ISP_SENSOR_INPUT_HEIGHT
 
 #endif
 // </e> ISP (ISP) [Driver_ISP]
@@ -534,18 +534,18 @@
 #define RTE_MIPI_CSI2 1
 #if RTE_MIPI_CSI2
 
-// <o> Select CSI2 DPHY backend
-//     <0=> CSI2 RX DPHY
-//     <1=> DSI TX DPHY used as RX
-// <i> Selects which DPHY hardware is used by Driver_MIPI_CSI2.
-// <i> Default: CSI2 RX DPHY
-#define RTE_MIPI_CSI2_DPHY_BACKEND          0
-
+// <o> Select CSI2 DPHY backend
+//     <0=> CSI2 RX DPHY
+//     <1=> DSI TX DPHY used as RX
+// <i> Selects which DPHY hardware is used by Driver_MIPI_CSI2.
+// <i> Default: CSI2 RX DPHY
+#define RTE_MIPI_CSI2_DPHY_BACKEND          0
+
 // <o> CSI pixel clock select
-//     <0=>  Select AXI clock source
-//     <1=>  Select PLL clock source
+//     <0=>  Select AXI clock source
+//     <1=>  Select PLL clock source
 // <i> Defines CSI pixel clock select
-// <i> Default: Select AXI clock source
+// <i> Default: Select AXI clock source
 #define RTE_CSI2_PIX_CLK_SEL                0
 
 // <o> select IPI mode
@@ -997,8 +997,7 @@
 //     <3=>   640x480_RGB565
 //     <4=>   320x240_RGB565
 //     <5=>   320x320_RGB565
-// <i> Default: 1
-#define RTE_MT9M114_CAMERA_SENSOR_MIPI_IMAGE_CONFIG            2
+#define RTE_MT9M114_CAMERA_SENSOR_MIPI_IMAGE_CONFIG            3
 
 // <o> select MT9M114 MIPI number of lanes in DPHY
 // <i> defines select MT9M114 MIPI number of lanes in DPHY.
@@ -1035,14 +1034,14 @@
 // <i> Default: 1
 #define RTE_MT9M114_CAMERA_SENSOR_MIPI_I2C_INSTANCE            1
 
-// <o> MT9M114 sensor frame width for ISP / CSI2 pipeline
-// <i> Width in pixels of the MT9M114 MIPI sensor frame
-#define RTE_MT9M114_CAMERA_SENSOR_FRAME_WIDTH  1280
-
-// <o> MT9M114 sensor frame height for ISP / CSI2 pipeline
-// <i> Height in pixels of the MT9M114 MIPI sensor frame
-#define RTE_MT9M114_CAMERA_SENSOR_FRAME_HEIGHT 720
-
+// <o> MT9M114 sensor frame width for ISP / CSI2 pipeline
+// <i> Width in pixels of the MT9M114 MIPI sensor frame
+#define RTE_MT9M114_CAMERA_SENSOR_FRAME_WIDTH  1280
+
+// <o> MT9M114 sensor frame height for ISP / CSI2 pipeline
+// <i> Height in pixels of the MT9M114 MIPI sensor frame
+#define RTE_MT9M114_CAMERA_SENSOR_FRAME_HEIGHT 720
+
 #endif
 // </e> MT9M114_MIPI [Driver_MT9M114_MIPI]
 
@@ -1258,11 +1257,11 @@
 // <i> Default: 1
 #define RTE_OV5675_CAMERA_SENSOR_I2C_INSTANCE            1
 
-// <o> Select camera sensor OV5675 CSI clock source division [Divisor] <2-511>
-// <i> Defines camera sensor OV5675 CSI clock source division
-// <i> Default: 20
-#define RTE_OV5675_CAMERA_SENSOR_MIPI_CSI_CLK_SCR_DIV    20
-
+// <o> Select camera sensor OV5675 CSI clock source division [Divisor] <2-511>
+// <i> Defines camera sensor OV5675 CSI clock source division
+// <i> Default: 20
+#define RTE_OV5675_CAMERA_SENSOR_MIPI_CSI_CLK_SCR_DIV    20
+
 #endif
 // </e> OV5675_MIPI [Driver_OV5675_MIPI]
 
@@ -1574,10 +1573,10 @@
 #define RTE_CDC200_IRQ_PRI        0
 
 // <o> CDC200 clock select
-//     <0=>  Select AXI clock source
-//     <1=>  Select PLL clock source
+//     <0=>  Select AXI clock source
+//     <1=>  Select PLL clock source
 // <i> Defines CDC200 clock select
-// <i> Default: Select AXI clock source
+// <i> Default: Select AXI clock source
 #define RTE_CDC200_CLK_SEL        0
 
 // <o> CDC200 background color red <0-255>
@@ -2531,7 +2530,7 @@
 //    <1=> Dual SPI FRF
 //    <2=> Quad SPI FRF
 //    <3=> Octal SPI FRF
-//    <4=> Dual Octal SPI FRF
+//    <4=> Dual Octal SPI FRF
 // <i> Defines OSPI0 Frame format
 // <i> Default: Octal SPI FRF
 #define RTE_OSPI0_SPI_FRAME_FORMAT                3
@@ -2640,7 +2639,7 @@
 //    <1=> Dual SPI FRF
 //    <2=> Quad SPI FRF
 //    <3=> Octal SPI FRF
-//    <4=> Dual Octal SPI FRF
+//    <4=> Dual Octal SPI FRF
 // <i> Defines OSPI0 Frame format
 // <i> Default: Octal SPI FRF
 #define RTE_OSPI1_SPI_FRAME_FORMAT                3
@@ -3646,7 +3645,7 @@
 //    <1=> ENABLE
 // <i> Defines Blocking mode support for UART4
 // <i> Default: DISABLE
-#define RTE_UART4_BLOCKING_MODE_ENABLE 1
+#define RTE_UART4_BLOCKING_MODE_ENABLE 1
 
 #endif  // UART4
 
@@ -9229,15 +9228,15 @@
 // <i> Default: 100
 #define RTE_CH201_RTC_CAL_PULSE_MS 100
 
-// <o> CH201 LPTIMER channel for Timeout trigger
-// <i> Defines LPTIMER's channel number for CH201 Timeout trigger
-//     <0=>   LPTIMER_CHANNEL_0
-//     <1=>   LPTIMER_CHANNEL_1
-//     <2=>   LPTIMER_CHANNEL_2
-//     <3=>   LPTIMER_CHANNEL_3
-// <i> Default: 1
-#define RTE_CH201_LPTIMER_CHANNEL  1
-
+// <o> CH201 LPTIMER channel for Timeout trigger
+// <i> Defines LPTIMER's channel number for CH201 Timeout trigger
+//     <0=>   LPTIMER_CHANNEL_0
+//     <1=>   LPTIMER_CHANNEL_1
+//     <2=>   LPTIMER_CHANNEL_2
+//     <3=>   LPTIMER_CHANNEL_3
+// <i> Default: 1
+#define RTE_CH201_LPTIMER_CHANNEL  1
+
 #endif
 //</e> CH201 (Time of Flight Sensor) [Driver_CH201]
 
@@ -10411,7 +10410,7 @@
 //    <1=> ENABLED
 // <i> Defines Bit Manipulation Control for GPIO13.
 // <i> Default: DISABLED
-#define RTE_GPIO13_BIT_MANIPULATION  0
+#define RTE_GPIO13_BIT_MANIPULATION  0
 
 // <o> GPIO13_PIN1 IRQ Priority
 // <i> Defines Interrupt priority for GPIO13_PIN1.

RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_ac6_mram.sct

@@ -106,7 +106,7 @@ LR_ROM __ROM_BASE NOCOMPRESS __ROM_SIZE  {    ; load region size_region
     /* ExecuTorch large buffers */
     * (.bss.input_data_sec)
     * (.bss.activation_buf_sram)
-
+    * (.bss.pp_buf)                        ; Used for pre and post processing
     /* Everything else */
     .ANY (+RW +ZI)
   }

RockPaperScissors/AppKit-E8_USB/Board/AppKit-E8_M55_HP/RTE/Device/AE822FA0E5597BS0_M55_HP/linker_gnu_mram.ld.src

@@ -172,6 +172,7 @@ SECTIONS
     *(.bss.lcd_frame_buf)                 /* LCD frame Buffer. */
     *(.bss.camera_frame_buf)              /* Camer Frame Buffer */
     *(.bss.camera_frame_bayer_to_rgb_buf) /* (Optional) Camera Frame Buffer for Bayer to RGB Conversion. */
+    *(.bss.pp_buf)
   } > SRAM0
 #endif
 

RockPaperScissors/AppKit-E8_USB/Board/Corstone-320/RTE/Device/SSE-320-FVP/ac6_linker_script.sct.src

@@ -81,7 +81,7 @@ LR_RAM0 __RAM0_BASE {
 
     ; NN Activation Tensor (activation buffer / tensor arena)
     *.o (*activation_buf)
-
+    *.o (*bss.pp_buf)
    .ANY (+RW +ZI)
   }
 #endif
@@ -103,7 +103,7 @@ LR_RAM0 __RAM0_BASE {
 LR_ROM2 __ROM2_BASE __ROM2_SIZE  {
   ER_ROM2 +0 __ROM2_SIZE {
     ; NN Model Binary Representation
-    *.o (nn_model)
+    *.o (network_model_sec)
 
    .ANY (+RO +XO)
   }

RockPaperScissors/AppKit-E8_USB/Board/Corstone-320/RTE/Device/SSE-320-FVP/gcc_linker_script.ld.src

@@ -320,6 +320,7 @@ SECTIONS
     . = ALIGN(32);
     *(*ethos_cache_buf)  /* Ethos-U Cache Area */
     *(*activation_buf)   /* NN Activation Tensor (activation buffer / tensor arena) */
+    *(*bss.pp_buf)
   } > RAM1
 
   /* Initialized buffers in fast access RAM */
@@ -331,7 +332,7 @@ SECTIONS
 
   .rom2 :
   {
-    *(*nn_model)         /* NN Model Binary Representation */
+    *(network_model_sec)         /* NN Model Binary Representation */
   } > ROM2
 
   .rom3 :

RockPaperScissors/AppKit-E8_USB/SDS.cbuild-mlops.yml

@@ -10,7 +10,7 @@ cbuild-mlops:
     ini: .cmsis/ensemble_vela.ini
     options: --accelerator-config ethos-u85-256 --system-config RTSS_HE_SRAM_MRAM --memory-mode Shared_Sram
   model:
-    clayer: ai_layer/ai_layer.clayer.yml
+    clayer: algorithm/ML/ai_layer/ai_layer.clayer.yml
     name: RPS
   hardware:
     active: AppKit-E8-U85@HIL