basic hv on !apple_sysregs_unlocked#604
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Signed-off-by: Yureka <yuka@yuka.dev>
Signed-off-by: Yureka <yuka@yuka.dev>
Signed-off-by: Yureka <yuka@yuka.dev>
Signed-off-by: Yureka <yuka@yuka.dev>
Signed-off-by: Yureka <yuka@yuka.dev>
Signed-off-by: Yureka <yuka@yuka.dev>
RVBAR (cpu_impl_reg+0) isn't writable on newer chips, so we can't set it to the guest entry, and there is no way the guest can choose a different secondary entry later on. Instead, return the guest entry on reads to make m1n1 happy, and use the initial guest entry as secondary entry. Signed-off-by: Yureka <yuka@yuka.dev>
This fixes use with the new pmgr on A18 Pro / M4 Pro. Signed-off-by: Yureka <yuka@yuka.dev>
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Tested @ 42b932b (+ #616 cherry-picked, needed for proxyclient on T8132) on a MacBook Pro 14" M4 — Mac16,1 / j604ap / T8132, stub macOS 26.2.
Install note for macOS 26.x testers: cpu_id_regs.py output (boot P-core, MIDR 0x611f0531)Happy to run more tests on this hardware. |
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Thanks, but none of the things you reported are related to the changes in this PR at all? |
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My bad. Better place to put it? On the forum maybe... Just new to contributing—trying to find my way. |
svenpeter42
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Jul 13, 2026
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Depends on #603 for detecting apple_sysregs_unlocked from the proxyclient
This gives working m1n1 in m1n1 hv on T8132, including starting the secondaries in the guest.