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PSCI via EFI #618

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PSCI via EFI #618

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6d5e578
main: Turn off all iodevs except for UART and dockchannel
svenpeter42 Jul 7, 2026
c3e42b6
ld: Align boundaries to 64KiB
svenpeter42 Jul 7, 2026
523d36e
smp: Allocate stacks statically inside .bss instead of using the heap
svenpeter42 Jul 7, 2026
8e4f101
psci: Add initial implementation for cpu start and suspend
svenpeter42 Jul 7, 2026
ad71585
adt.rs: Add ADTProperty.bytes
svenpeter42 Jul 7, 2026
42d81ec
efi: Add stub EFI runtime services to expose PSCI
svenpeter42 Jul 7, 2026
9f7d9bc
smp: Cache data from ADT
svenpeter42 Jul 8, 2026
d30913b
smp: Identify stack by MPIDR
svenpeter42 Jul 9, 2026
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1 change: 1 addition & 0 deletions Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -160,6 +160,7 @@ OBJECTS := \
pcie.o \
pmgr.o \
proxy.o \
psci.o \
ringbuffer.o \
rtkit.o \
sart.o \
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3 changes: 3 additions & 0 deletions config.h
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Expand Up @@ -26,6 +26,9 @@
// Switch the DFU USB-C port to debugusb
// #define USE_DEBUG_USB

// Enable debug printf inside PSCI code
#define PSCI_DEBUG

#ifdef RELEASE
# define FB_SILENT_MODE
# ifdef CHAINLOADING
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22 changes: 11 additions & 11 deletions m1n1-raw.ld
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Expand Up @@ -18,19 +18,19 @@ SECTIONS {
_base = .;

_text_start = .;
.init : ALIGN(0x4000) {
.init : ALIGN(0x10000) {
*(.init)
*(.init.*)
} :text
.text : ALIGN(0x4000) {
.text : ALIGN(0x10000) {
*(.text)
*(.text.*)
. = ALIGN(8);
*(.got.plt)
. = ALIGN(0x4000);
. = ALIGN(0x10000);
} :text
_text_size = . - _text_start;
.rodata : ALIGN(0x4000) {
.rodata : ALIGN(0x10000) {
*(.rodata)
*(.rodata.*)
. = ALIGN(8);
Expand All @@ -50,41 +50,41 @@ SECTIONS {
*(.rela.rodata*)
*(.rela.dyn)
_rela_end = .;
. = ALIGN(0x4000);
. = ALIGN(0x10000);
} :rodata
_rodata_end = .;
_data_start = .;
.data : ALIGN(0x4000) {
.data : ALIGN(0x10000) {
*(.data)
*(.data.*)
. = ALIGN(8);
_got_start = .;
*(.got)
_got_end = .;
. = ALIGN(0x4000);
. = ALIGN(0x10000);
_file_end = .;
} :data
.bss : ALIGN(0x4000) {
.bss : ALIGN(0x10000) {
_bss_start = .;
*(.bss)
*(.bss.*)
*(.dynbss)
*(COMMON)
_bss_end = .;
} : data
.stack_el3 : ALIGN(0x4000) {
.stack_el3 : ALIGN(0x10000) {
PROVIDE(_stack_top_el3 = .);
. += _stack_size_el3 - 8;
QUAD(0x5176694b43415453);
PROVIDE(_stack_bot_el3 = .);
}
.stack : ALIGN(0x4000) {
.stack : ALIGN(0x10000) {
PROVIDE(_stack_top = .);
. += _stack_size - 8;
QUAD(0x544f424b43415453);
PROVIDE(_stack_bot = .);
} :data
ASSERT(ALIGN(0x4000) == ., "Stack size is not aligned!")
ASSERT(ALIGN(0x10000) == ., "Stack size is not aligned!")
_data_size = . - _data_start;
_end = .;
_payload_start = .;
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10 changes: 10 additions & 0 deletions m1n1.conf.example
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Expand Up @@ -25,3 +25,13 @@
# - gofetch: Mitigate the GoFetch vulnerability (disable the DMP systemwide)
# Affected CPUs: M1 and M2 series (M3 and later are unaffected)
#mitigations=gofetch

# PSCI modes
# Available options:
# - off: Use spin-table for CPU bringup and leave sleep states to OS
# - direct: Expose PSCI-via-EFI for CPU bringup and sleep states and expose
# a minimal EFI implementation with EFI runtime services to the
# OS. This mode is only meant for development when chainloading
# the OS kernel directly and will break when another second stage
# loader like e.g. u-boot is used.
#psci=off
24 changes: 12 additions & 12 deletions m1n1.ld
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Expand Up @@ -119,23 +119,23 @@ SECTIONS {

_cmd_end = .;

. = ALIGN(0x4000);
. = ALIGN(0x10000);
_hdr_end = .;
} :hdr
_text_start = .;
.init : ALIGN(0x4000) {
.init : ALIGN(0x10000) {
*(.init)
*(.init.*)
} :text
.text : ALIGN(0x4000) {
.text : ALIGN(0x10000) {
*(.text)
*(.text.*)
. = ALIGN(8);
*(.got.plt)
. = ALIGN(0x4000);
. = ALIGN(0x10000);
} :text
_text_size = . - _text_start;
.rodata : ALIGN(0x4000) {
.rodata : ALIGN(0x10000) {
*(.rodata)
*(.rodata.*)
. = ALIGN(8);
Expand All @@ -155,36 +155,36 @@ SECTIONS {
*(.rela.rodata*)
*(.rela.dyn)
_rela_end = .;
. = ALIGN(0x4000);
. = ALIGN(0x10000);
} :rodata
_rodata_end = .;
_data_start = .;
.data : ALIGN(0x4000) {
.data : ALIGN(0x10000) {
*(.data)
*(.data.*)
. = ALIGN(8);
_got_start = .;
*(.got)
_got_end = .;
. = ALIGN(0x4000);
. = ALIGN(0x10000);
_file_end = .;
} :data
.bss : ALIGN(0x4000) {
.bss : ALIGN(0x10000) {
_bss_start = .;
*(.bss)
*(.bss.*)
*(.dynbss)
*(COMMON)
. = ALIGN(0x4000);
. = ALIGN(0x10000);
_bss_end = .;
PROVIDE(_stack_top_el3 = .);
. += _stack_size_el3;
PROVIDE(_stack_bot_el3 = .);
. = ALIGN(0x4000);
. = ALIGN(0x10000);
PROVIDE(_stack_top = .);
. += _stack_size;
PROVIDE(_stack_bot = .);
. = ALIGN(0x4000);
. = ALIGN(0x10000);
} :data
_data_size = . - _data_start;
_end = .;
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6 changes: 6 additions & 0 deletions rust/src/adt.rs
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Expand Up @@ -707,6 +707,12 @@ impl ADTProperty {

Ok(u64::from_ne_bytes(self.value[..8].try_into().unwrap()))
}

pub fn bytes(&self) -> &[u8] {
// SAFETY: The value is self.size bytes long and we never reach this code if we
// aren't already certain that we are a valid property
unsafe { core::slice::from_raw_parts(self.value.as_ptr(), self.size as usize) }
}
}

extern "C" {
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