This project holds the firmware designs for RFSoC based Many-In-Many-Output (MIMO) control applications, featuring:
- Supports 3 hardware platforms:
- AMD ZCU208: with
xczu48dr-2fsvg1517e - LBL LBL208: with
xczu47dr-1fsvg1517e - AMD ZCU216: with
xczu29dr-2ffvf1760e
- AMD ZCU208: with
- Low phase noise sampling clock from external reference:
- ADC/DAC sampling frequencies can be generated by an external reference:
- CLK0 of LMK04828 on CLK104 board at J11, through LMK PLL chips (jitter cleaner)
- CLK1 of LMK04828, bypassing LMK PLL loops with optimal phase jitter
- Phase noise characterizaiton and optimizations
- ADC/DAC sampling frequencies can be generated by an external reference:
- Multi-Tile Synchronization (MTS):
- All available ADC/DAC channels are enabled with MTS
- RF mixers with aligned digital NCO phase:
- All digital up/down mixers are enabled with aligned NCO phase with respect to SYSREF clock
- Deterministic Latency
- Power-cycle deterministic latency on top of MTS
- MRF EVR interface
- Optional MRF timing interface and event receiver, to provide trigger and timestamps for user applications
- Power-cycle deterministic latency
- Self reconfiguration of timing link after loss of signals
- DDR4 PL RAM for long term data acquisition
- Triggered arbitrary waveform generation
- Synchronous ADC waveform capturing
- Chassis and peripheral support
- LBNL ALS Linac and Buncher digital Low-Level RF control system
This work was presented as in the Low Level 2025 Radio Frequency Workshop, October 2025, Newport News, VA, USA.
-
Download board image from pynq.io,
ZCU208-3.0.1.img. Unzip and getzcu208_v3.0.1.img. -
Flash SD card:
sudo umount /dev/sdb1 sudo dd bs=4M if=zcu208_v3.0.1.img of=/dev/sdb status=progress
See details.
-
Boot. Prepare environment on the board:
SSH into the Linux:
ssh xilinx@192.168.2.99
Clone the repository into the
/home/xilinx/jupyter_notebooksdirectory, then run install script:cd ~/jupyter_notebooks git clone --recursive https://github.com/BerkeleyLab/LBNL-DSLLRF.git dsllrf cd dsllrf ./install.sh
LBNL has an updated version of CLK104 board, which requires a device tree update by this step:
sudo cp mimo_mts/boot.py /boot/
-
Prepare Overlay:
-
Synthesize overlay image on a computer with Vivado 2022.1 installed. Clone this repo and:
git clone --recursive https://github.com/BerkeleyLab/LBNL-DSLLRF.git dsllrf cd dsllrf/designs/<board>/<design> make
where:
<board>is one of[zcu208, lbl208, zcu216]<design>is one of the available directory names likemimo_mts.
Copy over the overlay files (both bitstream file and hardware descripton file) on the SD card:
scp _xilinx/mimo_mts.{bit,hwh} xilinx@192.168.2.99:~/jupyter_notebooks/pynq_llrf/mimo_mts/overlays/ -
Alternatively, download the CI generated overlay from GitLab artifacts. This option is not available on github.
-
-
[Optional] Change hostname and/or IP address. ssh on the board, then:
-
Change hostname
sudo -E pynq_hostname.sh lbl208
-
Change static IP address. Update
192.168.2.99in/etc/network/interfaces.d/eth0.
-
Connect a 500MHz, 0dBm clock to CLK104 J11. Connect SSMP cables for ADC/DAC sampling clocks.
-
Run:
-
For testing, run jupyter notebooks in
doc/, see details. -
For production, run EPICS IOC:
MIMOorLLRFIOC on 3 supported RFSoC boards are available.sudo -E <app>-<board>-ioc
where:
<app>is one of[mimo, llrf].<board>is one of[zcu208, lbl208, zcu216].
For example, for LLRF application running on LBL208 board,
sudo -E llrf-lbl208-ioc
-
Once the IOC is running, the PVs below are available to read or write. Please replace
the prefix $P with ALS_LLRF_LBL208:pmbus.
The PVs below are read-only and return sensor readings from the M-CRPS enabled power supply. They are listed here with their nominal values:
$P:psu_vout: power-supply DC output voltage: 12.1 V$P:psu_vin: power-supply AC input voltage: 122.0 V$P:psu_iout: power-supply DC output current: 2.3 A$P:psu_iin: power-supply AC input current: 0.3 A$P:psu_pout: power-supply output power: 28.6 W$P:psu_pin: power-supply input power: 35.5 W$P:psu_temperature_{1,2}: temperature within the power-supply: 24.0 °C$P:psu_fan_speed_1: speed of the fan inside the power-supply: 4480 rpm$P:psu_status: The 16 bit status word of the power-supply. Bit definitions.
There are 2 chassis fans which can be speed-controlled with the following PVs:
$P:chassis_fan_speed_{1,2}:RBV: measured speed of the 2 chassis fans in [rpm]$P:chassis_fan_speed_{1,2}: set-point of the 2 chassis fans in [rpm]
If you use this design in your research or projects, please cite our papers.