Extend coverage of aarch64 lifter, including SIMD - #1546

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pekapikelet wants to merge 175 commits into

BinaryAnalysisPlatform:masterfrom

UQ-PAC:aarch64-pull-request-2

Commits on Feb 4, 2022

Commits on Feb 8, 2022

organise instructions into categories
pekapikelet
committed
98b94c7
move ADRP to integer arithmetic category
pekapikelet
committed
7abc695
remove private access from arm-bits functions
pekapikelet
committed
5d42b6d
Added stur instructions and fixed bug in `condition-holds` macro

Tom Malcolm
authored and
Tom Malcolm
committed
7d6df06
Bug fixes for STUR insns

Tom Malcolm
authored and
Tom Malcolm
committed
3286a9d
Merge pull request #2 from UQ-PAC/stur-instructions
Thomas-Malcolm
authored
6bb8453

Commits on Feb 9, 2022

condense repeated definitions into macros
pekapikelet
committed
42b9e44
Merge branch 'implement-missing-aarch64-insns' of https://github.com/UQ-PAC/bap into implement-missing-aarch64-insns
pekapikelet
committed
e565ccb
implement TBZ and TBNZ
pekapikelet
committed
be91fcd
separated into files
pekapikelet
committed
2e379ca
Merge pull request #3 from UQ-PAC/insn-cleanup
Thomas-Malcolm
authored
2fb075f
rename aarch64 files and make aarch64-helper
pekapikelet
committed
522bb94

Commits on Mar 28, 2022

add some processor state instructions
pekapikelet
committed
6d133e5

Commits on Apr 4, 2022

fix typo in pstate instructions
pekapikelet
committed
e3a7da8
implement rotate-left
pekapikelet
committed
f4fb588
add missing documentation and rename for clarity
pekapikelet
committed
7bd7dbb

Commits on Apr 5, 2022

Merge branch 'master' into implement-missing-aarch64-insns
pekapikelet
authored
85f8648

Commits on Apr 11, 2022

Commits on Apr 12, 2022

fix typos in CAS instruction code
pekapikelet
committed
381d627
Merge branch 'BinaryAnalysisPlatform:master' into implement-missing-aarch64-insns
pekapikelet
authored
0ff0df2
Merge branch 'implement-missing-aarch64-insns' of https://github.com/UQ-PAC/bap into implement-missing-aarch64-insns
pekapikelet
committed
fa75ba9
fix CFINV, RMIF, SETF8 and SETF16 using #1461
pekapikelet
committed
ed080e3
Added instructions ANDS, ASRV, BIC to aarch64-logical.lisp
kaitlyn-lake
committed
d8b71af
Merge branch 'implement-missing-aarch64-insns' of https://github.com/UQ-PAC/bap into implement-missing-aarch64-insns
kaitlyn-lake
committed
7947937
use clz instead of loop for highest-set-bit
pekapikelet
committed
108f4c7
miscellaneous changes to helper functions
pekapikelet
committed
20bec8d
update barrier code to use symbol-concat (#1452)
pekapikelet
committed
647a9e4
fix CAS and friends for X registers
pekapikelet
committed
dbaf536
generalise CAS to W or X registers
pekapikelet
committed
d0016c4
generalise CAS and friends to 8-bit and 16-bit
pekapikelet
committed
1dd5ed4
rename CAS parameter names
pekapikelet
committed
e5be8cb
fixes the cast-signed Primus Lisp primitive
ivg
committed
ca14999
Merge remote-tracking branch 'UQ-PAC/implement-missing-aarch64-insns' into tests-1458
ivg
committed
a25ceb2
fixes the arithmetic modulus in Primus Lisp primitives
ivg
committed
05efc67
adds arbitrary-precision loopless clz and popcount in Primus Lisp
ivg
committed
9ce1406
Merge branch 'arbitrary-precision-clz' into tests-1458
ivg
committed
ce83a22
Merge branch 'fixes-bitvector-arithmetic' into tests-1458
ivg
committed
84ab310
uses clz instead of clz64 and properly casts the operand
ivg
committed
4e5cd71
Merge remote-tracking branch 'upstream/master' into tests-1458
ivg
committed
6011aa7

Commits on Apr 20, 2022

Merge pull request #4 from ivg/tests-1458
pekapikelet
authored
73cee18
use fixed cast-signed primitive from #1462
pekapikelet
committed
c642d9b
fix bitmask decoding of W registers
pekapikelet
committed
c5a8a64

Commits on Apr 22, 2022

Merge branch 'implement-missing-aarch64-insns' of https://github.com/UQ-PAC/bap into implement-missing-aarch64-insns
kaitlyn-lake
committed
cfb9336

Commits on Apr 25, 2022

Created helper set-nzcv-after-logic-op to arm-bits, implemented REV in aarch64-logical, created helper reverse-bye-order, added docs
kaitlyn-lake
committed
d6301c9

Commits on May 3, 2022

Implemented REV instructionin logical.lisp. Created reverse-byte-order helped in helper.lisp
kaitlyn-lake
committed
63c61c0

Commits on May 10, 2022

Added documentation to reverse-byte-order and REV functions, there may be an issue with their encoding
kaitlyn-lake
committed
1de8205

Commits on May 23, 2022

fix and finish non-vector REV instructions
pekapikelet
committed
642d53b

Commits on Jun 14, 2022

Added INSvi32gpr + INSvi32lane + helpers. Added pseudocode for LD2T
kaitlyn-lake
committed
af6fef5

Commits on Jun 20, 2022

Commits on Jun 24, 2022

Commits on Jun 27, 2022

Commits on Jun 28, 2022

Fix improper usage of intrinsic primitive
pekapikelet
committed
8e9f878
Add STUR(D|Q)i
ailrst
committed
4bf7769
add STPQi STPWi, fix STPXi
ailrst
committed
aad5267
add STRBBpost and STRBBroX
ailrst
committed
453493c

Commits on Jun 29, 2022

Implemented multiple gpr & vector register load instructions
kaitlyn-lake
committed
ee61345
Implement CASPX and helpers for W and X pairs
pekapikelet
committed
eb4e523
Generalise CASP over W and X registers
pekapikelet
committed
08e9bd4
Implement CASP family with acquire and release
pekapikelet
committed
b163841
Merge pull request #7 from UQ-PAC/implement-CASP-instructions
pekapikelet
authored
7a6db18
implement STR*post STR*roX
ailrst
committed
ee0ccf8
implement STRHHui
ailrst
committed
1ffed99

Commits on Jun 30, 2022

add STR*ui
ailrst
committed
3080c0e
Add STUR(D|Q)i
ailrst
committed
b5a567c
add STPQi STPWi, fix STPXi
ailrst
committed
c353e32
add STRBBpost and STRBBroX
ailrst
committed
f54a253
implement STR*post STR*roX
ailrst
committed
1a16368
implement STRHHui
ailrst
committed
2e7f74e
add STR*ui
ailrst
committed
52c5a9c
Merge branch 'implement-SIMD-store-insns' of github.com:UQ-PAC/bap into implement-SIMD-store-insns
ailrst
committed
b919f0f
generalise STP for reg sizes
ailrst
committed
a10c1de

Commits on Jul 1, 2022

generalise STR and add STR.roW
ailrst
committed
dc13820
fix STP 2nd reg ofset
ailrst
committed
6c818f8
fix STRHHui offset
ailrst
committed
4f3d4b0

Commits on Jul 4, 2022

Merge pull request #9 from UQ-PAC/implement-SIMD-store-insns
pekapikelet
authored
4d13d29

Commits on Jul 5, 2022

Commits on Jul 6, 2022

change tabs to spaces
pekapikelet
committed
5675ca0
Merge branch 'aarch64-pull-request-2' into implement-LD-insns
pekapikelet
authored
c9fd8f2
Merge pull request #11 from UQ-PAC/implement-LD-insns
pekapikelet
authored
bada81b

Commits on Jul 7, 2022

Commits on Jul 8, 2022

Merge pull request #12 from UQ-PAC/implement-MOVI
ailrst
authored
256674e
SUBS
ailrst
committed
46c82b3
add LSL,LSR,ROR
ailrst
committed
25bbb56
fix SUB
ailrst
committed
88901f4
add UMADDL
ailrst
committed
6e32781
add pre variant of STR and STRB
ailrst
committed
94a1a8c
Merge pull request #13 from UQ-PAC/implement-LD-insns
pekapikelet
authored
5d08c2a
fix LDRBBpre
ailrst
committed
fe6c45a
add UMULH
ailrst
committed
f7f2c1d
add LDR pre+post variants
ailrst
committed
b8755e1
add missing LDP,LDRH,LDR variants
ailrst
committed
ba8ade0
Merge pull request #14 from UQ-PAC/fix-init-empty-bin-missing
ailrst
authored
40c9893

Commits on Jul 11, 2022

Use extract and concat approach for REVn*r insns
pekapikelet
committed
98c3ac4
Merge branch 'aarch64-pull-request-2' of https://github.com/UQ-PAC/bap into aarch64-pull-request-2
pekapikelet
committed
e6de3da
add BRK
ailrst
committed
d767f7a

Commits on Jul 12, 2022

implement vector addition instructions
pekapikelet
committed
45522d2
remove double LSL/LSR implementation
ailrst
committed
f19cf45
add generic vector-binop function, SUB and MUL
pekapikelet
committed
2446001
make bitvec-to-symbol total
ailrst
committed
d23ed69
implement EXTR
ailrst
committed
acd3bf4
add EXTv
ailrst
committed
8b2a6f1
implement AND, EOR, NOT, ORR, ORN (vector)
pekapikelet
committed
403499a
Merge pull request #16 from UQ-PAC/add-arithmetic-logical-vector-cntlm
pekapikelet
authored
2076553
Merge pull request #15 from UQ-PAC/add-missing-misc
ailrst
authored
474f916
Merged Adriel's changes to LD2, added more missing LD instruction versions from the cntlm list
kaitlyn-lake
committed
93d759d
temporary commit
kaitlyn-lake
committed
e9fc8a5

Commits on Jul 13, 2022

fix lognot
ailrst
committed
060a467
add SMADDL
ailrst
committed
eb41ed2
fix lognot Merge pull request #17 from UQ-PAC/add-missing-empty-bin
ailrst
authored
3a9e416

Commits on Jul 15, 2022

Commits on Jul 20, 2022

Implemented all LD (multiple structres), LD (single structures), LD.R. Modified de-interleaving insertion algorithm to accomodate up to 4 selems and variable rpt (see ARMv8 ISA LD1 (multiple struct…
kaitlyn-lake
committed
0038b07
fix lognot
ailrst
committed
9e4c2a6
add SMADDL
ailrst
committed
4a64053
add LDURHH,LDURSB,LDURSH,LDURSW
ailrst
committed
e5dac86
redo brk
ailrst
committed
a6e5d61
add UMSUBL
ailrst
committed
a4247fa
add SMSUBL
ailrst
committed
ec0fa99
add RBIT
ailrst
committed
6bf46bd
make RBIT bil better
ailrst
committed
5ff9426
Merge branch 'aarch64-pull-request-2' into add-missing-empty-bin
ailrst
authored
4ca0f1c
Merge pull request #19 from UQ-PAC/add-missing-empty-bin
ailrst
authored
1cb9933
Merge pull request #20 from UQ-PAC/implement-LD-insns
pekapikelet
authored
7d8e630

Commits on Jul 23, 2022

extract simd instructions into package
pekapikelet
committed
721917a

Commits on Jul 25, 2022

limit comment length
pekapikelet
committed
1f5d65a

Commits on Jul 27, 2022

Commits on Jul 28, 2022

use nth-reg-in-group in CASPord* except concat
pekapikelet
committed
e5cf036

Commits on Jul 29, 2022

Fix bug in REVnWr implementation
pekapikelet
committed
328914e
fix comment length and LLVM code for BIC
pekapikelet
committed
3a007ab

Commits on Aug 1, 2022

Implemented all SIMD load instructions
kaitlyn-lake
committed
92c68b0
Merged aarch64-pull-request-2 to implement-LD-insns
kaitlyn-lake
committed
82a4262

Commits on Aug 2, 2022

Fixed intrinsic usage in LDNP
kaitlyn-lake
committed
cdaf4fc
Minor comment changes
kaitlyn-lake
committed
be36805

Commits on Aug 3, 2022

Merge branch 'master' into aarch64-pull-request-2
pekapikelet
authored
3250199

Commits on Aug 12, 2022

add ADC instruction & setup repo
ndrwbrwn
committed
a1f0852
fix flag behaviour with adc/adcs
ndrwbrwn
committed
feb8dc1
switch macros
ndrwbrwn
committed
3b7b928
add sbc and sbcs
ndrwbrwn
committed
666d9b5
switch SBCS to clear-base as SUBS, use "-" with SBC
ndrwbrwn
committed
851d126
fix brackets
ndrwbrwn
committed
d1a25f3
switch off clear-base
ndrwbrwn
committed
7ede5a8
fixes
ndrwbrwn
committed
4091cfd

Commits on Aug 19, 2022

add SUBSWrx and finish SBC, SBCS, ADC, ADCS
ndrwbrwn
committed
e8d35c9

Commits on Sep 9, 2022

added CLZXr and CLZWr
ndrwbrwn
committed
abb7f40

Commits on Nov 22, 2022

Merge arithmetic-pr into aarch64-pull-request-2
ndrwbrwn
committed
acfdc10