This is a project by Faculty of Engineering, Cairo University Students in Programming Techniques course. Where we made a logic simulator with GUI which could put logic gates, cppy and paste them, label them, check for their correctness, generate truth tables and probe certain wires. We could also save and load different circuits. We used CMU graphics library in the project.
Mr-Sheerlock/Logic-Simulator
Folders and files
| Name | Name | Last commit date | ||
|---|---|---|---|---|