fix(trt): replace STRONGLY_TYPED with BuilderFlag.FP8/INT8 to restore throughput#56
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ivanbasov wants to merge 5 commits into
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fix(trt): replace STRONGLY_TYPED with BuilderFlag.FP8/INT8 to restore throughput#56ivanbasov wants to merge 5 commits into
ivanbasov wants to merge 5 commits into
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…fault torch.compile=on combined with DataLoader spawn workers during LER validation causes a segfault (20 leaked semaphores, core dumped). Set PREDECODER_TORCH_COMPILE=0 for the Train all orientations step. Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
…vent segfault" This reverts commit 7f0f6c8.
… throughput STRONGLY_TYPED + Conv-only FP8 QDQ nodes (introduced in d7b8217/993e797) caused a ~25-35% throughput regression (66 µs → 90 µs at d=13, T=104). Under STRONGLY_TYPED TRT must honour every explicit FP16↔FP8 cast boundary inserted by modelopt around Conv layers, which: - prevents Conv+BN+ReLU fusion across layer boundaries - adds ~7-11 extra cast kernels per forward pass (one pair per Conv layer) - each cast touches the full (B×C×T×D×D) activation tensor Fix: remove STRONGLY_TYPED from net_flags; replace with BuilderFlag.FP8/INT8. QDQ nodes now act as calibration hints rather than hard type constraints, restoring TRT's freedom to fuse across precision boundaries. FP16 is always set as fallback precision for all paths. Add TestTrtBuilderPrecisionFlags in test_tensorrt_fallback.py: - source-code grep guard: asserts STRONGLY_TYPED is never OR'd into net_flags - mock-based tests: fp8→FP8+FP16, int8→INT8+FP16, unquantized→FP16 only - net_flags bit tests: STRONGLY_TYPED bit absent for both fp8 and int8 Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
Add background, fix rationale, and tradeoff note to the inline comment so reviewers and future readers understand why STRONGLY_TYPED is absent and what to check when verifying the fix (layer precision log). Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
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We tried this out, and I don't think it helped, so I am closing this for now. We can reopen if necessary. |
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Summary
d7b8217(Ising-Decoding, squash-merged as993e797here) addedSTRONGLY_TYPEDto TRT network flags alongside Conv-only FP8 QDQ nodes, causing a ~25–35% throughput regression (66 µs → 90 µs at d=13, T=104).STRONGLY_TYPED, TRT enforces every FP16↔FP8 cast boundary inserted by modelopt around Conv layers — preventing Conv+BN+ReLU fusion and adding ~7–11 extra cast kernels per forward pass, each touching the full activation tensor.STRONGLY_TYPEDfromnet_flags; useBuilderFlag.FP8/BuilderFlag.INT8instead. QDQ nodes become calibration hints (TRT still selects FP8 kernels for Conv), but TRT is free to fuse across layer boundaries.BuilderFlag.FP16is always enabled as fallback precision.Note: PR #52 (fix export of fp8 ONNX files) addressed a different bug (calibration data dtype) and did not fix this regression.
Changes
code/evaluation/logical_error_rate.py: removeSTRONGLY_TYPEDbit; addBuilderFlag.FP8/INT8/FP16per quant path with explanatory commentcode/tests/test_tensorrt_fallback.py: addTestTrtBuilderPrecisionFlags(6 tests)STRONGLY_TYPEDis never OR'd intonet_flagsSTRONGLY_TYPEDabsent for fp8 and int8Test plan
test_tensorrt_fallback.pypass (verified locally)ONNX_WORKFLOW=2 QUANT_FORMAT=fp8) and benchmark latency — target ≤ 66 µs[LER] TensorRT engine layer precisions:log — expect higher FP8 layer count vs pre-fix🤖 Generated with Claude Code