[https://nvbugs/6070878][fix] Skip gemma3 fp8 test only on L40S

[brb-nv]

Description

Currently, this test is waives across all archs. This MR waives only on the problem arch L40S - this is considered low-priority for now. So, not fixing it.

Test Coverage

pytest -vs accuracy/test_llm_api_pytorch.py::TestGemma3_1BInstruct::test_fp8_prequantized

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Summary by CodeRabbit

• Tests
  • Updated test skip configurations for GPU compatibility scenarios to ensure proper test execution across different hardware configurations.

[coderabbitai]

📝 Walkthrough

Walkthrough

Updated skip selectors in the test waives list for TestGemma3_1BInstruct::test_fp8_prequantized tests by adding the full:sm89/ prefix to both torch_compile configurations, maintaining the same SKIP URL reference.

Changes

Cohort / File(s)	Summary
Test Skip List tests/integration/test_lists/waives.txt	Added full:sm89/ prefix to skip selectors for TestGemma3_1BInstruct::test_fp8_prequantized with torch_compile=False and torch_compile=True; SKIP URL remains unchanged at https://nvbugs/6070878.

Estimated code review effort

🎯 1 (Trivial) | ⏱️ ~2 minutes

🚥 Pre-merge checks | ✅ 2 | ❌ 1

❌ Failed checks (1 inconclusive)

Check name	Status	Explanation	Resolution
Description check	❓ Inconclusive	The PR description explains the change (narrowing test waiver to L40S only) and provides test coverage command, but the title is missing the required format and some context is unclear.	Add a properly formatted PR title following [JIRA ticket/NVBugs ID/GitHub issue/None][type] Summary pattern. Clarify what 'arch L40S' means and why this architecture is problematic.

✅ Passed checks (2 passed)

Check name	Status	Explanation
Title check	✅ Passed	The title clearly and concisely describes the main change: narrowing a test waiver to a specific architecture (L40S) for the Gemma3 FP8 test.
Docstring Coverage	✅ Passed	No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.

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✨ Finishing Touches

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[brb-nv]

/bot run --disable-fail-fast

[tensorrt-cicd]

PR_Github #43118 [ run ] triggered by Bot. Commit: e8e411d Link to invocation

[tensorrt-cicd]

PR_Github #43118 [ run ] completed with state FAILURE. Commit: e8e411d
/LLM/main/L0_MergeRequest_PR pipeline #33752 completed with status: 'FAILURE'

CI Report

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[brb-nv]

/bot run --disable-fail-fast

[tensorrt-cicd]

PR_Github #43262 [ run ] triggered by Bot. Commit: 8118775 Link to invocation

[tensorrt-cicd]

PR_Github #43262 [ run ] completed with state SUCCESS. Commit: 8118775
/LLM/main/L0_MergeRequest_PR pipeline #33815 completed with status: 'FAILURE'

CI Report

⚠️ Action Required:

• Please check the failed tests and fix your PR
• If you cannot view the failures, ask the CI triggerer to share details
• Once fixed, request an NVIDIA team member to trigger CI again

Link to invocation