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Mattia Barbanera edited this page Apr 29, 2022 · 2 revisions

Welcome to the msdintf wiki! This repository contains the FPGA gateware to readout the microstrip detector of the FOOT experiment. The following figure shows the block-diagram of the MSD-interface architecture.

MSD Block Diagram

The MSD detector uses the following Front-Ends and ADCs models:

  • FE: IDEAS IDE1140, 64-channel silicon-strip readout with analog mux output
  • ADC: Analog Devices AD7276, 3-Msps 12-Bit ADC with serial digital readout

The whole architecture is based on the Terasic DE10-Nano board, which embeds an Intel Cyclone V SoC (FPGA+HPS). This should limit the use with Intel FPGA only for specific basic elements, e.g. FIFOs.

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