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fix: dest register for ins instruction #250

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eigmax merged 2 commits into from
Apr 10, 2025
Merged

fix: dest register for ins instruction #250

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ca478bf
fix: dest register for ins instruction
weilzkm Apr 9, 2025
b966b73
Ofix fmt
weilzkm Apr 9, 2025
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8 changes: 6 additions & 2 deletions emulator/src/state.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -1091,10 +1091,14 @@ impl InstrumentedState {
let mut rs = self.state.registers[((insn >> 21) & 0x1f) as usize];
let mut rd_reg = rt_reg;
let fun = insn & 0x3f;
if opcode == 0 || opcode == 0x1c || (opcode == 0x1F && (fun == 0x20 || fun == 4)) {
// R-type (stores rd), partial Special3 insts: ins, seb, seh, wsbh
if opcode == 0 || opcode == 0x1c || (opcode == 0x1F && fun == 0x20) {
// R-type (stores rd), partial Special3 insts: seb, seh, wsbh
rt = self.state.registers[rt_reg as usize];
rd_reg = (insn >> 11) & 0x1f;
} else if opcode == 0x1F && fun == 0x4 {
// ins read/write rt
rt = self.state.registers[rt_reg as usize];
rd_reg = rt_reg;
} else if opcode < 0x20 {
// rt is SignExtImm
// don't sign extend for andi, ori, xori
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