mali-bifrost: use devicetree platform instead of meson#2366
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aenertia wants to merge 1 commit intoROCKNIX:nextfrom
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mali-bifrost: use devicetree platform instead of meson#2366aenertia wants to merge 1 commit intoROCKNIX:nextfrom
aenertia wants to merge 1 commit intoROCKNIX:nextfrom
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Contributor
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did you test this on rk3326? |
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probably handled by the end of this patch: projects/ROCKNIX/devices/RK3326/patches/mali-bifrost/003-midgard-refactor-power-init-and-fixed-unbalanced-run.patch The start of that patch still is needed on for new mali_kbase on rocknix, due to horrors in dmesg. |
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yeah it's just spamming without this due to the s922x fallthrough |
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tested on both 3326 and 3566 - although the 3326 wasn't completely clean as it was for my cheapo xf40h which needs ... extra things |
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I'll test on S922X |
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S922X libmali is totally broken, many errors in |
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Oh fun. I'll take another look after work today - and see if I can root cause this; otherwise adding a device case is probably the minimal fix. |
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Since s922x is the actual meson platform I don't see why we shouldn't use it there. The other main issue on RK is that the kernel oppsies on suspend/resume, on 6.12 and r51 mali_kbase this was worked around with this patch: https://github.com/ROCKNIX/distribution/blob/next/projects/ROCKNIX/devices/RK3326/patches/mali-bifrost/003-midgard-refactor-power-init-and-fixed-unbalanced-run.patch Specifically the first part patching I tried to blindly port this to r54 that we now use on 6.18, but it freezes on boot. So some more work would be need figuring out the the suspend oppsies. |
Switch CONFIG_MALI_PLATFORM_NAME to devicetree for Rockchip devices (RK3326, RK3566, RK3588) to resolve GPU clock management issues during runtime PM cycles. The meson backend calls clk_disable_unprepare() on suspend without matching clk_prepare_enable() on resume, leaving GPU clocks unprepared when power domains re-enable them. The devicetree backend leverages standard power domain and clock frameworks, coordinating properly with kernel power domain drivers. S922X retains the meson backend — it is an actual Amlogic Meson SoC and requires the meson platform for correct GPU initialization. Switching it to devicetree causes AS_ACTIVE bit stuck errors, page table flush failures, and repeated GPU resets (fault 0x4002). Tested on RK3326, RK3566. S922X regression confirmed and resolved by preserving meson backend for that device only.
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@porschemad911 when you get a chance can you test again. |
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CI run for updates here: https://github.com/aenertia/distribution/actions/runs/22615268594 |
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Switch CONFIG_MALI_PLATFORM_NAME from meson to devicetree. The meson platform backend calls clk_disable_unprepare() during runtime PM suspend without a matching clk_prepare_enable() on resume. On Rockchip SoCs (RK3566, RK3326), this leaves GPU clocks unprepared when the power domain re-enables them, triggering repeated warnings:
WARNING: Enabling unprepared clk 'gpu'
rockchip-pm-domain: failed to enable clocks
The devicetree platform backend uses the standard DT power domain and clock framework correctly, coordinating with the kernel power domain driver on all SoCs (Rockchip, Amlogic S922X).