[ci] clear unused flags#19

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yuzibo wants to merge 16 commits into

RuyiAI-Stack:riscvfrom

OERV-RVCI:test-core-test

Commits on May 25, 2026

Add RISC-V Blocklist (#1)

XYenChi
authored and
WuXintong123
committed
add riscv64 ci

yuzibo
authored and
WuXintong123
committed
Test ci with PR (#8)

yuzibo
authored and
WuXintong123
committed
Fix no main brach issue

yuzibo
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WuXintong123
committed
move the patch to dest

yuzibo
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WuXintong123
committed
Fix block list format and remove test_cpu_select_algorithm (#4)

XYenChi
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WuXintong123
committed
move the patch to dest

yuzibo
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WuXintong123
committed
[blacklist]: update it (#11)

yuzibo
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WuXintong123
committed
Use commit sha on PR workflow (#12)

yuzibo
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WuXintong123
committed
Fix bytes_to_scalar for float/complex on RISC-V

XYenChi
authored and
WuXintong123
committed
Fix test_float_to_int_conversion_nonfinite for RISC-V

authored and
WuXintong123
committed
Skip test if no qengine

XYenChi
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WuXintong123
committed
Replace offical cpuinfo repo (#18)

XYenChi
authored and
WuXintong123
committed
[ci] split core and full ci (#20)

yuzibo
authored and
WuXintong123
committed
[ci] fix ci workflow and other issue (#21)

yuzibo
authored and
WuXintong123
committed

Commits on May 26, 2026

[ci] clear unused flags
yuzibo
committed