To use the ZSEMBLY emulator, the command syntax is the following:
zasm [FILE] [DELAYMS]
/path/to/file.za (400)
The delay argument is optional, the default delay is 300ms after each instruction.
ZSEMBLY uses a simple CPU-Emulator containing 4 registers, 2 system registers and an instruction pointer.
| Register | Function |
|---|---|
| RA | general register A |
| RB | general register B |
| RC | general register C |
| RD | general register D |
| SI | system instruction |
| SV | system value for SI |
RA, RB, RC, RD are genereal purpose registers, while SI holds a SYSCALL instruction and SV holds the value that will be used for the SYSCALL.
The ZSEMBLY syntax is fairly straight forward, consisting of
INSTRUCTION REGISTER, VALUE/REGISTER.
The same goes for branch instructions where in addition to the standard syntax, an address (based off the instruction pointer) is appended:INSTRUCTION, REGISTER, VALUE/REGISTER, ADDRESS.
Currently ZSEMBLY supports the following opcodes (reg=register, IP=instruction pointer):
| OPCODE | Syntax | Usage |
|---|---|---|
| INC | INC regA | Increments register by one |
| DEC | DEC regA | Decrements register by one |
| ADD | ADD regA, regB/val | Add regB/val to regA |
| SUB | SUB regA, regB/val | Subtract regB/val from regA |
| PUT | PUT regA, regB/val | Set regA to regB or value |
| AND | AND regA, regB/val | Bitwise AND on regA |
| NOT | NOT regA | Bitwise NOT on regA |
| IOR | IOR regA, regB/val | Inclusive OR on regA with regB/val |
| XOR | XOR regA, regB/val | Exclusive OR on regA with regB/val |
| ROR | ROR regA | Rotate bits of regA right |
| ROL | ROL regA | Rotate bits of regA left |
| JMP | JMP address | Set IP to address |
| BEQ | BEQ, regA, regB/val, address | if regA=regB/value: set IP to address |
| BNE | BNE, regA, regB/val, address | if regA!=regB/value: set IP to address |
| HLT | HLT | halt CPU, terminates all execution |
| NOP | NOP | no operation, only increments IP |
| SYS | SYS | executes command in SI with value of SV |
Currently only 2 systemcalls are implemented:
| Call-Integer | Needs SV | Function |
|---|---|---|
| 80 | yes | Prints ASCII decimal of SV to Screen Buffer |
| 67 | no | Clears the Screen Buffer |
Additionally, comments are specified via
; COMMENT(full line comments should be added at the END of a .za file, due to them still counting as a line for the IP).
A sample .za file is provided in the repo, including comments
ZSEMBLY has a simple user interface showing the contents of all registers, as well as the Screen Buffer. In addition, the current instruction and the instruction pointer are shown. Following, a simple rendition of the UI:
+---------------------------------------------------
| RA[10] RB[0] RC[0] RD[0] SI[0] SV[0]
+-------------------Screen--------------------------
|
+---------------------------------------------------
| @Instruction[1]
| > [PUT RA, 10]
Note: if an error occurs during runtime, registers will be set to the following:
RA=69 RB=82 RC=82 RD=0, this symbolises an error via setting registers to display "ERR"