HighTide 26Q3

HighTide 26Q3

First tagged release, cut after the 2026-Q3 toolchain upgrade (PR #195). The full RTL-to-GDSII flow moves to the latest upstream and the benchmark suite is re-validated against it.

Toolchain

• bazel-orfs d9f8b75 → 553c1c3 (111 commits)
• OpenROAD 299f3015, OpenSTA 8575070, ABC 17cadca
• yosys 0.62 → 0.64 (+ yosys-slang eabdfd1)
• New resizer / RTLMP / global router; sv-lang 10.0.1, scip 9.2.3, rules_python 1.9.0

Results

58 (platform, design) pairs reach 6_final on the new tools — the large majority within ~5 % of the pre-upgrade QoR or improved. Per-pair QoR, figures, and the portfolio are published on the results page; per-design rationale lives in each designs/src/<design>/DECISIONS.md.

Workarounds dropped (fixes now upstream)

CTS-0122 patch (#10549), the three yosys patches, the NyuziProcessor CTS-0105 pre_cts.tcl (#10177), and several ODB-1200 SKIP_*_REPAIR flags (the rewritten resizer converges).

New workarounds (bugs the upgrade introduced)

OpenSTA write_sdc UTF-8 corruption (NVDLA partition_m/c — redundant async-reset false-paths removed) and a recurring MPL-0040 on eyeriss-asap7 (util 40→30).

Known regressions (finish, beyond tolerance — tracked)

cnn-asap7 (#194), bp_uno-asap7 (#196), vortex-asap7 (#197), vortex-nangate45 (#198), vortex-sky130hd (#199), coralnpu-sky130hd (#200), NVDLA partition_c-asap7 (#201), floonoc-sky130hd PSM-0069 (#202). Each needs an RTL/SDC/PDN change beyond the flow-knob scope of this upgrade.

Known non-closures (do not finish — pre-existing, tracked)

snitch_cluster-nangate45 GP hang (#203), litepci-sky130hd GRT unroutable (#204), NVDLA partition_c-sky130hd GP plateau (#205).

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Frequency push (PR #206)

After the upgrade, every over-provisioned design's clock was tightened to its true register-to-register timing floor + 10% guardband, found via report_clock_min_period (the reported setup WNS is misleading — for LiteX/protocol/NVDLA designs it's dominated by an input→output combinational feedthrough that tracks the constraint, not silicon). Highlights:

• litedram-asap7 40 → 955 MHz (24×); litedram/liteeth-nangate45 ~6×; litedram-sky130hd 3.8×
• ternip, floonoc, NVDLA partitions ~2–2.8×; most others 1.1–1.7×
• liteeth-asap7 corrected: its 920 ps baseline never actually met reg2reg (the io feedthrough hid the violation) — now closes at 1022 ps
• partition_c-nangate45 pinned at its routability floor (3.90 ns)

Only constraint.sdc clock periods changed (no RTL, no other constraints). Method documented in CLAUDE.md.