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neon_intrinsics.cpp: add some unimplemented f32 scalar encodings #5420

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neon_intrinsics.cpp: add some unimplemented f32 scalar encodings #5420

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22 changes: 22 additions & 0 deletions arch/arm64/neon_intrinsics.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -15828,6 +15828,12 @@ bool NeonGetLowLevelILForInstruction(
add_input_reg(inputs, il, instr.operands[2]);
add_output_reg(outputs, il, instr.operands[0]);
break;
case ENC_FMAX_S_FLOATDP2:
intrin_id = ARM64_INTRIN_VMAX_F32; // FMAX Sd,Sn,Sm
add_input_reg(inputs, il, instr.operands[1]);
add_input_reg(inputs, il, instr.operands[2]);
add_output_reg(outputs, il, instr.operands[0]);
break;
case ENC_FMAX_H_FLOATDP2:
intrin_id = ARM64_INTRIN_VMAXH_F16; // FMAX Hd,Hn,Hm
add_input_reg(inputs, il, instr.operands[1]);
Expand Down Expand Up @@ -15932,6 +15938,12 @@ bool NeonGetLowLevelILForInstruction(
add_input_reg(inputs, il, instr.operands[2]);
add_output_reg(outputs, il, instr.operands[0]);
break;
case ENC_FMIN_S_FLOATDP2:
intrin_id = ARM64_INTRIN_VMIN_F32; // FMIN Sd,Sn,Sm
add_input_reg(inputs, il, instr.operands[1]);
add_input_reg(inputs, il, instr.operands[2]);
add_output_reg(outputs, il, instr.operands[0]);
break;
case ENC_FMIN_H_FLOATDP2:
intrin_id = ARM64_INTRIN_VMINH_F16; // FMIN Hd,Hn,Hm
add_input_reg(inputs, il, instr.operands[1]);
Expand Down Expand Up @@ -16322,6 +16334,11 @@ bool NeonGetLowLevelILForInstruction(
add_input_reg(inputs, il, instr.operands[1]);
add_output_reg(outputs, il, instr.operands[0]);
break;
case ENC_FNEG_S_FLOATDP1:
intrin_id = ARM64_INTRIN_VNEG_F32; // FNEG Sd,Sn
add_input_reg(inputs, il, instr.operands[1]);
add_output_reg(outputs, il, instr.operands[0]);
break;
case ENC_FNEG_H_FLOATDP1:
intrin_id = ARM64_INTRIN_VNEGH_F16; // FNEG Hd,Hn
add_input_reg(inputs, il, instr.operands[1]);
Expand Down Expand Up @@ -16664,6 +16681,11 @@ bool NeonGetLowLevelILForInstruction(
add_input_reg(inputs, il, instr.operands[1]);
add_output_reg(outputs, il, instr.operands[0]);
break;
case ENC_FSQRT_S_FLOATDP1:
intrin_id = ARM64_INTRIN_VSQRT_F32; // FSQRT Sd,Sn
add_input_reg(inputs, il, instr.operands[1]);
add_output_reg(outputs, il, instr.operands[0]);
break;
case ENC_FSQRT_H_FLOATDP1:
intrin_id = ARM64_INTRIN_VSQRTH_F16; // FSQRT Hd,Hn
add_input_reg(inputs, il, instr.operands[1]);
Expand Down