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tlb ptw miss testcase added, with invalid simulating of ptw_resp_valid #154

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0 ...ical_version/test_tlb_receive_ptw_resp.py → ...cal_version/_test_tlb_receive_ptw_resp.py
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0 ...sical_version/test_tlb_receive_request.py → ...ical_version/_test_tlb_receive_request.py
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0 .../itlb/classical_version/test_tlb_reset.py → ...itlb/classical_version/_test_tlb_reset.py
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334 changes: 334 additions & 0 deletions ut_frontend/itlb/classical_version/base_components.py
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################################################################################
# hit
################################################################################

def hit_nonStage_requestor_0(tlb) -> dict:
# generate signals
signals = tlb.gene_rand_TLBsignal_batch()
# initialize dut with signals
tlb.init_dut_for_nostage_hit(signals["vpn"], signals["asid"], signals["ppn"], signals["ppn_low"])
tlb.csr.satp.asid.value = signals["asid"]
# step to next cycle
tlb.dut.Step()
# switch requestor
tlb.requestor_0.req.valid.value = 1
tlb.requestor_1.req.valid.value = 0
tlb.requestor_2.req.valid.value = 0
tlb.requestor_0.req.bits_vaddr.value = (signals["vpn"] << 12) | signals["offset"]
# step to next cycle
tlb.dut.Step(2)
# assert result
assert (tlb.requestor_0.resp.paddr_0.value == ((signals["ppn"] << 12) | signals["offset"]))
assert (tlb.requestor_0.resp.miss.value == 0)
# return signals
return signals


def hit_nonStage_requestor_1(tlb) -> dict:
# generate signals
signals = tlb.gene_rand_TLBsignal_batch()
# initialize dut with signals
tlb.init_dut_for_nostage_hit(signals["vpn"], signals["asid"], signals["ppn"], signals["ppn_low"])
tlb.csr.satp.asid.value = signals["asid"]
# step to next cycle
tlb.dut.Step()
# switch requestor
tlb.requestor_0.req.valid.value = 0
tlb.requestor_1.req.valid.value = 1
tlb.requestor_2.req.valid.value = 0
tlb.requestor_1.req.bits_vaddr.value = (signals["vpn"] << 12) | signals["offset"]
# step to next cycle
tlb.dut.Step(2)
# assert result
assert (tlb.requestor_1.resp.paddr_0.value == ((signals["ppn"] << 12) | signals["offset"]))
assert (tlb.requestor_1.resp.miss.value == 0)
# return signals
return signals


def hit_nonStage_requestor_2(tlb) -> dict:
# generate signals
signals = tlb.gene_rand_TLBsignal_batch()
# initialize dut with signals
tlb.init_dut_for_nostage_hit(signals["vpn"], signals["asid"], signals["ppn"], signals["ppn_low"])
tlb.csr.satp.asid.value = signals["asid"]
# step to next cycle
tlb.dut.Step()
# switch requestor
tlb.requestor_0.req.valid.value = 0
tlb.requestor_1.req.valid.value = 0
tlb.requestor_2.req.valid.value = 1
tlb.ctrl.io_requestor_2_resp_ready.value = 1
tlb.requestor_2.req.bits_vaddr.value = (signals["vpn"] << 12) | signals["offset"]
# step to next cycle
tlb.dut.Step(2)
# assert result
assert (tlb.requestor_2.resp.paddr_0.value == ((signals["ppn"] << 12) | signals["offset"]))
assert (tlb.requestor_2.resp.miss.value == 0)
# return signals
return signals


################################################################################
# miss
################################################################################

# no stage
def miss_nonStage_requestor_0(tlb) -> dict:
# generate signals
signals = tlb.gene_rand_TLBsignal_batch()
print(f'generate signals: {signals}')
# initialize dut with signals
tlb.init_dut_for_nostage_miss(signals["vpn"], signals["asid"], signals["ppn"], signals["ppn_low"])
tlb.csr.satp.asid.value = signals["asid"]
# step to next cycle
tlb.dut.Step()
# switch requestor
tlb.requestor_0.req.valid.value = 1
tlb.requestor_1.req.valid.value = 0
tlb.requestor_2.req.valid.value = 0
tlb.requestor_0.req.bits_vaddr.value = (signals["vpn"] << 12) | signals["offset"]
# step to next cycle
tlb.dut.Step(2)
# assert result
assert (tlb.requestor_0.resp.miss.value == 1)
# return signals
return signals


def miss_nonStage_requestor_1(tlb) -> dict:
# generate signals
signals = tlb.gene_rand_TLBsignal_batch()
# initialize dut with signals
tlb.init_dut_for_nostage_miss(signals["vpn"], signals["asid"], signals["ppn"], signals["ppn_low"])
tlb.csr.satp.asid.value = signals["asid"]
# step to next cycle
tlb.dut.Step()
# switch requestor
tlb.requestor_0.req.valid.value = 0
tlb.requestor_1.req.valid.value = 1
tlb.requestor_2.req.valid.value = 0
tlb.requestor_1.req.bits_vaddr.value = (signals["vpn"] << 12) | signals["offset"]
# step to next cycle
tlb.dut.Step(2)
# assert result
assert (tlb.requestor_1.resp.miss.value == 1)
# return signals
return signals


def miss_nonStage_requestor_2(tlb) -> dict:
# generate signals
signals = tlb.gene_rand_TLBsignal_batch()
# initialize dut with signals
tlb.init_dut_for_nostage_miss(signals["vpn"], signals["asid"], signals["ppn"], signals["ppn_low"])
tlb.csr.satp.asid.value = signals["asid"]
# step to next cycle
tlb.dut.Step()
# switch requestor
tlb.requestor_0.req.valid.value = 0
tlb.requestor_1.req.valid.value = 0
tlb.requestor_2.req.valid.value = 1
tlb.ctrl.io_requestor_2_resp_ready.value = 1
tlb.requestor_2.req.bits_vaddr.value = (signals["vpn"] << 12) | signals["offset"]
# step to next cycle
tlb.dut.Step(2)
# assert result
assert (tlb.requestor_2.resp.miss.value == 1)
# return signals
return signals


# only stage 1
def miss_onlyStage1_requestor_0(tlb) -> dict:
# generate signals
signals = tlb.gene_rand_TLBsignal_batch()
# initialize dut with signals
tlb.init_dut_for_onlyStage1_miss(signals["vpn"], signals["asid"], signals["ppn"], signals["ppn_low"])
tlb.csr.satp.asid.value = signals["asid"]
# step to next cycle
tlb.dut.Step()
# switch requestor
tlb.requestor_0.req.valid.value = 1
tlb.requestor_1.req.valid.value = 0
tlb.requestor_2.req.valid.value = 0
tlb.requestor_0.req.bits_vaddr.value = (signals["vpn"] << 12) | signals["offset"]
# step to next cycle
tlb.dut.Step(2)
# assert result
assert (tlb.requestor_0.resp.miss.value == 1)
# return signals
return signals


def miss_onlyStage1_requestor_1(tlb) -> dict:
# generate signals
signals = tlb.gene_rand_TLBsignal_batch()
# initialize dut with signals
tlb.init_dut_for_onlyStage1_miss(signals["vpn"], signals["asid"], signals["ppn"], signals["ppn_low"])
tlb.csr.satp.asid.value = signals["asid"]
# step to next cycle
tlb.dut.Step()
# switch requestor
tlb.requestor_0.req.valid.value = 0
tlb.requestor_1.req.valid.value = 1
tlb.requestor_2.req.valid.value = 0
tlb.requestor_1.req.bits_vaddr.value = (signals["vpn"] << 12) | signals["offset"]
# step to next cycle
tlb.dut.Step(2)
# assert result
assert (tlb.requestor_1.resp.miss.value == 1)
# return signals
return signals


def miss_onlyStage1_requestor_2(tlb) -> dict:
# generate signals
signals = tlb.gene_rand_TLBsignal_batch()
# initialize dut with signals
tlb.init_dut_for_onlyStage1_miss(signals["vpn"], signals["asid"], signals["ppn"], signals["ppn_low"])
tlb.csr.satp.asid.value = signals["asid"]
# step to next cycle
tlb.dut.Step()
# switch requestor
tlb.requestor_0.req.valid.value = 0
tlb.requestor_1.req.valid.value = 0
tlb.requestor_2.req.valid.value = 1
tlb.ctrl.io_requestor_2_resp_ready.value = 1
tlb.requestor_2.req.bits_vaddr.value = (signals["vpn"] << 12) | signals["offset"]
# step to next cycle
tlb.dut.Step(2)
# assert result
assert (tlb.requestor_2.resp.miss.value == 1)
# return signals
return signals


# only stage 2
def miss_onlyStage2_requestor_0(tlb) -> dict:
# generate signals
signals = tlb.gene_rand_TLBsignal_batch()
# initialize dut with signals
tlb.init_dut_for_onlyStage2_miss(signals["vpn"], signals["asid"], signals["ppn"], signals["ppn_low"])
tlb.csr.satp.asid.value = signals["asid"]
# step to next cycle
tlb.dut.Step()
# switch requestor
tlb.requestor_0.req.valid.value = 1
tlb.requestor_1.req.valid.value = 0
tlb.requestor_2.req.valid.value = 0
tlb.requestor_0.req.bits_vaddr.value = (signals["vpn"] << 12) | signals["offset"]
# step to next cycle
tlb.dut.Step(2)
# assert result
assert (tlb.requestor_0.resp.miss.value == 1)
# return signals
return signals


def miss_onlyStage2_requestor_1(tlb) -> dict:
# generate signals
signals = tlb.gene_rand_TLBsignal_batch()
# initialize dut with signals
tlb.init_dut_for_onlyStage2_miss(signals["vpn"], signals["asid"], signals["ppn"], signals["ppn_low"])
tlb.csr.satp.asid.value = signals["asid"]
# step to next cycle
tlb.dut.Step()
# switch requestor
tlb.requestor_0.req.valid.value = 0
tlb.requestor_1.req.valid.value = 1
tlb.requestor_2.req.valid.value = 0
tlb.requestor_1.req.bits_vaddr.value = (signals["vpn"] << 12) | signals["offset"]
# step to next cycle
tlb.dut.Step(2)
# assert result
assert (tlb.requestor_1.resp.miss.value == 1)
# return signals
return signals


def miss_onlyStage2_requestor_2(tlb) -> dict:
# generate signals
signals = tlb.gene_rand_TLBsignal_batch()
# initialize dut with signals
tlb.init_dut_for_onlyStage2_miss(signals["vpn"], signals["asid"], signals["ppn"], signals["ppn_low"])
tlb.csr.satp.asid.value = signals["asid"]
# step to next cycle
tlb.dut.Step()
# switch requestor
tlb.requestor_0.req.valid.value = 0
tlb.requestor_1.req.valid.value = 0
tlb.requestor_2.req.valid.value = 1
tlb.ctrl.io_requestor_2_resp_ready.value = 1
tlb.requestor_2.req.bits_vaddr.value = (signals["vpn"] << 12) | signals["offset"]
# step to next cycle
tlb.dut.Step(2)
# assert result
assert (tlb.requestor_2.resp.miss.value == 1)
# return signals
return signals


# all stage
def miss_allStage_requestor_0(tlb) -> dict:
# generate signals
signals = tlb.gene_rand_TLBsignal_batch()
# initialize dut with signals
tlb.init_dut_for_allStage_miss(signals["vpn"], signals["asid"], signals["ppn"], signals["ppn_low"])
tlb.csr.satp.asid.value = signals["asid"]
# step to next cycle
tlb.dut.Step()
# switch requestor
tlb.requestor_0.req.valid.value = 1
tlb.requestor_1.req.valid.value = 0
tlb.requestor_2.req.valid.value = 0
tlb.requestor_0.req.bits_vaddr.value = (signals["vpn"] << 12) | signals["offset"]
# step to next cycle
tlb.dut.Step(2)
# assert result
assert (tlb.requestor_0.resp.miss.value == 1)
# return signals
return signals


def miss_allStage_requestor_1(tlb) -> dict:
# generate signals
signals = tlb.gene_rand_TLBsignal_batch()
# initialize dut with signals
tlb.init_dut_for_allStage_miss(signals["vpn"], signals["asid"], signals["ppn"], signals["ppn_low"])
tlb.csr.satp.asid.value = signals["asid"]
# step to next cycle
tlb.dut.Step()
# switch requestor
tlb.requestor_0.req.valid.value = 0
tlb.requestor_1.req.valid.value = 1
tlb.requestor_2.req.valid.value = 0
tlb.requestor_1.req.bits_vaddr.value = (signals["vpn"] << 12) | signals["offset"]
# step to next cycle
tlb.dut.Step(2)
# assert result
assert (tlb.requestor_1.resp.miss.value == 1)
# return signals
return signals


def miss_allStage_requestor_2(tlb) -> dict:
# generate signals
signals = tlb.gene_rand_TLBsignal_batch()
# initialize dut with signals
tlb.init_dut_for_allStage_miss(signals["vpn"], signals["asid"], signals["ppn"], signals["ppn_low"])
tlb.csr.satp.asid.value = signals["asid"]
# step to next cycle
tlb.dut.Step()
# switch requestor
tlb.requestor_0.req.valid.value = 0
tlb.requestor_1.req.valid.value = 0
tlb.requestor_2.req.valid.value = 1
tlb.ctrl.io_requestor_2_resp_ready.value = 1
tlb.requestor_2.req.bits_vaddr.value = (signals["vpn"] << 12) | signals["offset"]
# step to next cycle
tlb.dut.Step(2)
# assert result
assert (tlb.requestor_2.resp.miss.value == 1)
# return signals
return signals
2 changes: 2 additions & 0 deletions ut_frontend/itlb/classical_version/env/itlb_utils.py
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def other_than(value):
return value ^ 1
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