[XPU] Bump vllm_xpu_kernels to v0.1.11.1#11
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Signed-off-by: aarushjain29 <aarushi.jain2@amd.com> Co-authored-by: Cursor <cursoragent@cursor.com> Co-authored-by: Andreas Karatzas <akaratza@amd.com>
…llm-project#48688) Signed-off-by: Turner Jabbour <doubleujabbour@gmail.com> Co-authored-by: Claude <noreply@anthropic.com>
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…uest() (vllm-project#48098) Signed-off-by: mahadrehmann <mahadrehman04@gmail.com> Signed-off-by: Mahad Rehman <114791389+mahadrehmann@users.noreply.github.com> Co-authored-by: muhammadfawaz1 <135441198+professorsab@users.noreply.github.com> Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com> Co-authored-by: Chauncey <chaunceyjiang@gmail.com>
…g different `kernel_block_size` (vllm-project#48125) Signed-off-by: NickLucche <nicolo.lucchesi@mistral.ai>
…ol-call parsers (vllm-project#48034) Signed-off-by: Tahsin Tunan <tahsintunan@gmail.com>
… test (vllm-project#47873) Signed-off-by: Tahsin Tunan <tahsintunan@gmail.com>
…project#48545) Signed-off-by: Chaojun Zhang <chaojun.zhang@intel.com>
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…ication (vllm-project#47991) Signed-off-by: krishy91 <crgkc.r@gmail.com>
…stream (vllm-project#48526) Signed-off-by: pei.zhang <pei.zhang@amd.com> Co-authored-by: Claude <noreply@anthropic.com> Co-authored-by: Andreas Karatzas <akaratza@amd.com>
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Signed-off-by: Sean Chen <seachen@redhat.com>
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…proposer (vllm-project#47460) Signed-off-by: Alagappan Valliappan <avalliappan@nvidia.com> Co-authored-by: Claude <noreply@anthropic.com>
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…LM shuffle (M%128) (vllm-project#46880) Signed-off-by: Mike G <180722391+mikekg@users.noreply.github.com>
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… as custom_class (vllm-project#48754) Signed-off-by: mgoin <mgoin64@gmail.com>
…vllm-project#48519) Signed-off-by: kliuae <kuanfu.liu@embeddedllm.com> Co-authored-by: TJian <tunjian.tan@embeddedllm.com>
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…che runtime fusion for Qwen3-30B-A3B on ROCM_AITER_FA, and ROCM_AITER_UNIFIED_ATTN (vllm-project#42749) Signed-off-by: Jack Hu <Jack.Hu@amd.com> Co-authored-by: Douglas Lehr <91553416+dllehr-amd@users.noreply.github.com>
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Signed-off-by: Woosuk Kwon <woosuk@inferact.ai> Co-authored-by: Bugen Zhao <i@bugenzhao.com> Co-authored-by: Giancarlo Delfin <32987265+TheEpicDolphin@users.noreply.github.com> Co-authored-by: Isotr0py <Isotr0py@outlook.com> Co-authored-by: Isotr0py <mozf@inferact.ai> Co-authored-by: Jee Jee Li <jeejeelee@inferact.ai> Co-authored-by: Roger Wang <hey@rogerw.io> Co-authored-by: Yifan Qiao <yifanqiao@inferact.ai> Co-authored-by: Claude Fable 5 <noreply@anthropic.com> Co-authored-by: OpenAI Codex <codex@openai.com>
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…ing to finish (vllm-project#48873) Signed-off-by: Micah Williamson <micah.williamson@amd.com>
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…ogeneous KV cache groups (vllm-project#48878) Signed-off-by: Debasish-87 <22btics06@suiit.ac.in> Co-authored-by: Or Ozeri <oro@il.ibm.com>
…llm-project#48251) Signed-off-by: aoshen02 <aoshen@inferact.ai>
Co-authored-by: Bugen Zhao <i@bugenzhao.com> Signed-off-by: esmeetu <jasonailu87@gmail.com> Signed-off-by: Bugen Zhao <i@bugenzhao.com>
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…ge/video inputs (vllm-project#46213) Signed-off-by: wendadawen <wendadawen@qq.com> Signed-off-by: Tianyu Guo <guoty9@mail2.sysu.edu.cn> Co-authored-by: Tianyu Guo <guoty9@mail2.sysu.edu.cn>
…ect#48839) Signed-off-by: Sage Ahrac <sagiahrak@gmail.com>
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…ims (vllm-project#48855) Signed-off-by: juliendenize <julien.denize@mistral.ai> Co-authored-by: Nicolò Lucchesi <nlucches@redhat.com>
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Signed-off-by: zhenwei-intel <zhenwei.liu@intel.com>
v0.1.11.1 cherry-picks vllm-project/vllm-xpu-kernels#462, which fixes a real XPU/CUDA op-signature mismatch: an unrelated commit (f7aadae, "add pad-aware reduce path") added two optional args (topk_ids, expert_map) to the moe_sum custom op on the CUDA side, but vllm_xpu_kernels v0.1.11 (the currently pinned release) never registered the matching 4-arg XPU schema. Every call site in vllm/model_executor/layers/fused_moe/fused_moe.py passes all 4 positional args regardless of platform, so this crashes on XPU: RuntimeError: _moe_C::moe_sum() expected at most 2 argument(s) but received 4 argument(s). Declaration: _moe_C::moe_sum(Tensor input, Tensor($0! -> ) output) -> () This affects every MoE forward pass on XPU with fresh main, not a narrow edge case. Verified on real B70 (Intel Arc Pro) hardware: reproduced the crash against the currently-pinned v0.1.11 wheel, then overlaid the v0.1.11.1 wheel's _moe_C.abi3.so and confirmed the 4-arg call now succeeds and is bit-exact against a plain torch.sum(dim=1) reference (max diff: 0.0). Co-authored-by: Claude <noreply@anthropic.com> Signed-off-by: Artur Fierka <artur.fierka@intel.com>
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Summary
Bumps the pinned
vllm_xpu_kernelsrelease fromv0.1.11tov0.1.11.1inrequirements/xpu.txt. This is a real, currently-affecting-every-MoE-forward-pass-on-XPU bug fix, not a routine version bump.Why this isn't a duplicate
Searched
gh pr list --search "vllm_xpu_kernels"(open) — no existing PR bumps to this specific release. The precedent bump PR (vllm-project/vllm#46607,v0.1.10.1) is merged and unrelated to this fix.Root cause
Upstream commit
f7aadae5e5("add pad-aware reduce path", merged 2026-07-14) added two optional args (topk_ids,expert_map) to themoe_sumcustom op — but only updated the CUDA-side registration and kernel. The XPU-sidevllm_xpu_kernelspackage (pinned atv0.1.11) still only registers the old 2-arg schema:Every Python call site (
vllm/model_executor/layers/fused_moe/fused_moe.py) passes all 4 positional args regardless of platform, so every MoE forward pass on XPU with freshmaincurrently crashes — this affects any XPU user running an MoE model, not a narrow edge case. I hit this while testing afierka-intel/vllm#6 (VLLMZ-1811).v0.1.11.1cherry-picks the fix: vllm-project/vllm-xpu-kernels#462 ("moe_sum interface align with cuda"), which adds the matching 4-arg XPU registration/kernel and negative-path validation tests.Test plan
Verified on real Intel Arc Pro B70 hardware (not just reading the diff):
v0.1.11wheel:torch.ops._moe_C.moe_sum(input, output, None, None)→ the exactRuntimeErrorabove.v0.1.11.1wheel (overlaid_moe_C.abi3.so+ Python files intosite-packages/vllm_xpu_kernels/, sincepip installon the downloaded.whlfile hit an unrelated pip CLI parsing bug with the 4-segment version string — worked around by extracting the wheel as a zip and copying files directly, which is functionally equivalent to whatpip installwould do).moe_sumoutput against a plaintorch.sum(dim=1)reference on random input — bit-exact match (max diff: 0.0).AI assistance was used (Claude Code) for investigation and verification; I reviewed the change and ran the tests above personally on B70 hardware.