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24 changes: 24 additions & 0 deletions dts/bindings/video/analogix,anx7625.yaml
Original file line number Diff line number Diff line change
@@ -0,0 +1,24 @@
# Copyright (c) Arduino SRL
# SPDX-License-Identifier: Apache-2.0

title: Analogix ANX7625 MIPI-DSI to DisplayPort bridge

description: |
Analogix ANX7625 MIPI-DSI to DisplayPort converter bridge.

compatible: "analogix,anx7625"

include: [mipi-dsi-device.yaml]

properties:
video-on-gpios:
type: phandle-array
description: GPIO for powering on the video bridge

video-rst-gpios:
type: phandle-array
description: GPIO for resetting the video bridge

otg-on-gpios:
type: phandle-array
description: GPIO for OTG control
3 changes: 3 additions & 0 deletions loader/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,9 @@ find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE} COMPONENTS yaml boards)
set(DTC_OVERLAY_FILE ${CMAKE_CURRENT_LIST_DIR}/../variants/${NORMALIZED_BOARD_TARGET}/${NORMALIZED_BOARD_TARGET}.overlay)
set(EXTRA_CONF_FILE ${CMAKE_CURRENT_LIST_DIR}/../variants/${NORMALIZED_BOARD_TARGET}/${NORMALIZED_BOARD_TARGET}.conf)

# Add dts/bindings to DTS_ROOT for custom bindings
list(APPEND DTS_ROOT ${CMAKE_CURRENT_LIST_DIR}/..)

find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})

project(app LANGUAGES C CXX)
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -31,11 +31,11 @@ CONFIG_ARM_MPU=y
CONFIG_MAX_THREAD_BYTES=4

CONFIG_MAIN_STACK_SIZE=32768
CONFIG_LLEXT_HEAP_SIZE=128
CONFIG_LLEXT_HEAP_SIZE=256

CONFIG_CODE_DATA_RELOCATION=y
CONFIG_MAIN_STACK_REGION="DTCM"
CONFIG_LLEXT_HEAP_REGION="SRAM2"
CONFIG_LLEXT_HEAP_REGION="SRAM1"

CONFIG_ADC=y
CONFIG_PWM=y
Expand Down Expand Up @@ -126,6 +126,16 @@ CONFIG_VIDEO_BUFFER_POOL_SZ_MAX=614400
CONFIG_VIDEO_BUFFER_POOL_ALIGN=32
CONFIG_VIDEO_BUFFER_USE_SHARED_MULTI_HEAP=y
CONFIG_VIDEO_BUFFER_SMH_ATTRIBUTE=2

# Display subsystem for USB-C Video (ANX7625)
CONFIG_DISPLAY=y
CONFIG_DISPLAY_INIT_PRIORITY=80
CONFIG_STM32_LTDC=y
CONFIG_STM32_LTDC_FB_NUM=2
CONFIG_STM32_LTDC_FB_SMH_ATTRIBUTE=2
CONFIG_STM32_LTDC_FB_USE_SHARED_MULTI_HEAP=y
CONFIG_MIPI_DSI=y
CONFIG_MIPI_DSI_STM32=y
CONFIG_FLASH=y

CONFIG_BT=y
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Original file line number Diff line number Diff line change
Expand Up @@ -258,6 +258,8 @@
/ {
chosen {
zephyr,camera = &dcmi;
zephyr,display = &ltdc;
zephyr,mipi-dsi = &mipi_dsi;
zephyr,console = &usart6;
zephyr,shell-uart = &usart6;
zephyr,cdc-acm-uart0 = &usart6;
Expand Down Expand Up @@ -299,18 +301,18 @@
#size-cells = <1>;

boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x00040000>;
read-only;
label = "mcuboot";
reg = <0x00000000 0x00040000>;
read-only;
};

slot0_partition: partition@40000 {
label = "image-0";
reg = <0x00040000 0x000A0000>;
label = "image-0";
reg = <0x00040000 0x000A0000>;
};

user_sketch: partition@e0000 {
reg = <0x0E0000 0x20000>;
reg = <0x000E0000 0x00040000>;
};
};
};
Expand Down Expand Up @@ -408,3 +410,85 @@ qspi_flash: &mx25l12833f {};
<&adc1 13>; /* Hack for D20 */
};
};

&sram1 {
reg = <0x30000000 DT_SIZE_K(256)>;
};

/delete-node/ &sram2;

&sdram1 {
/* Frame buffer memory cache will cause screen flickering. */
zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
};

/*
*PLL3 calculation for 1024x768@60Hz (57.8 MHz pixel clock)
* Portenta H7 uses 25 MHz HSE crystal
* VCO input = HSE / div-m = 25 MHz / 25 = 1 MHz
* VCO output = VCO input × mul-n = 1 MHz × 289 = 289 MHz
* Pixel clock = VCO output / div-r = 289 MHz / 5 = 57.8 MHz
*/
&pll3 {
status = "okay";
clocks = <&clk_hse>;
div-m = <25>; /* HSE_VALUE/1MHz: 25MHz/25 = 1 MHz VCO input */
mul-n = <289>; /* pixelclock/200kHz: 57800/200 = 289 */
div-p = <2>;
div-q = <7>;
div-r = <5>; /* 1000/200kHz = 5 -> 289MHz/5 = 57.8 MHz */
};

&ltdc {
status = "okay";
ext-sdram = <&sdram1>;
width = <1024>;
height = <768>;
def-back-color-red = <0>;
def-back-color-green = <0>;
def-back-color-blue = <0>;
pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>;

display-timings {
compatible = "zephyr,panel-timing";
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
hsync-len = <68>;
hfront-porch = <24>;
hback-porch = <80>;
vsync-len = <6>;
vfront-porch = <3>;
vback-porch = <29>;
};
};

&mipi_dsi {
status = "okay";

pll-ndiv = <40>;
pll-idf = <2>;
pll-odf = <0>;

de-active-high;
bta-ack-disable; /* ANX7625 bridge doesn't respond to BTA requests */
largest-packet-size = <16>;

phy-timings = <35 35 35 35 0 10>;

/*
* This binding allows adding child node with with data-lanes property
* as required by STM32 MIPI-DSI driver.
*/
anx7625: anx7625@0 {
status = "okay";
compatible = "analogix,anx7625";
reg = <0>; /* Virtual channel 0 */
pixel-format = <0>; /* Not used */
data-lanes = <2>; /* 2 data lanes */
video-on-gpios = <&gpiok 2 GPIO_ACTIVE_HIGH>;
video-rst-gpios = <&gpioj 3 GPIO_ACTIVE_HIGH>;
otg-on-gpios = <&gpioj 6 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>;
};
};
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