[Deepin-Kernel-SIG] [linux 6.6-y] [Intel] [Backport] DMR new CPU model support

[Avenger-285714]

backporting two commits which is related with DMR CPU module support

70d1d98,x86/cpu: Rename and move CPU model entry for Diamond Rapids,2025-09-17 11:22:11,Tony Luck tony.luck@intel.com,v6.18-rc1
d1fb034,x86/cpu: Add two Intel CPU model numbers,2024-09-26 10:47:49,Tony Luck tony.luck@intel.com,v6.12-rc1

for 70d1d98,
1.we remove turbostat updates(tools/power/x86/turbostat/turbostat.c) updates which is not supported by Intel.
2.also we add new CPU model family support for module speed_select_if/isst_if_common.c

Summary by Sourcery

Backport Intel Diamond Rapids and related CPU model support to the 6.6-y kernel platform drivers.

New Features:

• Add Intel Diamond Rapids Xeon (family 19) CPU model definition and support flags.
• Add Intel Panther Lake mobile CPU model definition for future support.

Enhancements:

• Switch Intel Speed Select interface CPU matching to use VFM-based macros and extend coverage to new Xeon models, including Diamond Rapids.
• Extend Intel TPMI power domain driver CPU matching to recognize Diamond Rapids CPUs.

[sourcery-ai]

Reviewer's guide (collapsed on small PRs)

Reviewer's Guide

Backports Intel x86 CPU identification updates to support the Diamond Rapids (family 19) and Panther Lake models and switches relevant platform drivers from legacy family/model matching to VFM-based matching, wiring the new Diamond Rapids ID into Intel Speed Select (ISST) and TPMI power domain support while omitting upstream turbostat changes.

Class diagram for updated Intel CPU model identifiers and match tables

classDiagram
    class x86_cpu_id {
        +u32 vendor
        +u32 family
        +u32 model
        +unsigned long driver_data
    }

    class intel_family_macros {
        <<macro_definitions>>
        +INTEL_ATOM_CRESTMONT
        +INTEL_ATOM_CRESTMONT_X
        +INTEL_ATOM_DARKMONT_X
        +INTEL_EMERALDRAPIDS_X
        +INTEL_GRANITERAPIDS_D
        +INTEL_GRANITERAPIDS_X
        +INTEL_ICELAKE_D
        +INTEL_ICELAKE_X
        +INTEL_SAPPHIRERAPIDS_X
        +INTEL_SKYLAKE_X
        +INTEL_DIAMONDRAPIDS_X
        +INTEL_PANTHERLAKE_L
    }

    class isst_if_common {
        +x86_cpu_id isst_cpu_ids[]
    }

    class tpmi_power_domains {
        +x86_cpu_id tpmi_cpu_ids[]
    }

    intel_family_macros <.. x86_cpu_id : uses_for_matching
    isst_if_common --> x86_cpu_id : uses
    tpmi_power_domains --> x86_cpu_id : uses

    class match_macros {
        <<macros>>
        +X86_MATCH_VFM(vfm, data)
    }

    match_macros <.. isst_if_common : used_in_isst_cpu_ids
    match_macros <.. tpmi_power_domains : used_in_tpmi_cpu_ids

Loading

File-Level Changes

Change	Details	Files
Switch Intel Speed Select (ISST) CPU matching to VFM-based IDs and add Diamond Rapids support.	Replace X86_MATCH_INTEL_FAM6_MODEL() usage with X86_MATCH_VFM() for existing Crestmont, Darkmont, Emerald Rapids, Granite Rapids, Icelake, Sapphire Rapids, and Skylake entries. Introduce a new ISST entry for the Diamond Rapids server CPU model with SST_HPM_SUPPORTED capabilities. Preserve existing feature flags (SST_HPM_SUPPORTED, SST_MBOX_SUPPORTED, or none) for all other CPUs.	drivers/platform/x86/intel/speed_select_if/isst_if_common.c
Extend Intel CPU family/model definitions to include Diamond Rapids (family 19) and Panther Lake mobile.	Define INTEL_DIAMONDRAPIDS_X as a Family 19, model 0x01 CPU with Panther Cove core. Add INTEL_PANTHERLAKE_L definition as a Family 6, model 0xCC CPU. Keep existing family 6 and hybrid processor definitions intact while inserting the new macros in the appropriate sections.	arch/x86/include/asm/intel-family.h
Enable TPMI power domain driver support for Diamond Rapids using the new VFM ID.	Add an X86_MATCH_VFM(INTEL_DIAMONDRAPIDS_X, NULL) entry to the TPMI CPU ID table. Leave existing Crestmont, Darkmont, and Granite Rapids TPMI entries unchanged.	drivers/platform/x86/intel/tpmi_power_domains.c

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[sourcery-ai]

Hey - I've left some high level feedback:

• The new INTEL_PANTHERLAKE_L macro is introduced but not used in this backport; consider dropping it here unless there is an immediate in-tree consumer to keep the backport minimal and focused on DMR support.
• In isst_if_common.c, the added INTEL_DIAMONDRAPIDS_X entry is appended near the end; if feasible, align the ordering of X86_MATCH_VFM entries with the upstream commit to simplify future syncs and reduce diff noise.

Prompt for AI Agents

Please address the comments from this code review:

## Overall Comments
- The new INTEL_PANTHERLAKE_L macro is introduced but not used in this backport; consider dropping it here unless there is an immediate in-tree consumer to keep the backport minimal and focused on DMR support.
- In isst_if_common.c, the added INTEL_DIAMONDRAPIDS_X entry is appended near the end; if feasible, align the ordering of X86_MATCH_VFM entries with the upstream commit to simplify future syncs and reduce diff noise.

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[Copilot]

Pull request overview

This PR backports Diamond Rapids (DMR) CPU model support from upstream kernel commits to the 6.6-y kernel branch. The changes add support for Intel's Diamond Rapids (Family 19) and Panther Lake processors by defining new CPU model identifiers and registering them with relevant platform drivers.

Changes:

• Added CPU model definitions for INTEL_DIAMONDRAPIDS_X (Family 19, model 0x01) and INTEL_PANTHERLAKE_L (Family 6, model 0xCC)
• Updated TPMI power domains driver to recognize Diamond Rapids processors
• Modernized speed_select_if driver by converting from X86_MATCH_INTEL_FAM6_MODEL to X86_MATCH_VFM macros and added Diamond Rapids support

Reviewed changes

Copilot reviewed 3 out of 3 changed files in this pull request and generated 2 comments.

File	Description
arch/x86/include/asm/intel-family.h	Adds CPU model definitions for Diamond Rapids (Family 19) and Panther Lake processors
drivers/platform/x86/intel/tpmi_power_domains.c	Registers Diamond Rapids in the TPMI power domains CPU ID table
drivers/platform/x86/intel/speed_select_if/isst_if_common.c	Converts macro usage to X86_MATCH_VFM and adds Diamond Rapids with HPM support

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[Copilot]

Missing the INTEL_FAM19_DIAMONDRAPIDS_X definition. Following the codebase convention (see INTEL_FAM5_QUARK_X1000 at line 264), CPU model definitions for non-Family-6 processors should include both a INTEL_FAM{N}_ variant with the model number and an INTEL_ variant using IFM. Add: #define INTEL_FAM19_DIAMONDRAPIDS_X 0x01 before this line.

[Copilot]

Missing the INTEL_FAM6_PANTHERLAKE_L definition. Following the codebase convention (see INTEL_FAM6_LUNARLAKE_M at line 196), Family 6 CPU model definitions should include both a INTEL_FAM6_ variant with the model number and an INTEL_ variant using IFM. Add: #define INTEL_FAM6_PANTHERLAKE_L 0xCC before this line.